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gem5
v21.1.0.2
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#include <map>#include <memory>#include <vector>#include "arch/arm/isa_device.hh"#include "arch/arm/system.hh"#include "base/cprintf.hh"#include "cpu/base.hh"#include "debug/PMUVerbose.hh"#include "sim/eventq.hh"#include "sim/sim_object.hh"#include "sim/system.hh"Go to the source code of this file.
Classes | |
| class | gem5::ArmISA::PMU |
| Model of an ARM PMU version 3. More... | |
| struct | gem5::ArmISA::PMU::PMUEvent |
| Event definition base class. More... | |
| struct | gem5::ArmISA::PMU::RegularEvent |
| struct | gem5::ArmISA::PMU::RegularEvent::RegularProbe |
| class | gem5::ArmISA::PMU::SWIncrementEvent |
| struct | gem5::ArmISA::PMU::CounterState |
| State of a counter within the PMU. More... | |
Namespaces | |
| gem5 | |
| Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223. | |
| gem5::ArmISA | |