gem5  v21.1.0.2
gem5::VegaISA::Inst_DS__DS_WRXCHG2ST64_RTN_B32 Member List

This is the complete list of members for gem5::VegaISA::Inst_DS__DS_WRXCHG2ST64_RTN_B32, including all inherited members.

_flagsgem5::GPUStaticInstprivate
_instAddrgem5::GPUStaticInstprotected
_instNumgem5::GPUStaticInstprotected
_ipdInstNumgem5::GPUStaticInstprivate
_opcodegem5::GPUStaticInstprotected
_srcLiteralgem5::VegaISA::VEGAGPUStaticInstprotected
calcAddr(GPUDynInstPtr gpuDynInst, ConstVecOperandU32 &addr)gem5::VegaISA::Inst_DSinlineprotected
coalescerTokenCount() const overridegem5::VegaISA::VEGAGPUStaticInstinlinevirtual
completeAcc(GPUDynInstPtr gpuDynInst)gem5::GPUStaticInstinlinevirtual
disassemble()gem5::GPUStaticInst
disassemblygem5::GPUStaticInstprotected
DST_SCALAR enum valuegem5::GPUStaticInst
DST_VEC enum valuegem5::GPUStaticInst
dstOperands() constgem5::GPUStaticInstinline
dstOpsgem5::GPUStaticInstprotected
dstScalarDWordsgem5::GPUStaticInstprivate
dstScalarRegOperands() constgem5::GPUStaticInstinline
dstScalarRegOpsgem5::GPUStaticInstprivate
dstVecDWordsgem5::GPUStaticInstprivate
dstVecRegOperands() constgem5::GPUStaticInstinline
dstVecRegOpsgem5::GPUStaticInstprivate
dynamic_id_countgem5::GPUStaticInststatic
execute(GPUDynInstPtr) overridegem5::VegaISA::Inst_DS__DS_WRXCHG2ST64_RTN_B32virtual
executed_asgem5::GPUStaticInst
extDatagem5::VegaISA::Inst_DSprotected
generateDisassembly() overridegem5::VegaISA::Inst_DSvirtual
getNumOperands() overridegem5::VegaISA::Inst_DS__DS_WRXCHG2ST64_RTN_B32inlinevirtual
getOperandSize(int opIdx) overridegem5::VegaISA::Inst_DS__DS_WRXCHG2ST64_RTN_B32inlinevirtual
getTargetPc()gem5::GPUStaticInstinlinevirtual
GPUStaticInst(const std::string &opcode)gem5::GPUStaticInst
ignoreExec() constgem5::GPUStaticInstinline
initDualMemRead(GPUDynInstPtr gpuDynInst, Addr offset0, Addr offset1)gem5::VegaISA::Inst_DSinlineprotected
initDualMemWrite(GPUDynInstPtr gpuDynInst, Addr offset0, Addr offset1)gem5::VegaISA::Inst_DSinlineprotected
initDynOperandInfo(Wavefront *wf, ComputeUnit *cu)gem5::GPUStaticInst
initiateAcc(GPUDynInstPtr gpuDynInst)gem5::GPUStaticInstinlinevirtual
initMemRead(GPUDynInstPtr gpuDynInst, Addr offset)gem5::VegaISA::Inst_DSinlineprotected
initMemWrite(GPUDynInstPtr gpuDynInst, Addr offset)gem5::VegaISA::Inst_DSinlineprotected
initOperandInfo() overridegem5::VegaISA::Inst_DSvirtual
Inst_DS(InFmt_DS *, const std::string &opcode)gem5::VegaISA::Inst_DS
Inst_DS__DS_WRXCHG2ST64_RTN_B32(InFmt_DS *)gem5::VegaISA::Inst_DS__DS_WRXCHG2ST64_RTN_B32
instAddr(int inst_addr)gem5::GPUStaticInstinline
instAddr() constgem5::GPUStaticInstinline
instDatagem5::VegaISA::Inst_DSprotected
instNum(int num)gem5::GPUStaticInstinline
instNum()gem5::GPUStaticInstinline
instSize() const overridegem5::VegaISA::Inst_DSvirtual
ipdInstNum(int num)gem5::GPUStaticInstinline
ipdInstNum() constgem5::GPUStaticInstinline
isALU() constgem5::GPUStaticInstinline
isArgLoad() constgem5::GPUStaticInstinline
isArgSeg() constgem5::GPUStaticInstinline
isAtomic() constgem5::GPUStaticInstinline
isAtomicAdd() constgem5::GPUStaticInstinline
isAtomicAnd() constgem5::GPUStaticInstinline
isAtomicCAS() constgem5::GPUStaticInstinline
isAtomicDec() constgem5::GPUStaticInstinline
isAtomicExch() constgem5::GPUStaticInstinline
isAtomicInc() constgem5::GPUStaticInstinline
isAtomicMax() constgem5::GPUStaticInstinline
isAtomicMin() constgem5::GPUStaticInstinline
isAtomicNoRet() constgem5::GPUStaticInstinline
isAtomicOr() constgem5::GPUStaticInstinline
isAtomicRet() constgem5::GPUStaticInstinline
isAtomicSub() constgem5::GPUStaticInstinline
isAtomicXor() constgem5::GPUStaticInstinline
isBarrier() constgem5::GPUStaticInstinline
isBranch() constgem5::GPUStaticInstinline
isCondBranch() constgem5::GPUStaticInstinline
isDPPInst() constgem5::GPUStaticInstinline
isEndOfKernel() constgem5::GPUStaticInstinline
isExecMaskRegister(int opIdx)=0gem5::GPUStaticInstpure virtual
isF16() constgem5::GPUStaticInstinline
isF32() constgem5::GPUStaticInstinline
isF64() constgem5::GPUStaticInstinline
isFlat() constgem5::GPUStaticInstinline
isFlatScratchRegister(int opIdx) overridegem5::VegaISA::VEGAGPUStaticInstinlinevirtual
isFMA() constgem5::GPUStaticInstinline
isGloballyCoherent() constgem5::GPUStaticInstinline
isGlobalMem() constgem5::GPUStaticInstinline
isGlobalSeg() constgem5::GPUStaticInstinline
isGroupSeg() constgem5::GPUStaticInstinline
isKernArgSeg() constgem5::GPUStaticInstinline
isKernelLaunch() constgem5::GPUStaticInstinline
isLoad() constgem5::GPUStaticInstinline
isLocalMem() constgem5::GPUStaticInstinline
isMAC() constgem5::GPUStaticInstinline
isMAD() constgem5::GPUStaticInstinline
isMemRef() constgem5::GPUStaticInstinline
isMemSync() constgem5::GPUStaticInstinline
isNop() constgem5::GPUStaticInstinline
isPrivateSeg() constgem5::GPUStaticInstinline
isReadOnlySeg() constgem5::GPUStaticInstinline
isReturn() constgem5::GPUStaticInstinline
isScalar() constgem5::GPUStaticInstinline
isSDWAInst() constgem5::GPUStaticInstinline
isSleep() constgem5::GPUStaticInstinline
isSpecialOp() constgem5::GPUStaticInstinline
isSpillSeg() constgem5::GPUStaticInstinline
isStore() constgem5::GPUStaticInstinline
isSystemCoherent() constgem5::GPUStaticInstinline
isUnconditionalJump() constgem5::GPUStaticInstinline
isWaitcnt() constgem5::GPUStaticInstinline
MapRegFn typedefgem5::GPUStaticInst
maxOperandSize()gem5::GPUStaticInst
maxOpSizegem5::GPUStaticInstprivate
nextInstAddr() constgem5::GPUStaticInstinline
numDstRegOperands() overridegem5::VegaISA::Inst_DS__DS_WRXCHG2ST64_RTN_B32inlinevirtual
numDstScalarDWords()gem5::GPUStaticInst
numDstScalarOperands()gem5::GPUStaticInst
numDstVecDWords()gem5::GPUStaticInst
numDstVecOperands()gem5::GPUStaticInst
numSrcRegOperands() overridegem5::VegaISA::Inst_DS__DS_WRXCHG2ST64_RTN_B32inlinevirtual
numSrcScalarDWords()gem5::GPUStaticInst
numSrcScalarOperands()gem5::GPUStaticInst
numSrcVecDWords()gem5::GPUStaticInst
numSrcVecOperands()gem5::GPUStaticInst
opcode() constgem5::GPUStaticInstinline
OpType enum namegem5::GPUStaticInst
panicUnimplemented() constgem5::VegaISA::VEGAGPUStaticInstprotected
readsEXEC() constgem5::GPUStaticInstinline
readsMode() constgem5::GPUStaticInstinline
readsSCC() constgem5::GPUStaticInstinline
readsVCC() constgem5::GPUStaticInstinline
setFlag(Flags flag)gem5::GPUStaticInstinline
SRC_SCALAR enum valuegem5::GPUStaticInst
SRC_VEC enum valuegem5::GPUStaticInst
srcLiteral() const overridegem5::VegaISA::VEGAGPUStaticInstinlinevirtual
srcOperands() constgem5::GPUStaticInstinline
srcOpsgem5::GPUStaticInstprotected
srcScalarDWordsgem5::GPUStaticInstprivate
srcScalarRegOperands() constgem5::GPUStaticInstinline
srcScalarRegOpsgem5::GPUStaticInstprivate
srcVecDWordsgem5::GPUStaticInstprivate
srcVecRegOperands() constgem5::GPUStaticInstinline
srcVecRegOpsgem5::GPUStaticInstprivate
VEGAGPUStaticInst(const std::string &opcode)gem5::VegaISA::VEGAGPUStaticInst
writesEXEC() constgem5::GPUStaticInstinline
writesMode() constgem5::GPUStaticInstinline
writesSCC() constgem5::GPUStaticInstinline
writesVCC() constgem5::GPUStaticInstinline
~GPUStaticInst()gem5::GPUStaticInstinlinevirtual
~Inst_DS()gem5::VegaISA::Inst_DS
~Inst_DS__DS_WRXCHG2ST64_RTN_B32()gem5::VegaISA::Inst_DS__DS_WRXCHG2ST64_RTN_B32
~VEGAGPUStaticInst()gem5::VegaISA::VEGAGPUStaticInst
Generated on Tue Sep 21 2021 12:32:52 for gem5 by doxygen 1.8.17