| _drainManager | gem5::Drainable | private |
| _drainState | gem5::Drainable | mutableprivate |
| _name | gem5::Named | private |
| _objNameResolver | gem5::SimObject | privatestatic |
| _params | gem5::SimObject | protected |
| addStat(statistics::Info *info) | gem5::statistics::Group | |
| addStatGroup(const char *name, Group *block) | gem5::statistics::Group | |
| clockDomain | gem5::Clocked | private |
| Clocked(ClockDomain &clk_domain) | gem5::Clocked | inlineprotected |
| Clocked(Clocked &)=delete | gem5::Clocked | protected |
| clockEdge(Cycles cycles=Cycles(0)) const | gem5::Clocked | inline |
| ClockedObject(const ClockedObjectParams &p) | gem5::ClockedObject | |
| clockPeriod() const | gem5::Clocked | inline |
| clockPeriodUpdated() | gem5::Clocked | inlineprotectedvirtual |
| commandExecutor | gem5::SMMUv3 | protected |
| configCache | gem5::SMMUv3 | protected |
| configCacheEnable | gem5::SMMUv3 | protected |
| configLat | gem5::SMMUv3 | protected |
| configSem | gem5::SMMUv3 | protected |
| controlPort | gem5::SMMUv3 | protected |
| curCycle() const | gem5::Clocked | inline |
| currentSection() | gem5::Serializable | static |
| cycle | gem5::Clocked | mutableprivate |
| cycleSem | gem5::SMMUv3 | protected |
| cyclesToTicks(Cycles c) const | gem5::Clocked | inline |
| deschedule(Event &event) | gem5::EventManager | inline |
| deschedule(Event *event) | gem5::EventManager | inline |
| deviceInterfaces | gem5::SMMUv3 | protected |
| dmDrain() | gem5::Drainable | private |
| dmDrainResume() | gem5::Drainable | private |
| drain() override | gem5::SMMUv3 | virtual |
| Drainable() | gem5::Drainable | protected |
| drainResume() | gem5::Drainable | inlineprotectedvirtual |
| drainState() const | gem5::Drainable | inline |
| EventManager(EventManager &em) | gem5::EventManager | inline |
| EventManager(EventManager *em) | gem5::EventManager | inline |
| EventManager(EventQueue *eq) | gem5::EventManager | inline |
| eventq | gem5::EventManager | protected |
| eventQueue() const | gem5::EventManager | inline |
| find(const char *name) | gem5::SimObject | static |
| frequency() const | gem5::Clocked | inline |
| generateCheckpointOut(const std::string &cpt_dir, std::ofstream &outstream) | gem5::Serializable | static |
| getPort(const std::string &name, PortID id=InvalidPortID) override | gem5::SMMUv3 | virtual |
| getProbeManager() | gem5::SimObject | |
| getSimObjectResolver() | gem5::SimObject | static |
| getStatGroups() const | gem5::statistics::Group | |
| getStats() const | gem5::statistics::Group | |
| Group()=delete | gem5::statistics::Group | |
| Group(const Group &)=delete | gem5::statistics::Group | |
| Group(Group *parent, const char *name=nullptr) | gem5::statistics::Group | |
| ifcSmmuLat | gem5::SMMUv3 | protected |
| ifcSmmuSem | gem5::SMMUv3 | protected |
| init() override | gem5::SMMUv3 | virtual |
| initState() | gem5::SimObject | virtual |
| inSecureBlock(uint32_t offs) const | gem5::SMMUv3 | protected |
| ipaCache | gem5::SMMUv3 | protected |
| ipaCacheEnable | gem5::SMMUv3 | protected |
| ipaLat | gem5::SMMUv3 | protected |
| ipaSem | gem5::SMMUv3 | protected |
| irqInterfaceEnable | gem5::SMMUv3 | protected |
| loadState(CheckpointIn &cp) | gem5::SimObject | virtual |
| memInvalidate() | gem5::SimObject | inlinevirtual |
| memWriteback() | gem5::SimObject | inlinevirtual |
| mergedParent | gem5::statistics::Group | private |
| mergedStatGroups | gem5::statistics::Group | private |
| mergeStatGroup(Group *block) | gem5::statistics::Group | |
| name() const | gem5::Named | inlinevirtual |
| Named(const std::string &name_) | gem5::Named | inline |
| nextCycle() const | gem5::Clocked | inline |
| notifyFork() | gem5::Drainable | inlinevirtual |
| gem5::operator=(const Group &)=delete | gem5::statistics::Group | |
| gem5::Clocked::operator=(Clocked &)=delete | gem5::Clocked | protected |
| packetsTableWalkToRetry | gem5::SMMUv3 | protected |
| packetsToRetry | gem5::SMMUv3 | protected |
| Params typedef | gem5::ClockedObject | |
| params() const | gem5::SimObject | inline |
| path | gem5::Serializable | privatestatic |
| powerState | gem5::ClockedObject | |
| preDumpStats() | gem5::statistics::Group | virtual |
| probeManager | gem5::SimObject | private |
| processCommand(const SMMUCommand &cmd) | gem5::SMMUv3 | protected |
| processCommands() | gem5::SMMUv3 | protected |
| processCommandsEvent | gem5::SMMUv3 | protected |
| ptwSem | gem5::SMMUv3 | protected |
| readControl(PacketPtr pkt) | gem5::SMMUv3 | |
| recvAtomic(PacketPtr pkt, PortID id) | gem5::SMMUv3 | |
| recvReqRetry() | gem5::SMMUv3 | |
| recvTimingReq(PacketPtr pkt, PortID id) | gem5::SMMUv3 | |
| recvTimingResp(PacketPtr pkt) | gem5::SMMUv3 | |
| regProbeListeners() | gem5::SimObject | virtual |
| regProbePoints() | gem5::SimObject | virtual |
| regs | gem5::SMMUv3 | protected |
| regsMap | gem5::SMMUv3 | protected |
| regStats() | gem5::statistics::Group | virtual |
| requestorId | gem5::SMMUv3 | protected |
| requestPort | gem5::SMMUv3 | protected |
| requestPortSem | gem5::SMMUv3 | protected |
| requestPortWidth | gem5::SMMUv3 | protected |
| reschedule(Event &event, Tick when, bool always=false) | gem5::EventManager | inline |
| reschedule(Event *event, Tick when, bool always=false) | gem5::EventManager | inline |
| resetClock() const | gem5::Clocked | inlineprotected |
| resetStats() | gem5::statistics::Group | virtual |
| resolveStat(std::string name) const | gem5::statistics::Group | |
| runProcess(SMMUProcess *proc, PacketPtr pkt) | gem5::SMMUv3 | protected |
| runProcessAtomic(SMMUProcess *proc, PacketPtr pkt) | gem5::SMMUv3 | protected |
| runProcessTiming(SMMUProcess *proc, PacketPtr pkt) | gem5::SMMUv3 | protected |
| schedule(Event &event, Tick when) | gem5::EventManager | inline |
| schedule(Event *event, Tick when) | gem5::EventManager | inline |
| scheduleDeviceRetries() | gem5::SMMUv3 | protected |
| Serializable() | gem5::Serializable | |
| serialize(CheckpointOut &cp) const override | gem5::SMMUv3 | virtual |
| serializeAll(const std::string &cpt_dir) | gem5::SimObject | static |
| serializeSection(CheckpointOut &cp, const char *name) const | gem5::Serializable | |
| serializeSection(CheckpointOut &cp, const std::string &name) const | gem5::Serializable | inline |
| setCurTick(Tick newVal) | gem5::EventManager | inline |
| setSimObjectResolver(SimObjectResolver *resolver) | gem5::SimObject | static |
| signalDrainDone() const | gem5::Drainable | inlineprotected |
| SimObject(const Params &p) | gem5::SimObject | |
| SimObjectList typedef | gem5::SimObject | private |
| simObjectList | gem5::SimObject | privatestatic |
| SMMUCommandExecProcess class | gem5::SMMUv3 | friend |
| smmuIfcLat | gem5::SMMUv3 | protected |
| smmuIfcSem | gem5::SMMUv3 | protected |
| SMMUProcess class | gem5::SMMUv3 | friend |
| SMMUTranslationProcess class | gem5::SMMUv3 | friend |
| SMMUv3(const SMMUv3Params &p) | gem5::SMMUv3 | |
| SMMUv3DeviceInterface class | gem5::SMMUv3 | friend |
| startup() | gem5::SimObject | virtual |
| statGroups | gem5::statistics::Group | private |
| stats | gem5::SMMUv3 | protected |
| system | gem5::SMMUv3 | protected |
| tableWalkPort | gem5::SMMUv3 | protected |
| tableWalkPortEnable | gem5::SMMUv3 | protected |
| tableWalkRecvReqRetry() | gem5::SMMUv3 | |
| tableWalkRecvTimingResp(PacketPtr pkt) | gem5::SMMUv3 | |
| tick | gem5::Clocked | mutableprivate |
| ticksToCycles(Tick t) const | gem5::Clocked | inline |
| tlb | gem5::SMMUv3 | protected |
| tlbEnable | gem5::SMMUv3 | protected |
| tlbLat | gem5::SMMUv3 | protected |
| tlbSem | gem5::SMMUv3 | protected |
| transSem | gem5::SMMUv3 | protected |
| unserialize(CheckpointIn &cp) override | gem5::SMMUv3 | virtual |
| unserializeSection(CheckpointIn &cp, const char *name) | gem5::Serializable | |
| unserializeSection(CheckpointIn &cp, const std::string &name) | gem5::Serializable | inline |
| update() const | gem5::Clocked | inlineprivate |
| updateClockPeriod() | gem5::Clocked | inline |
| voltage() const | gem5::Clocked | inline |
| wakeupEventQueue(Tick when=(Tick) -1) | gem5::EventManager | inline |
| walkCache | gem5::SMMUv3 | protected |
| walkCacheEnable | gem5::SMMUv3 | protected |
| walkCacheNonfinalEnable | gem5::SMMUv3 | protected |
| walkCacheS1Levels | gem5::SMMUv3 | protected |
| walkCacheS2Levels | gem5::SMMUv3 | protected |
| walkLat | gem5::SMMUv3 | protected |
| walkSem | gem5::SMMUv3 | protected |
| writeControl(PacketPtr pkt) | gem5::SMMUv3 | |
| ~Clocked() | gem5::Clocked | inlineprotectedvirtual |
| ~Drainable() | gem5::Drainable | protectedvirtual |
| ~Group() | gem5::statistics::Group | virtual |
| ~Named()=default | gem5::Named | virtual |
| ~Serializable() | gem5::Serializable | virtual |
| ~SimObject() | gem5::SimObject | virtual |
| ~SMMUv3() | gem5::SMMUv3 | inlinevirtual |