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gem5
v21.2.1.1
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#include <iostream>#include <utility>#include <vector>#include "arch/generic/isa.hh"#include "cpu/o3/free_list.hh"#include "cpu/o3/regfile.hh"#include "cpu/reg_class.hh"Go to the source code of this file.
Classes | |
| class | gem5::o3::SimpleRenameMap |
| Register rename map for a single class of registers (e.g., integer or floating point). More... | |
| class | gem5::o3::UnifiedRenameMap |
| Unified register rename map for all classes of registers. More... | |
Namespaces | |
| gem5 | |
| Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223. | |
| gem5::o3 | |