gem5  v22.0.0.2
gem5::fastmodel::CortexA76 Member List

This is the complete list of members for gem5::fastmodel::CortexA76, including all inherited members.

Base typedefgem5::fastmodel::CortexA76protected
BaseCPU(const BaseCPUParams &params, sc_core::sc_module *_evs)gem5::Iris::BaseCPU
clockPeriodUpdated() overridegem5::Iris::BaseCPUinlineprotected
clustergem5::fastmodel::CortexA76protected
CortexA76(const Params &p)gem5::fastmodel::CortexA76inline
CPU(const IrisBaseCPUParams &params, iris::IrisConnectionInterface *iris_if)gem5::Iris::CPU< CortexA76TC >inline
evsgem5::Iris::BaseCPUprotected
evs_base_cpugem5::Iris::BaseCPUprotected
getDataPort() overridegem5::Iris::BaseCPUinline
getInstPort() overridegem5::Iris::BaseCPUinline
getPort(const std::string &if_name, PortID idx=InvalidPortID) overridegem5::fastmodel::CortexA76
initState() overridegem5::fastmodel::CortexA76
numgem5::fastmodel::CortexA76protected
PARAMS(FastModelCortexA76)gem5::fastmodel::CortexA76
serializeThread(CheckpointOut &cp, ThreadID tid) const overridegem5::Iris::BaseCPUprotected
set_evs_param(const std::string &n, T val)gem5::fastmodel::CortexA76inline
setCluster(CortexA76Cluster *_cluster, int _num)gem5::fastmodel::CortexA76
setResetAddr(Addr addr, bool secure=false) overridegem5::fastmodel::CortexA76virtual
ThreadContextgem5::Iris::BaseCPUprotected
totalInsts() const overridegem5::Iris::BaseCPU
totalOps() const overridegem5::Iris::BaseCPUinline
wakeup(ThreadID tid) overridegem5::Iris::BaseCPUinline
~BaseCPU()gem5::Iris::BaseCPUvirtual

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