float.hh File Reference

#include <softfloat.h>
#include <specialize.h>
#include <cstdint>
#include <string>
#include <vector>
#include "base/bitfield.hh"

Go to the source code of this file.

Namespaces
	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.
	gem5::RiscvISA

Typedefs
using	gem5::RiscvISA::freg_t = float64_t

Functions
static constexpr uint16_t	gem5::RiscvISA::unboxF16 (uint64_t v)
static constexpr uint32_t	gem5::RiscvISA::unboxF32 (uint64_t v)
static constexpr uint64_t	gem5::RiscvISA::boxF16 (uint16_t v)
static constexpr uint64_t	gem5::RiscvISA::boxF32 (uint32_t v)
static constexpr float16_t	gem5::RiscvISA::f16 (uint16_t v)
static constexpr float32_t	gem5::RiscvISA::f32 (uint32_t v)
static constexpr float64_t	gem5::RiscvISA::f64 (uint64_t v)
static constexpr float16_t	gem5::RiscvISA::f16 (freg_t r)
static constexpr float32_t	gem5::RiscvISA::f32 (freg_t r)
static constexpr float64_t	gem5::RiscvISA::f64 (freg_t r)
static constexpr freg_t	gem5::RiscvISA::freg (float16_t f)
static constexpr freg_t	gem5::RiscvISA::freg (float32_t f)
static constexpr freg_t	gem5::RiscvISA::freg (float64_t f)
static constexpr freg_t	gem5::RiscvISA::freg (uint_fast16_t f)

Variables
const int	gem5::RiscvISA::NumFloatRegs = 32
const std::vector< std::string >	gem5::RiscvISA::FloatRegNames