int.hh File Reference

#include "arch/x86/x86_traits.hh"
#include "base/bitunion.hh"
#include "base/logging.hh"
#include "cpu/reg_class.hh"

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Namespaces
	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.
	gem5::X86ISA
	This is exposed globally, independent of the ISA.

Functions
	gem5::X86ISA::BitUnion64 (X86IntReg) Bitfield< 63
	gem5::X86ISA::EndBitUnion (X86IntReg) namespace int_reg
static constexpr RegId	gem5::X86ISA::intRegMicro (int index)
static constexpr RegId	gem5::X86ISA::intRegFolded (RegIndex index, RegIndex foldBit)

Variables
	gem5::X86ISA::R
SignedBitfield< 63, 0 >	gem5::X86ISA::SR
Bitfield< 31, 0 >	gem5::X86ISA::E
SignedBitfield< 31, 0 >	gem5::X86ISA::SE
Bitfield< 15, 0 >	gem5::X86ISA::X
SignedBitfield< 15, 0 >	gem5::X86ISA::SX
Bitfield< 15, 8 >	gem5::X86ISA::H
SignedBitfield< 15, 8 >	gem5::X86ISA::SH
Bitfield< 7, 0 >	gem5::X86ISA::L
SignedBitfield< 7, 0 >	gem5::X86ISA::SL
constexpr RegIndex	gem5::X86ISA::IntFoldBit = 1 << 6