gic_v2.hh File Reference

Implementation of a GICv2. More...

#include <vector>
#include "arch/arm/interrupts.hh"
#include "base/addr_range.hh"
#include "base/bitunion.hh"
#include "dev/arm/base_gic.hh"
#include "dev/io_device.hh"
#include "dev/platform.hh"
#include "params/GicV2.hh"

Go to the source code of this file.

Classes
class	gem5::GicV2Registers
class	gem5::GicV2
struct	gem5::GicV2::BankedRegs
	Registers "banked for each connected processor" per ARM IHI0048B. More...

Namespaces
	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.

Detailed Description

Implementation of a GICv2.

Definition in file gic_v2.hh.