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gem5 v23.0.0.1
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#include <deque>#include <map>#include <unordered_set>#include <vector>#include "base/callback.hh"#include "base/compiler.hh"#include "base/statistics.hh"#include "base/stats/group.hh"#include "base/types.hh"#include "config/the_gpu_isa.hh"#include "enums/PrefetchType.hh"#include "gpu-compute/comm.hh"#include "gpu-compute/exec_stage.hh"#include "gpu-compute/fetch_stage.hh"#include "gpu-compute/global_memory_pipeline.hh"#include "gpu-compute/hsa_queue_entry.hh"#include "gpu-compute/local_memory_pipeline.hh"#include "gpu-compute/register_manager.hh"#include "gpu-compute/scalar_memory_pipeline.hh"#include "gpu-compute/schedule_stage.hh"#include "gpu-compute/scoreboard_check_stage.hh"#include "mem/port.hh"#include "mem/token_port.hh"#include "sim/clocked_object.hh"Go to the source code of this file.
Namespaces | |
| namespace | gem5 |
| Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223. | |
Enumerations | |
| enum | gem5::EXEC_POLICY { gem5::OLDEST = 0 , gem5::RR } |
| enum | gem5::TLB_CACHE { gem5::TLB_MISS_CACHE_MISS = 0 , gem5::TLB_MISS_CACHE_HIT , gem5::TLB_HIT_CACHE_MISS , gem5::TLB_HIT_CACHE_HIT } |