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reg_abi.hh
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27 
28 #ifndef __ARCH_ARM_REG_ABI_HH__
29 #define __ARCH_ARM_REG_ABI_HH__
30 
31 #include <vector>
32 
33 #include "base/logging.hh"
34 #include "sim/syscall_abi.hh"
35 
36 namespace gem5
37 {
38 
39 namespace ArmISA
40 {
41 
42 struct RegABI32 : public GenericSyscallABI32
43 {
44  static const std::vector<RegId> ArgumentRegs;
45 };
46 
47 struct RegABI64 : public GenericSyscallABI64
48 {
49  static const std::vector<RegId> ArgumentRegs;
50 };
51 
52 } // namespace ArmISA
53 
54 namespace guest_abi
55 {
56 
57 template <typename ABI, typename Arg>
58 struct Argument<ABI, Arg,
59  typename std::enable_if_t<
60  std::is_base_of_v<ArmISA::RegABI32, ABI> &&
61  std::is_integral_v<Arg> &&
62  ABI::template IsWideV<Arg>>>
63 {
64  static Arg
65  get(ThreadContext *tc, typename ABI::State &state)
66  {
67  // 64 bit arguments are passed starting in an even register.
68  if (state % 2)
69  state++;
70  panic_if(state + 1 >= ABI::ArgumentRegs.size(),
71  "Ran out of syscall argument registers.");
72  auto low = ABI::ArgumentRegs[state++];
73  auto high = ABI::ArgumentRegs[state++];
74  return (Arg)ABI::mergeRegs(tc, low, high);
75  }
76 };
77 
78 } // namespace guest_abi
79 } // namespace gem5
80 
81 #endif // __ARCH_ARM_REG_ABI_HH__
gem5::ArmISA::RegABI64
Definition: reg_abi.hh:47
gem5::ArmISA::RegABI64::ArgumentRegs
static const std::vector< RegId > ArgumentRegs
Definition: reg_abi.hh:49
gem5::RiscvISA::ArgumentRegs
constexpr RegId ArgumentRegs[]
Definition: int.hh:147
gem5::ArmISA::RegABI32::ArgumentRegs
static const std::vector< RegId > ArgumentRegs
Definition: reg_abi.hh:44
gem5::GenericSyscallABI64
Definition: syscall_abi.hh:47
std::vector
STL vector class.
Definition: stl.hh:37
syscall_abi.hh
gem5::high
high
Definition: intmath.hh:176
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
gem5::guest_abi::Argument< ABI, Arg, typename std::enable_if_t< std::is_base_of_v< ArmISA::RegABI32, ABI > &&std::is_integral_v< Arg > &&ABI::template IsWideV< Arg > > >::get
static Arg get(ThreadContext *tc, typename ABI::State &state)
Definition: reg_abi.hh:65
gem5::GenericSyscallABI32
Definition: syscall_abi.hh:52
state
atomic_var_t state
Definition: helpers.cc:188
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:214
std
Overload hash function for BasicBlockRange type.
Definition: misc.hh:2909
logging.hh
gem5::guest_abi::Argument
Definition: definition.hh:98
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::ArmISA::RegABI32
Definition: reg_abi.hh:42
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