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microop_args.hh
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27 
28 #ifndef __ARCH_X86_INSTS_MICROOP_ARGS_HH__
29 #define __ARCH_X86_INSTS_MICROOP_ARGS_HH__
30 
31 #include <cstdint>
32 #include <sstream>
33 #include <string>
34 #include <tuple>
35 #include <type_traits>
36 #include <utility>
37 
39 #include "arch/x86/regs/float.hh"
40 #include "arch/x86/regs/int.hh"
41 #include "arch/x86/regs/misc.hh"
42 #include "arch/x86/regs/segment.hh"
43 #include "arch/x86/types.hh"
44 #include "base/compiler.hh"
45 #include "base/cprintf.hh"
46 #include "cpu/reg_class.hh"
47 #include "sim/faults.hh"
48 
49 namespace gem5
50 {
51 
52 namespace X86ISA
53 {
54 
55 struct DestOp
56 {
57  const RegIndex dest;
58  const size_t size;
59  RegIndex opIndex() const { return dest; }
60 
61  DestOp(RegIndex _dest, size_t _size) : dest(_dest), size(_size) {}
62  template <class InstType>
63  DestOp(RegIndex _dest, InstType *inst) : dest(_dest),
64  size(inst->getDestSize())
65  {}
66 };
67 
68 struct Src1Op
69 {
70  const RegIndex src1;
71  const size_t size;
72  RegIndex opIndex() const { return src1; }
73 
74  Src1Op(RegIndex _src1, size_t _size) : src1(_src1), size(_size) {}
75  template <class InstType>
76  Src1Op(RegIndex _src1, InstType *inst) : src1(_src1),
77  size(inst->getSrcSize())
78  {}
79 };
80 
81 struct Src2Op
82 {
83  const RegIndex src2;
84  const size_t size;
85  RegIndex opIndex() const { return src2; }
86 
87  Src2Op(RegIndex _src2, size_t _size) : src2(_src2), size(_size) {}
88  template <class InstType>
89  Src2Op(RegIndex _src2, InstType *inst) : src2(_src2),
90  size(inst->getSrcSize())
91  {}
92 };
93 
94 struct Src3Op
95 {
96  const RegIndex src3;
97  const size_t size;
98  RegIndex opIndex() const { return src3; }
99 
100  Src3Op(RegIndex _src3, size_t _size) : src3(_src3), size(_size) {}
101  template <class InstType>
102  Src3Op(RegIndex _src3, InstType *inst) : src3(_src3),
103  size(inst->getSrcSize())
104  {}
105 };
106 
107 struct DataOp
108 {
109  const RegIndex data;
110  const size_t size;
111  RegIndex opIndex() const { return data; }
112 
113  DataOp(RegIndex _data, size_t _size) : data(_data), size(_size) {}
114 };
115 
116 struct DataHiOp
117 {
119  const size_t size;
120  RegIndex opIndex() const { return dataHi; }
121 
122  DataHiOp(RegIndex data_hi, size_t _size) : dataHi(data_hi), size(_size) {}
123 };
124 
125 struct DataLowOp
126 {
128  const size_t size;
129  RegIndex opIndex() const { return dataLow; }
130 
131  DataLowOp(RegIndex data_low, size_t _size) : dataLow(data_low), size(_size)
132  {}
133 };
134 
135 template <class T, class Enabled=void>
136 struct HasDataSize : public std::false_type {};
137 
138 template <class T>
139 struct HasDataSize<T, decltype((void)&T::dataSize)> : public std::true_type {};
140 
141 template <class T>
143 
144 template <class Base>
145 struct IntOp : public Base
146 {
148 
149  template <class Inst>
150  IntOp(Inst *inst, std::enable_if_t<HasDataSizeV<Inst>, ArgType> idx) :
151  Base(idx.index, inst->dataSize)
152  {}
153 
154  template <class Inst>
155  IntOp(Inst *inst, std::enable_if_t<!HasDataSizeV<Inst>, ArgType> idx) :
156  Base(idx.index, inst)
157  {}
158 
159  void
160  print(std::ostream &os) const
161  {
162  X86StaticInst::printReg(os, intRegClass[this->opIndex()], this->size);
163  }
164 };
165 
166 template <class Base>
167 struct FoldedOp : public Base
168 {
170 
171  template <class InstType>
172  FoldedOp(InstType *inst, ArgType idx) :
173  Base(intRegFolded(idx.index, inst->foldOBit), inst->dataSize)
174  {}
175 
176  void
177  print(std::ostream &os) const
178  {
179  X86StaticInst::printReg(os, intRegClass[this->opIndex()], this->size);
180  }
181 };
182 
183 template <class Base>
184 struct CrOp : public Base
185 {
187 
188  template <class InstType>
189  CrOp(InstType *inst, ArgType idx) : Base(idx.index, 0) {}
190 
191  void
192  print(std::ostream &os) const
193  {
194  ccprintf(os, "cr%d", this->opIndex());
195  }
196 };
197 
198 template <class Base>
199 struct DbgOp : public Base
200 {
202 
203  template <class InstType>
204  DbgOp(InstType *inst, ArgType idx) : Base(idx.index, 0) {}
205 
206  void
207  print(std::ostream &os) const
208  {
209  ccprintf(os, "dr%d", this->opIndex());
210  }
211 
212 };
213 
214 template <class Base>
215 struct SegOp : public Base
216 {
218 
219  template <class InstType>
220  SegOp(InstType *inst, ArgType idx) : Base(idx.index, 0) {}
221 
222  void
223  print(std::ostream &os) const
224  {
225  X86StaticInst::printSegment(os, this->opIndex());
226  }
227 };
228 
229 template <class Base>
230 struct MiscOp : public Base
231 {
233 
234  template <class InstType>
235  MiscOp(InstType *inst, ArgType idx) : Base(idx.index, inst->dataSize) {}
236 
237  void
238  print(std::ostream &os) const
239  {
240  X86StaticInst::printReg(os, miscRegClass[this->opIndex()], this->size);
241  }
242 };
243 
244 template <class Base>
245 struct FloatOp : public Base
246 {
248 
249  template <class Inst>
250  FloatOp(Inst *inst, std::enable_if_t<HasDataSizeV<Inst>, ArgType> idx) :
251  Base(idx.index, inst->dataSize)
252  {}
253 
254  template <class Inst>
255  FloatOp(Inst *inst, std::enable_if_t<!HasDataSizeV<Inst>, ArgType> idx) :
256  Base(idx.index, inst)
257  {}
258 
259  void
260  print(std::ostream &os) const
261  {
262  X86StaticInst::printReg(os, floatRegClass[this->opIndex()],
263  this->size);
264  }
265 };
266 
274 
282 
286 
288 
293 
294 struct Imm8Op
295 {
296  using ArgType = uint8_t;
297 
298  uint8_t imm8;
299 
300  template <class InstType>
301  Imm8Op(InstType *inst, ArgType _imm8) : imm8(_imm8) {}
302 
303  void
304  print(std::ostream &os) const
305  {
306  ccprintf(os, "%#x", imm8);
307  }
308 };
309 
310 struct Imm64Op
311 {
312  using ArgType = uint64_t;
313 
314  uint64_t imm64;
315 
316  template <class InstType>
317  Imm64Op(InstType *inst, ArgType _imm64) : imm64(_imm64) {}
318 
319  void
320  print(std::ostream &os) const
321  {
322  ccprintf(os, "%#x", imm64);
323  }
324 };
325 
326 struct UpcOp
327 {
328  using ArgType = MicroPC;
329 
331 
332  template <class InstType>
333  UpcOp(InstType *inst, ArgType _target) : target(_target) {}
334 
335  void
336  print(std::ostream &os) const
337  {
338  ccprintf(os, "%#x", target);
339  }
340 };
341 
342 struct FaultOp
343 {
344  using ArgType = Fault;
345 
347 
348  template <class InstType>
349  FaultOp(InstType *inst, ArgType _fault) : fault(_fault) {}
350 
351  void
352  print(std::ostream &os) const
353  {
354  ccprintf(os, fault ? fault->name() : "NoFault");
355  }
356 };
357 
358 struct AddrOp
359 {
360  struct ArgType
361  {
362  uint8_t scale;
365  uint64_t disp;
367  };
368 
369  const uint8_t scale;
371  const RegIndex base;
372  const uint64_t disp;
373  const uint8_t segment;
374  const size_t size;
375 
376  template <class InstType>
377  AddrOp(InstType *inst, const ArgType &args) : scale(args.scale),
378  index(intRegFolded(args.index.index, inst->foldABit)),
379  base(intRegFolded(args.base.index, inst->foldABit)),
380  disp(args.disp), segment(args.segment.index),
381  size(inst->addressSize)
382  {
383  assert(segment < segment_idx::NumIdxs);
384  }
385 
386  void
387  print(std::ostream &os) const
388  {
390  os, segment, scale, index, base, disp, size, false);
391  }
392 };
393 
394 template <typename Base, typename ...Operands>
395 class InstOperands : public Base, public Operands...
396 {
397  private:
398  using ArgTuple = std::tuple<typename Operands::ArgType...>;
399 
400  template <std::size_t ...I, typename ...CTorArgs>
401  InstOperands(std::index_sequence<I...>, ExtMachInst mach_inst,
402  const char *mnem, const char *inst_mnem, uint64_t set_flags,
403  OpClass op_class, [[maybe_unused]] ArgTuple args,
404  CTorArgs... ctor_args) :
405  Base(mach_inst, mnem, inst_mnem, set_flags, op_class, ctor_args...),
406  Operands(this, std::get<I>(args))...
407  {}
408 
409  protected:
410  template <typename ...CTorArgs>
411  InstOperands(ExtMachInst mach_inst, const char *mnem,
412  const char *inst_mnem, uint64_t set_flags, OpClass op_class,
413  ArgTuple args, CTorArgs... ctor_args) :
414  InstOperands(std::make_index_sequence<sizeof...(Operands)>{},
415  mach_inst, mnem, inst_mnem, set_flags, op_class,
416  std::move(args), ctor_args...)
417  {}
418 
419  std::string
421  const loader::SymbolTable *symtab) const override
422  {
423  std::stringstream response;
424  Base::printMnemonic(response, this->instMnem, this->mnemonic);
425  int count = 0;
426  GEM5_FOR_EACH_IN_PACK(ccprintf(response, count++ ? ", " : ""),
427  Operands::print(response));
428  return response.str();
429  }
430 };
431 
432 } // namespace X86ISA
433 } // namespace gem5
434 
435 #endif //__ARCH_X86_INSTS_MICROOP_ARGS_HH__
gem5::X86ISA::UpcOp::UpcOp
UpcOp(InstType *inst, ArgType _target)
Definition: microop_args.hh:333
gem5::X86ISA::Src3Op::Src3Op
Src3Op(RegIndex _src3, size_t _size)
Definition: microop_args.hh:100
gem5::X86ISA::FpRegIndex
Definition: static_inst.hh:66
gem5::X86ISA::pc
Bitfield< 19 > pc
Definition: misc.hh:812
gem5::X86ISA::UpcOp::print
void print(std::ostream &os) const
Definition: microop_args.hh:336
gem5::X86ISA::MiscOp::print
void print(std::ostream &os) const
Definition: microop_args.hh:238
gem5::X86ISA::FaultOp::FaultOp
FaultOp(InstType *inst, ArgType _fault)
Definition: microop_args.hh:349
gem5::X86ISA::DestOp
Definition: microop_args.hh:55
gem5::X86ISA::Src1Op::Src1Op
Src1Op(RegIndex _src1, size_t _size)
Definition: microop_args.hh:74
gem5::X86ISA::Imm64Op::ArgType
uint64_t ArgType
Definition: microop_args.hh:312
gem5::X86ISA::FoldedOp::FoldedOp
FoldedOp(InstType *inst, ArgType idx)
Definition: microop_args.hh:172
gem5::X86ISA::Imm8Op::Imm8Op
Imm8Op(InstType *inst, ArgType _imm8)
Definition: microop_args.hh:301
gem5::X86ISA::GpRegIndex
Classes for register indices passed to instruction constructors.
Definition: static_inst.hh:60
gem5::X86ISA::Imm8Op::print
void print(std::ostream &os) const
Definition: microop_args.hh:304
gem5::X86ISA::DataHiOp::opIndex
RegIndex opIndex() const
Definition: microop_args.hh:120
gem5::X86ISA::FaultOp::ArgType
Fault ArgType
Definition: microop_args.hh:344
gem5::X86ISA::DestOp::opIndex
RegIndex opIndex() const
Definition: microop_args.hh:59
gem5::X86ISA::Imm8Op::ArgType
uint8_t ArgType
Definition: microop_args.hh:296
gem5::X86ISA::Imm64Op::print
void print(std::ostream &os) const
Definition: microop_args.hh:320
gem5::X86ISA::DestOp::DestOp
DestOp(RegIndex _dest, size_t _size)
Definition: microop_args.hh:61
gem5::X86ISA::DataHiOp
Definition: microop_args.hh:116
gem5::X86ISA::DataLowOp::size
const size_t size
Definition: microop_args.hh:128
gem5::X86ISA::Imm8Op
Definition: microop_args.hh:294
static_inst.hh
gem5::X86ISA::DbgOp::print
void print(std::ostream &os) const
Definition: microop_args.hh:207
gem5::X86ISA::DataHiOp::size
const size_t size
Definition: microop_args.hh:119
gem5::X86ISA::CrRegIndex
Definition: static_inst.hh:78
gem5::X86ISA::Src2Op::Src2Op
Src2Op(RegIndex _src2, size_t _size)
Definition: microop_args.hh:87
gem5::X86ISA::Imm64Op::Imm64Op
Imm64Op(InstType *inst, ArgType _imm64)
Definition: microop_args.hh:317
gem5::X86ISA::FaultOp::fault
Fault fault
Definition: microop_args.hh:346
gem5::X86ISA::AddrOp::ArgType
Definition: microop_args.hh:360
gem5::X86ISA::DataLowOp
Definition: microop_args.hh:125
gem5::X86ISA::Imm64Op::imm64
uint64_t imm64
Definition: microop_args.hh:314
gem5::X86ISA::Src1Op::Src1Op
Src1Op(RegIndex _src1, InstType *inst)
Definition: microop_args.hh:76
gem5::X86ISA::DataLowOp::DataLowOp
DataLowOp(RegIndex data_low, size_t _size)
Definition: microop_args.hh:131
gem5::X86ISA::InstOperands::InstOperands
InstOperands(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, OpClass op_class, ArgTuple args, CTorArgs... ctor_args)
Definition: microop_args.hh:411
gem5::X86ISA::X86StaticInst::printMem
static void printMem(std::ostream &os, uint8_t segment, uint8_t scale, RegIndex index, RegIndex base, uint64_t disp, uint8_t addressSize, bool rip)
Definition: static_inst.cc:258
gem5::X86ISA::Src1Op::size
const size_t size
Definition: microop_args.hh:71
gem5::loader::SymbolTable
Definition: symtab.hh:64
gem5::X86ISA::FaultOp::print
void print(std::ostream &os) const
Definition: microop_args.hh:352
gem5::X86ISA::CrOp::CrOp
CrOp(InstType *inst, ArgType idx)
Definition: microop_args.hh:189
gem5::X86ISA::IntOp
Definition: microop_args.hh:145
gem5::X86ISA::AddrOp::base
const RegIndex base
Definition: microop_args.hh:371
gem5::X86ISA::Src2Op::Src2Op
Src2Op(RegIndex _src2, InstType *inst)
Definition: microop_args.hh:89
faults.hh
gem5::X86ISA::miscRegClass
constexpr RegClass miscRegClass(MiscRegClass, MiscRegClassName, misc_reg::NumRegs, debug::MiscRegs)
gem5::X86ISA::AddrOp
Definition: microop_args.hh:358
gem5::X86ISA::AddrOp::ArgType::disp
uint64_t disp
Definition: microop_args.hh:365
gem5::X86ISA::FloatOp::FloatOp
FloatOp(Inst *inst, std::enable_if_t<!HasDataSizeV< Inst >, ArgType > idx)
Definition: microop_args.hh:255
gem5::ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:130
gem5::X86ISA::FloatOp::print
void print(std::ostream &os) const
Definition: microop_args.hh:260
gem5::X86ISA::AddrOp::ArgType::scale
uint8_t scale
Definition: microop_args.hh:362
gem5::X86ISA::IntOp::IntOp
IntOp(Inst *inst, std::enable_if_t<!HasDataSizeV< Inst >, ArgType > idx)
Definition: microop_args.hh:155
gem5::X86ISA::DbgOp
Definition: microop_args.hh:199
gem5::MicroPC
uint16_t MicroPC
Definition: types.hh:149
gem5::X86ISA::HasDataSize
Definition: microop_args.hh:136
gem5::auxv::Base
@ Base
Definition: aux_vector.hh:74
gem5::X86ISA::DestOp::dest
const RegIndex dest
Definition: microop_args.hh:57
gem5::X86ISA::Src3Op::Src3Op
Src3Op(RegIndex _src3, InstType *inst)
Definition: microop_args.hh:102
gem5::X86ISA::DestOp::size
const size_t size
Definition: microop_args.hh:58
gem5::X86ISA::Src2Op::opIndex
RegIndex opIndex() const
Definition: microop_args.hh:85
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:248
gem5::X86ISA::DataHiOp::dataHi
const RegIndex dataHi
Definition: microop_args.hh:118
gem5::X86ISA::SegOp::print
void print(std::ostream &os) const
Definition: microop_args.hh:223
gem5::X86ISA::DataLowOp::dataLow
const RegIndex dataLow
Definition: microop_args.hh:127
gem5::X86ISA::FoldedOp
Definition: microop_args.hh:167
int.hh
gem5::X86ISA::count
count
Definition: misc.hh:710
gem5::X86ISA::Src3Op::opIndex
RegIndex opIndex() const
Definition: microop_args.hh:98
gem5::X86ISA::AddrOp::segment
const uint8_t segment
Definition: microop_args.hh:373
gem5::X86ISA::Imm64Op
Definition: microop_args.hh:310
segment.hh
gem5::X86ISA::HasDataSizeV
constexpr bool HasDataSizeV
Definition: microop_args.hh:142
gem5::X86ISA::DataOp::opIndex
RegIndex opIndex() const
Definition: microop_args.hh:111
gem5::X86ISA::UpcOp::target
MicroPC target
Definition: microop_args.hh:330
gem5::X86ISA::UpcOp::ArgType
MicroPC ArgType
Definition: microop_args.hh:328
gem5::X86ISA::Src2Op::src2
const RegIndex src2
Definition: microop_args.hh:83
gem5::X86ISA::intRegFolded
static constexpr RegId intRegFolded(RegIndex index, RegIndex foldBit)
Definition: int.hh:187
cprintf.hh
compiler.hh
gem5::X86ISA::Src2Op::size
const size_t size
Definition: microop_args.hh:84
gem5::X86ISA::SegOp
Definition: microop_args.hh:215
gem5::X86ISA::AddrOp::ArgType::base
GpRegIndex base
Definition: microop_args.hh:364
gem5::X86ISA::Src3Op::size
const size_t size
Definition: microop_args.hh:97
gem5::X86ISA::Src2Op
Definition: microop_args.hh:81
gem5::X86ISA::SegOp::SegOp
SegOp(InstType *inst, ArgType idx)
Definition: microop_args.hh:220
gem5::X86ISA::Src3Op::src3
const RegIndex src3
Definition: microop_args.hh:96
gem5::X86ISA::Src1Op
Definition: microop_args.hh:68
gem5::X86ISA::AddrOp::size
const size_t size
Definition: microop_args.hh:374
gem5::X86ISA::UpcOp
Definition: microop_args.hh:326
gem5::X86ISA::Src3Op
Definition: microop_args.hh:94
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::X86ISA::InstOperands::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Definition: microop_args.hh:420
gem5::X86ISA::AddrOp::AddrOp
AddrOp(InstType *inst, const ArgType &args)
Definition: microop_args.hh:377
gem5::X86ISA::floatRegClass
constexpr RegClass floatRegClass
Definition: float.hh:143
gem5::X86ISA::intRegClass
constexpr RegClass intRegClass
Definition: int.hh:123
gem5::X86ISA::DataOp
Definition: microop_args.hh:107
gem5::X86ISA::DataOp::DataOp
DataOp(RegIndex _data, size_t _size)
Definition: microop_args.hh:113
gem5::X86ISA::X86StaticInst::printReg
static void printReg(std::ostream &os, RegId reg, int size)
Definition: static_inst.cc:142
gem5::X86ISA::AddrOp::print
void print(std::ostream &os) const
Definition: microop_args.hh:387
gem5::X86ISA::segment_idx::NumIdxs
@ NumIdxs
Definition: segment.hh:67
gem5::X86ISA::DataHiOp::DataHiOp
DataHiOp(RegIndex data_hi, size_t _size)
Definition: microop_args.hh:122
gem5::X86ISA::AddrOp::index
const RegIndex index
Definition: microop_args.hh:370
gem5::X86ISA::IntOp::print
void print(std::ostream &os) const
Definition: microop_args.hh:160
gem5::X86ISA::CrOp
Definition: microop_args.hh:184
gem5::X86ISA::ExtMachInst
Definition: types.hh:212
gem5::X86ISA::DbgOp::DbgOp
DbgOp(InstType *inst, ArgType idx)
Definition: microop_args.hh:204
gem5::X86ISA::Src1Op::opIndex
RegIndex opIndex() const
Definition: microop_args.hh:72
gem5::X86ISA::Imm8Op::imm8
uint8_t imm8
Definition: microop_args.hh:298
gem5::X86ISA::DataLowOp::opIndex
RegIndex opIndex() const
Definition: microop_args.hh:129
std
Overload hash function for BasicBlockRange type.
Definition: misc.hh:2909
gem5::X86ISA::X86StaticInst::printSegment
static void printSegment(std::ostream &os, int segment)
Definition: static_inst.cc:63
gem5::X86ISA::DataOp::size
const size_t size
Definition: microop_args.hh:110
gem5::X86ISA::os
Bitfield< 17 > os
Definition: misc.hh:810
gem5::X86ISA::index
Bitfield< 5, 3 > index
Definition: types.hh:98
gem5::X86ISA::AddrOp::ArgType::segment
SegRegIndex segment
Definition: microop_args.hh:366
gem5::X86ISA::Src1Op::src1
const RegIndex src1
Definition: microop_args.hh:70
gem5::X86ISA::CrOp::print
void print(std::ostream &os) const
Definition: microop_args.hh:192
reg_class.hh
gem5::X86ISA::DataOp::data
const RegIndex data
Definition: microop_args.hh:109
gem5::X86ISA::FloatOp::FloatOp
FloatOp(Inst *inst, std::enable_if_t< HasDataSizeV< Inst >, ArgType > idx)
Definition: microop_args.hh:250
gem5::X86ISA::FloatOp
Definition: microop_args.hh:245
gem5::X86ISA::AddrOp::scale
const uint8_t scale
Definition: microop_args.hh:369
gem5::X86ISA::AddrOp::ArgType::index
GpRegIndex index
Definition: microop_args.hh:363
gem5::X86ISA::DestOp::DestOp
DestOp(RegIndex _dest, InstType *inst)
Definition: microop_args.hh:63
gem5::X86ISA::InstOperands
Definition: microop_args.hh:395
gem5::X86ISA::MiscOp::MiscOp
MiscOp(InstType *inst, ArgType idx)
Definition: microop_args.hh:235
gem5::X86ISA::FoldedOp::print
void print(std::ostream &os) const
Definition: microop_args.hh:177
gem5::X86ISA::CtrlRegIndex
Definition: static_inst.hh:72
gem5::X86ISA::IntOp::IntOp
IntOp(Inst *inst, std::enable_if_t< HasDataSizeV< Inst >, ArgType > idx)
Definition: microop_args.hh:150
gem5::RegIndex
uint16_t RegIndex
Definition: types.hh:176
gem5::X86ISA::MiscOp
Definition: microop_args.hh:230
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::X86ISA::InstOperands::InstOperands
InstOperands(std::index_sequence< I... >, ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, OpClass op_class, [[maybe_unused]] ArgTuple args, CTorArgs... ctor_args)
Definition: microop_args.hh:401
gem5::X86ISA::SegRegIndex
Definition: static_inst.hh:90
misc.hh
gem5::X86ISA::AddrOp::disp
const uint64_t disp
Definition: microop_args.hh:372
types.hh
gem5::X86ISA::FaultOp
Definition: microop_args.hh:342
float.hh
gem5::X86ISA::InstOperands< X86MicroopBase >::ArgTuple
std::tuple< typename Operands::ArgType... > ArgTuple
Definition: microop_args.hh:398
gem5::X86ISA::DbgRegIndex
Definition: static_inst.hh:84

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