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system.hh
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41 
42 #ifndef __SYSTEM_HH__
43 #define __SYSTEM_HH__
44 
45 #include <set>
46 #include <string>
47 #include <unordered_map>
48 #include <utility>
49 #include <vector>
50 
52 #include "base/loader/symtab.hh"
53 #include "base/statistics.hh"
54 #include "cpu/pc_event.hh"
55 #include "enums/MemoryMode.hh"
56 #include "mem/mem_requestor.hh"
57 #include "mem/physical.hh"
58 #include "mem/port.hh"
59 #include "mem/port_proxy.hh"
60 #include "params/System.hh"
61 #include "sim/futex_map.hh"
62 #include "sim/redirect_path.hh"
63 #include "sim/se_signal.hh"
64 #include "sim/sim_object.hh"
65 #include "sim/workload.hh"
66 
67 namespace gem5
68 {
69 
70 class BaseRemoteGDB;
71 class KvmVM;
72 class ThreadContext;
73 
74 class System : public SimObject, public PCEventScope
75 {
76  private:
77 
83  class SystemPort : public RequestPort
84  {
85  public:
86 
90  SystemPort(const std::string &_name)
92  { }
93 
94  bool
95  recvTimingResp(PacketPtr pkt) override
96  {
97  panic("SystemPort does not receive timing!");
98  }
99 
100  void
101  recvReqRetry() override
102  {
103  panic("SystemPort does not expect retry!");
104  }
105  };
106 
109 
110  // Map of memory address ranges for devices with their own backing stores
111  std::unordered_map<RequestorID, std::vector<memory::AbstractMemory *>>
113 
114  public:
115 
116  class Threads
117  {
118  private:
119  struct Thread
120  {
121  ThreadContext *context = nullptr;
122  bool active = false;
123  Event *resumeEvent = nullptr;
124 
125  void resume();
126  std::string name() const;
127  void quiesce() const;
128  };
129 
131 
132  Thread &
134  {
135  assert(id < size());
136  return threads[id];
137  }
138 
139  const Thread &
140  thread(ContextID id) const
141  {
142  assert(id < size());
143  return threads[id];
144  }
145 
146  void insert(ThreadContext *tc);
147  void replace(ThreadContext *tc, ContextID id);
148 
149  friend class System;
150 
151  public:
153  {
154  private:
155  Threads const* threads;
156  int pos;
157 
158  friend class Threads;
159 
160  const_iterator(const Threads &_threads, int _pos) :
161  threads(&_threads), pos(_pos)
162  {}
163 
164  public:
165  using iterator_category = std::forward_iterator_tag;
167  using difference_type = int;
168  using pointer = const value_type *;
169  using reference = const value_type &;
170 
173  {
174  pos++;
175  return *this;
176  }
177 
180  {
181  return const_iterator(*threads, pos++);
182  }
183 
186 
187  bool
188  operator == (const const_iterator &other) const
189  {
190  return threads == other.threads && pos == other.pos;
191  }
192 
193  bool
194  operator != (const const_iterator &other) const
195  {
196  return !(*this == other);
197  }
198  };
199 
201 
202  ThreadContext *
204  {
205  return thread(id).context;
206  }
207 
208  void markActive(ContextID id) { thread(id).active = true; }
209 
210  int size() const { return threads.size(); }
211  bool empty() const { return threads.empty(); }
212  int numRunning() const;
213  int
214  numActive() const
215  {
216  int count = 0;
217  for (auto &thread: threads) {
218  if (thread.active)
219  count++;
220  }
221  return count;
222  }
223 
224  void quiesce(ContextID id);
225  void quiesceTick(ContextID id, Tick when);
226 
227  const_iterator begin() const { return const_iterator(*this, 0); }
228  const_iterator end() const { return const_iterator(*this, size()); }
229  };
230 
240 
244  Port &getPort(const std::string &if_name,
245  PortID idx=InvalidPortID) override;
246 
257  bool
258  isAtomicMode() const
259  {
260  return memoryMode == enums::atomic ||
261  memoryMode == enums::atomic_noncaching;
262  }
263 
270  bool isTimingMode() const { return memoryMode == enums::timing; }
271 
278  bool
279  bypassCaches() const
280  {
281  return memoryMode == enums::atomic_noncaching;
282  }
293  enums::MemoryMode getMemoryMode() const { return memoryMode; }
294 
302  void setMemoryMode(enums::MemoryMode mode);
308  unsigned int cacheLineSize() const { return _cacheLineSize; }
309 
311 
312  const bool multiThread;
313 
314  using SimObject::schedule;
315 
316  bool schedule(PCEvent *event) override;
317  bool remove(PCEvent *event) override;
318 
319  uint64_t init_param;
320 
324 
326  Workload *workload = nullptr;
327 
328  public:
333  KvmVM *getKvmVM() const { return kvmVM; }
334 
339  void setKvmVM(KvmVM *const vm) { kvmVM = vm; }
340 
343  const memory::PhysicalMemory& getPhysMem() const { return physmem; }
344 
346  Addr memSize() const;
347 
355  bool isMemAddr(Addr addr) const;
356 
362  void addDeviceMemory(RequestorID requestorId,
363  memory::AbstractMemory *deviceMemory);
364 
370  bool isDeviceMemAddr(const PacketPtr& pkt) const;
371 
376 
377  /*
378  * Return the list of address ranges backed by a shadowed ROM.
379  *
380  * @return List of address ranges backed by a shadowed ROM
381  */
383 
387  ByteOrder
389  {
390  return workload->byteOrder();
391  }
392 
397 
398  protected:
399 
400  KvmVM *kvmVM = nullptr;
401 
403 
405 
406  enums::MemoryMode memoryMode;
407 
408  const unsigned int _cacheLineSize;
409 
410  uint64_t workItemsBegin = 0;
411  uint64_t workItemsEnd = 0;
412  uint32_t numWorkIds;
413 
420 
422 
423  protected:
427  std::string stripSystemName(const std::string& requestor_name) const;
428 
429  public:
430 
464  RequestorID getRequestorId(const SimObject* requestor,
465  std::string subrequestor={});
466 
475  RequestorID getGlobalRequestorId(const std::string& requestor_name);
476 
480  std::string getRequestorName(RequestorID requestor_id);
481 
486  RequestorID lookupRequestorId(const SimObject* obj) const;
487 
492  RequestorID lookupRequestorId(const std::string& name) const;
493 
495  RequestorID maxRequestors() { return requestors.size(); }
496 
497  protected:
499  RequestorID _getRequestorId(const SimObject* requestor,
500  const std::string& requestor_name);
501 
506  std::string leafRequestorName(const SimObject* requestor,
507  const std::string& subrequestor);
508 
509  public:
510 
511  void regStats() override;
516  uint64_t
518  {
519  return ++workItemsBegin;
520  }
521 
526  uint64_t
528  {
529  return ++workItemsEnd;
530  }
531 
537  int
539  {
541  return threads.numActive();
542  }
543 
544  void
545  workItemBegin(uint32_t tid, uint32_t workid)
546  {
547  std::pair<uint32_t, uint32_t> p(tid, workid);
549  }
550 
551  void workItemEnd(uint32_t tid, uint32_t workid);
552 
553  /* Returns whether we successfully trapped into GDB. */
554  bool trapToGdb(GDBSignal signal, ContextID ctx_id) const;
555 
556  protected:
562 
563  public:
564  PARAMS(System);
565 
566  System(const Params &p);
567  ~System();
568 
573  const AddrRange &m5opRange() const { return _m5opRange; }
574 
575  public:
576 
578  void replaceThreadContext(ThreadContext *tc, ContextID context_id);
579 
580  void serialize(CheckpointOut &cp) const override;
581  void unserialize(CheckpointIn &cp) override;
582 
583  public:
584  std::map<std::pair<uint32_t, uint32_t>, Tick> lastWorkItemStarted;
585  std::map<uint32_t, statistics::Histogram*> workItemStats;
586 
588  //
589  // STATIC GLOBAL SYSTEM LIST
590  //
592 
594  static int numSystemsRunning;
595 
596  static void printSystems();
597 
599 
600  static const int maxPID = 32768;
601 
603  std::set<int> PIDs;
604 
605  // By convention, all signals are owned by the receiving process. The
606  // receiver will delete the signal upon reception.
608 
609  // Used by syscall-emulation mode. This member contains paths which need
610  // to be redirected to the faux-filesystem (a duplicate filesystem
611  // intended to replace certain files on the host filesystem).
613 };
614 
615 void printSystems();
616 
617 } // namespace gem5
618 
619 #endif // __SYSTEM_HH__
gem5::System::Threads::numActive
int numActive() const
Definition: system.hh:214
gem5::curTick
Tick curTick()
The universal simulation clock.
Definition: cur_tick.hh:46
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:245
gem5::System::Threads::const_iterator::operator*
reference operator*()
Definition: system.hh:184
gem5::System::addDeviceMemory
void addDeviceMemory(RequestorID requestorId, memory::AbstractMemory *deviceMemory)
Add a physical memory range for a device.
Definition: system.cc:294
gem5::System::Threads::thread
const Thread & thread(ContextID id) const
Definition: system.hh:140
gem5::System::lastWorkItemStarted
std::map< std::pair< uint32_t, uint32_t >, Tick > lastWorkItemStarted
Definition: system.hh:584
gem5::System::SystemPort::recvTimingResp
bool recvTimingResp(PacketPtr pkt) override
Receive a timing response from the peer.
Definition: system.hh:95
gem5::System::PIDs
std::set< int > PIDs
Process set to track which PIDs have already been allocated.
Definition: system.hh:603
gem5::System::Threads::size
int size() const
Definition: system.hh:210
gem5::System::Threads::const_iterator::const_iterator
const_iterator(const Threads &_threads, int _pos)
Definition: system.hh:160
gem5::System::workItemEnd
void workItemEnd(uint32_t tid, uint32_t workid)
Definition: system.cc:377
gem5::System::Threads::const_iterator
Definition: system.hh:152
gem5::System::lookupRequestorId
RequestorID lookupRequestorId(const SimObject *obj) const
Looks up the RequestorID for a given SimObject returns an invalid RequestorID (invldRequestorId) if n...
Definition: system.cc:432
gem5::System::numWorkIds
uint32_t numWorkIds
Definition: system.hh:412
gem5::System::Threads::Thread::resume
void resume()
Definition: system.cc:71
gem5::System::workItemsEnd
uint64_t workItemsEnd
Definition: system.hh:411
gem5::System::liveEvents
std::list< PCEvent * > liveEvents
Definition: system.hh:107
gem5::System::Threads::Thread::context
ThreadContext * context
Definition: system.hh:121
gem5::MipsISA::index
Bitfield< 30, 0 > index
Definition: pra_constants.hh:47
gem5::System::getSystemPort
RequestPort & getSystemPort()
Get a reference to the system port that can be used by non-structural simulation objects like process...
Definition: system.hh:239
gem5::System::physProxy
PortProxy physProxy
Port to physical memory used for writing object files into ram at boot.
Definition: system.hh:323
gem5::memory::PhysicalMemory
The physical memory encapsulates all memories in the system and provides basic functionality for acce...
Definition: physical.hh:136
gem5::System::Threads::const_iterator::difference_type
int difference_type
Definition: system.hh:167
gem5::System::futexMap
FutexMap futexMap
Definition: system.hh:598
gem5::System::schedule
bool schedule(PCEvent *event) override
Definition: system.cc:248
gem5::System::Threads::quiesce
void quiesce(ContextID id)
Definition: system.cc:145
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::ThermalModel
Definition: thermal_model.hh:144
gem5::System::setKvmVM
void setKvmVM(KvmVM *const vm)
Set the pointer to the Kernel Virtual Machine (KVM) SimObject.
Definition: system.hh:339
gem5::System::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Additional function to return the Port of a memory object.
Definition: system.cc:223
gem5::MipsISA::event
Bitfield< 10, 5 > event
Definition: pra_constants.hh:300
gem5::System::isAtomicMode
bool isAtomicMode() const
Is the system in atomic mode?
Definition: system.hh:258
gem5::System::trapToGdb
bool trapToGdb(GDBSignal signal, ContextID ctx_id) const
Definition: system.cc:394
gem5::System::incWorkItemsEnd
uint64_t incWorkItemsEnd()
Called by pseudo_inst to track the number of work items completed by this system.
Definition: system.hh:527
gem5::System::bypassCaches
bool bypassCaches() const
Should caches be bypassed?
Definition: system.hh:279
redirect_path.hh
gem5::System::workItemStats
std::map< uint32_t, statistics::Histogram * > workItemStats
Definition: system.hh:585
gem5::System::getShadowRomRanges
AddrRangeList getShadowRomRanges() const
Definition: system.hh:382
futex_map.hh
gem5::System::workload
Workload * workload
OS kernel.
Definition: system.hh:326
gem5::System::Threads::replace
void replace(ThreadContext *tc, ContextID id)
Definition: system.cc:108
gem5::System::Threads::end
const_iterator end() const
Definition: system.hh:228
gem5::System::setMemoryMode
void setMemoryMode(enums::MemoryMode mode)
Change the memory mode of the system.
Definition: system.cc:230
gem5::EventManager::schedule
void schedule(Event &event, Tick when)
Definition: eventq.hh:1012
gem5::System::Threads::const_iterator::iterator_category
std::forward_iterator_tag iterator_category
Definition: system.hh:165
gem5::System::numSystemsRunning
static int numSystemsRunning
Definition: system.hh:594
std::vector
STL vector class.
Definition: stl.hh:37
gem5::System::registerThreadContext
void registerThreadContext(ThreadContext *tc)
Definition: system.cc:237
gem5::System::System
System(const Params &p)
Definition: system.cc:167
gem5::System::getThermalModel
ThermalModel * getThermalModel() const
The thermal model used for this system (if any).
Definition: system.hh:396
gem5::System::regStats
void regStats() override
Callback to set stat parameters.
Definition: system.cc:361
gem5::System::getDeviceMemory
memory::AbstractMemory * getDeviceMemory(const PacketPtr &pkt) const
Return a pointer to the device memory.
Definition: system.cc:311
gem5::System::getGuestByteOrder
ByteOrder getGuestByteOrder() const
Get the guest byte order.
Definition: system.hh:388
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:246
gem5::System::getKvmVM
KvmVM * getKvmVM() const
Get a pointer to the Kernel Virtual Machine (KVM) SimObject, if present.
Definition: system.hh:333
gem5::KvmVM
KVM VM container.
Definition: vm.hh:301
gem5::System::_getRequestorId
RequestorID _getRequestorId(const SimObject *requestor, const std::string &requestor_name)
helper function for getRequestorId
Definition: system.cc:482
gem5::System::cacheLineSize
unsigned int cacheLineSize() const
Get the cache line size of the system.
Definition: system.hh:308
gem5::RequestPort
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition: port.hh:118
gem5::System::stripSystemName
std::string stripSystemName(const std::string &requestor_name) const
Strips off the system name from a requestor name.
Definition: system.cc:422
gem5::System::Threads::const_iterator::operator++
const_iterator & operator++()
Definition: system.hh:172
gem5::System::Threads::quiesceTick
void quiesceTick(ContextID id, Tick when)
Definition: system.cc:154
gem5::System::requestors
std::vector< RequestorInfo > requestors
This array is a per-system list of all devices capable of issuing a memory system request and an asso...
Definition: system.hh:419
gem5::System::getPhysMem
const memory::PhysicalMemory & getPhysMem() const
Definition: system.hh:343
gem5::System::Threads::empty
bool empty() const
Definition: system.hh:211
gem5::ArmISA::atomic
Bitfield< 23, 20 > atomic
Definition: misc_types.hh:122
gem5::SimObject::Params
SimObjectParams Params
Definition: sim_object.hh:170
gem5::System::redirectPaths
std::vector< RedirectPath * > redirectPaths
Definition: system.hh:612
gem5::System::Threads::threads
std::vector< Thread > threads
Definition: system.hh:130
gem5::System::_systemPort
SystemPort _systemPort
Definition: system.hh:108
gem5::System::deviceMemMap
std::unordered_map< RequestorID, std::vector< memory::AbstractMemory * > > deviceMemMap
Definition: system.hh:112
gem5::System::workItemsBegin
uint64_t workItemsBegin
Definition: system.hh:410
gem5::System::Threads::Thread::resumeEvent
Event * resumeEvent
Definition: system.hh:123
gem5::System::incWorkItemsBegin
uint64_t incWorkItemsBegin()
Called by pseudo_inst to track the number of work items started by this system.
Definition: system.hh:517
gem5::FutexMap
FutexMap class holds a map of all futexes used in the system.
Definition: futex_map.hh:109
gem5::System::maxRequestors
RequestorID maxRequestors()
Get the number of requestors registered in the system.
Definition: system.hh:495
gem5::System
Definition: system.hh:74
gem5::System::signalList
std::list< BasicSignal > signalList
Definition: system.hh:607
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
gem5::System::isMemAddr
bool isMemAddr(Addr addr) const
Check if a physical address is within a range of a memory that is part of the global address map.
Definition: system.cc:288
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::VegaISA::p
Bitfield< 54 > p
Definition: pagetable.hh:70
workload.hh
gem5::System::physmem
memory::PhysicalMemory physmem
Definition: system.hh:402
sim_object.hh
gem5::Event
Definition: eventq.hh:254
gem5::System::PARAMS
PARAMS(System)
gem5::System::systemList
static std::vector< System * > systemList
Definition: system.hh:593
gem5::X86ISA::count
count
Definition: misc.hh:710
gem5::System::Threads::operator[]
ThreadContext * operator[](ContextID id) const
Definition: system.hh:203
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:294
statistics.hh
gem5::memory::AbstractMemory
An abstract memory represents a contiguous block of physical memory, with an associated address range...
Definition: abstract_mem.hh:110
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::PCEvent
Definition: pc_event.hh:45
gem5::System::Threads::const_iterator::operator->
pointer operator->()
Definition: system.hh:185
gem5::System::getRequestorName
std::string getRequestorName(RequestorID requestor_id)
Get the name of an object for a given request id.
Definition: system.cc:526
port_proxy.hh
gem5::Workload
Definition: workload.hh:50
gem5::System::getGlobalRequestorId
RequestorID getGlobalRequestorId(const std::string &requestor_name)
Registers a GLOBAL RequestorID, which is a RequestorID not related to any particular SimObject; since...
Definition: system.cc:469
gem5::System::Threads::const_iterator::operator==
bool operator==(const const_iterator &other) const
Definition: system.hh:188
gem5::PortProxy
This object is a proxy for a port or other object which implements the functional response protocol,...
Definition: port_proxy.hh:86
port.hh
gem5::System::getMemoryMode
enums::MemoryMode getMemoryMode() const
Get the memory mode of the system.
Definition: system.hh:293
gem5::System::getRequestorId
RequestorID getRequestorId(const SimObject *requestor, std::string subrequestor={})
Request an id used to create a request object in the system.
Definition: system.cc:475
gem5::System::SystemPort
Private class for the system port which is only used as a requestor for debug access and for non-stru...
Definition: system.hh:83
gem5::System::memSize
Addr memSize() const
Amount of physical memory that exists.
Definition: system.cc:282
gem5::System::SystemPort::recvReqRetry
void recvReqRetry() override
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
Definition: system.hh:101
gem5::System::memoryMode
enums::MemoryMode memoryMode
Definition: system.hh:406
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::System::isTimingMode
bool isTimingMode() const
Is the system in timing mode?
Definition: system.hh:270
gem5::System::Threads::Thread::quiesce
void quiesce() const
Definition: system.cc:86
std::pair
STL pair class.
Definition: stl.hh:58
gem5::System::Threads::begin
const_iterator begin() const
Definition: system.hh:227
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::System::remove
bool remove(PCEvent *event) override
Definition: system.cc:258
gem5::System::maxPID
static const int maxPID
Definition: system.hh:600
gem5::System::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: system.cc:344
gem5::ArmISA::vm
Bitfield< 0 > vm
Definition: misc_types.hh:339
gem5::System::leafRequestorName
std::string leafRequestorName(const SimObject *requestor, const std::string &subrequestor)
Helper function for constructing the full (sub)requestor name by providing the root requestor and the...
Definition: system.cc:513
gem5::System::multiThread
const bool multiThread
Definition: system.hh:312
gem5::System::isDeviceMemAddr
bool isDeviceMemAddr(const PacketPtr &pkt) const
Similar to isMemAddr but for devices.
Definition: system.cc:301
gem5::System::Threads::insert
void insert(ThreadContext *tc)
Definition: system.cc:93
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::System::Threads::Thread::active
bool active
Definition: system.hh:122
pc_event.hh
gem5::System::threads
Threads threads
Definition: system.hh:310
gem5::System::ShadowRomRanges
AddrRangeList ShadowRomRanges
Definition: system.hh:404
se_signal.hh
gem5::System::init_param
uint64_t init_param
Definition: system.hh:319
gem5::System::Threads::const_iterator::pos
int pos
Definition: system.hh:156
gem5::System::Threads::thread
Thread & thread(ContextID id)
Definition: system.hh:133
gem5::System::m5opRange
const AddrRange & m5opRange() const
Range used by memory-mapped m5 pseudo-ops if enabled.
Definition: system.hh:573
physical.hh
gem5::System::Threads::Thread::name
std::string name() const
Definition: system.cc:78
gem5::ContextID
int ContextID
Globally unique thread context ID.
Definition: types.hh:239
gem5::System::SystemPort::SystemPort
SystemPort(const std::string &_name)
Create a system port with a name and an owner.
Definition: system.hh:90
gem5::System::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: system.cc:328
mem_requestor.hh
gem5::System::_m5opRange
const AddrRange _m5opRange
Range for memory-mapped m5 pseudo ops.
Definition: system.hh:561
gem5::System::printSystems
static void printSystems()
Definition: system.cc:400
gem5::System::markWorkItem
int markWorkItem(int index)
Called by pseudo_inst to mark the cpus actively executing work items.
Definition: system.hh:538
gem5::ArmISA::id
Bitfield< 33 > id
Definition: misc_types.hh:305
gem5::System::Threads::const_iterator::operator!=
bool operator!=(const const_iterator &other) const
Definition: system.hh:194
gem5::System::kvmVM
KvmVM * kvmVM
Definition: system.hh:400
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::System::replaceThreadContext
void replaceThreadContext(ThreadContext *tc, ContextID context_id)
Definition: system.cc:268
gem5::printSystems
void printSystems()
Definition: system.cc:416
gem5::RequestorID
uint16_t RequestorID
Definition: request.hh:95
symtab.hh
gem5::System::getPhysMem
memory::PhysicalMemory & getPhysMem()
Get a pointer to access the physical memory of the system.
Definition: system.hh:342
gem5::System::Threads
Definition: system.hh:116
gem5::AddrRange
The AddrRange class encapsulates an address range, and supports a number of tests to check if two ran...
Definition: addr_range.hh:81
std::list
STL list class.
Definition: stl.hh:51
gem5::System::~System
~System()
Definition: system.cc:216
gem5::System::Threads::findFree
ThreadContext * findFree()
Definition: system.cc:121
gem5::System::workItemBegin
void workItemBegin(uint32_t tid, uint32_t workid)
Definition: system.hh:545
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::System::Threads::markActive
void markActive(ContextID id)
Definition: system.hh:208
gem5::System::Threads::Thread
Definition: system.hh:119
memory_image.hh
gem5::System::Threads::numRunning
int numRunning() const
Definition: system.cc:131
gem5::PCEventScope
Definition: pc_event.hh:67
gem5::System::_cacheLineSize
const unsigned int _cacheLineSize
Definition: system.hh:408
gem5::System::Threads::const_iterator::threads
Threads const * threads
Definition: system.hh:155
gem5::Named::_name
const std::string _name
Definition: named.hh:41
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:188
gem5::ArmISA::mode
Bitfield< 4, 0 > mode
Definition: misc_types.hh:74
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
gem5::System::thermalModel
ThermalModel * thermalModel
Definition: system.hh:421
gem5::Workload::byteOrder
virtual ByteOrder byteOrder() const =0

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