gem5 v24.0.0.0
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analysis_port.hh
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1/*****************************************************************************
2
3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4 more contributor license agreements. See the NOTICE file distributed
5 with this work for additional information regarding copyright ownership.
6 Accellera licenses this file to you under the Apache License, Version 2.0
7 (the "License"); you may not use this file except in compliance with the
8 License. You may obtain a copy of the License at
9
10 http://www.apache.org/licenses/LICENSE-2.0
11
12 Unless required by applicable law or agreed to in writing, software
13 distributed under the License is distributed on an "AS IS" BASIS,
14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15 implied. See the License for the specific language governing
16 permissions and limitations under the License.
17
18 *****************************************************************************/
19
20#ifndef __SYSTEMC_EXT_TLM_CORE_1_ANALYSIS_ANALYSIS_PORT_HH__
21#define __SYSTEMC_EXT_TLM_CORE_1_ANALYSIS_ANALYSIS_PORT_HH__
22
23#include <algorithm>
24#include <deque>
25
26#include "analysis_if.hh"
27
28namespace tlm
29{
30
31template <typename T>
33 public virtual tlm_analysis_if<T>
34{
35 public:
37 tlm_analysis_port(const char *nm) : sc_core::sc_object(nm) {}
38
39 // bind and () work for both interfaces and analysis ports, since
40 // analysis ports implement the analysis interface.
41
42 virtual void
44 {
45 m_interfaces.push_back(&_if);
46 }
47
48 void operator() (tlm_analysis_if<T> &_if) { bind(_if); }
49 virtual bool
51 {
52 typename std::deque<tlm_analysis_if<T> *>::iterator i =
53 std::remove(m_interfaces.begin(), m_interfaces.end(), &_if);
54
55 if (i != m_interfaces.end()) {
56 m_interfaces.erase(i, m_interfaces.end());
57 return 1;
58 }
59 return 0;
60 }
61
62 void
63 write(const T &t)
64 {
65 typename std::deque<tlm_analysis_if<T> *>::iterator i;
66
67 for (i = m_interfaces.begin(); i != m_interfaces.end(); i++) {
68 (*i)->write(t);
69 }
70 }
71
72 private:
74};
75
76} // namespace tlm
77
78#endif /* __SYSTEMC_EXT_TLM_CORE_1_ANALYSIS_ANALYSIS_PORT_HH__ */
STL deque class.
Definition stl.hh:44
virtual void bind(tlm_analysis_if< T > &_if)
virtual bool unbind(tlm_analysis_if< T > &_if)
tlm_analysis_port(const char *nm)
void write(const T &t)
void operator()(tlm_analysis_if< T > &_if)
std::deque< tlm_analysis_if< T > * > m_interfaces

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