_seqNum | gem5::GPUDynInst | private |
_staticInst | gem5::GPUDynInst | private |
a_data | gem5::GPUDynInst | |
accessTime | gem5::GPUDynInst | private |
addr | gem5::GPUDynInst | |
allLanesZero() const | gem5::GPUDynInst | inline |
completeAcc(GPUDynInstPtr gpuDynInst) | gem5::GPUDynInst | |
computeUnit() | gem5::GPUExecContext | |
cu | gem5::GPUExecContext | protected |
cu_id | gem5::GPUDynInst | |
d_data | gem5::GPUDynInst | |
decrementStatusVector(int lane) | gem5::GPUDynInst | inline |
disassemble() const | gem5::GPUDynInst | |
doApertureCheck(const VectorMask &mask) | gem5::GPUDynInst | |
dstScalarRegOperands() const | gem5::GPUDynInst | |
dstVecRegOperands() const | gem5::GPUDynInst | |
exec_mask | gem5::GPUDynInst | |
execUnitId | gem5::GPUDynInst | |
execute(GPUDynInstPtr gpuDynInst) | gem5::GPUDynInst | |
executedAs() | gem5::GPUDynInst | |
getAccessTime() const | gem5::GPUDynInst | inline |
getLaneStatus(int lane) const | gem5::GPUDynInst | inline |
getLineAddressTime() const | gem5::GPUDynInst | inline |
getNumOperands() const | gem5::GPUDynInst | |
getRoundTripTime() const | gem5::GPUDynInst | inline |
GPUDynInst(ComputeUnit *_cu, Wavefront *_wf, GPUStaticInst *static_inst, uint64_t instSeqNum) | gem5::GPUDynInst | |
GPUExecContext(ComputeUnit *_cu, Wavefront *_wf) | gem5::GPUExecContext | |
gpuISA | gem5::GPUExecContext | protected |
hasDestinationSgpr() const | gem5::GPUDynInst | |
hasDestinationVgpr() const | gem5::GPUDynInst | |
hasSourceSgpr() const | gem5::GPUDynInst | |
hasSourceVgpr() const | gem5::GPUDynInst | |
ignoreExec() const | gem5::GPUDynInst | |
initiateAcc(GPUDynInstPtr gpuDynInst) | gem5::GPUDynInst | |
isALU() const | gem5::GPUDynInst | |
isArgLoad() const | gem5::GPUDynInst | |
isArgSeg() const | gem5::GPUDynInst | |
isAtomic() const | gem5::GPUDynInst | |
isAtomicAdd() const | gem5::GPUDynInst | |
isAtomicAnd() const | gem5::GPUDynInst | |
isAtomicCAS() const | gem5::GPUDynInst | |
isAtomicDec() const | gem5::GPUDynInst | |
isAtomicExch() const | gem5::GPUDynInst | |
isAtomicInc() const | gem5::GPUDynInst | |
isAtomicMax() const | gem5::GPUDynInst | |
isAtomicMin() const | gem5::GPUDynInst | |
isAtomicNoRet() const | gem5::GPUDynInst | |
isAtomicOr() const | gem5::GPUDynInst | |
isAtomicRet() const | gem5::GPUDynInst | |
isAtomicSub() const | gem5::GPUDynInst | |
isAtomicXor() const | gem5::GPUDynInst | |
isBarrier() const | gem5::GPUDynInst | |
isBranch() const | gem5::GPUDynInst | |
isCondBranch() const | gem5::GPUDynInst | |
isDPPInst() const | gem5::GPUDynInst | |
isEndOfKernel() const | gem5::GPUDynInst | |
isF16() const | gem5::GPUDynInst | |
isF32() const | gem5::GPUDynInst | |
isF64() const | gem5::GPUDynInst | |
isFlat() const | gem5::GPUDynInst | |
isFlatGlobal() const | gem5::GPUDynInst | |
isFlatScratch() const | gem5::GPUDynInst | |
isFMA() const | gem5::GPUDynInst | |
isGloballyCoherent() const | gem5::GPUDynInst | |
isGlobalMem() const | gem5::GPUDynInst | |
isGlobalSeg() const | gem5::GPUDynInst | |
isGroupSeg() const | gem5::GPUDynInst | |
isI8() const | gem5::GPUDynInst | |
isKernArgSeg() const | gem5::GPUDynInst | |
isKernelLaunch() const | gem5::GPUDynInst | |
isLoad() const | gem5::GPUDynInst | |
isLocalMem() const | gem5::GPUDynInst | |
isMAC() const | gem5::GPUDynInst | |
isMAD() const | gem5::GPUDynInst | |
isMemRef() const | gem5::GPUDynInst | |
isMemSync() const | gem5::GPUDynInst | |
isMFMA() const | gem5::GPUDynInst | |
isNop() const | gem5::GPUDynInst | |
isOpcode(const std::string &opcodeStr) const | gem5::GPUDynInst | |
isOpcode(const std::string &opcodeStr, const std::string &extStr) const | gem5::GPUDynInst | |
isPrivateSeg() const | gem5::GPUDynInst | |
isReadOnlySeg() const | gem5::GPUDynInst | |
isReturn() const | gem5::GPUDynInst | |
isSaveRestore | gem5::GPUDynInst | |
isScalar() const | gem5::GPUDynInst | |
isSDWAInst() const | gem5::GPUDynInst | |
isSleep() const | gem5::GPUDynInst | |
isSpecialOp() const | gem5::GPUDynInst | |
isSpillSeg() const | gem5::GPUDynInst | |
isStore() const | gem5::GPUDynInst | |
isSystemCoherent() const | gem5::GPUDynInst | |
isSystemReq() | gem5::GPUDynInst | inline |
isUnconditionalJump() const | gem5::GPUDynInst | |
isVector() const | gem5::GPUDynInst | |
isWaitcnt() const | gem5::GPUDynInst | |
kern_id | gem5::GPUDynInst | |
latency | gem5::GPUDynInst | |
lineAddressTime | gem5::GPUDynInst | private |
makeAtomicOpFunctor(c0 *reg0, c0 *reg1) | gem5::GPUDynInst | inline |
maxOperandSize() | gem5::GPUDynInst | |
maxSrcScalarRegOperandSize() | gem5::GPUDynInst | |
maxSrcScalarRegOpSize | gem5::GPUDynInst | private |
maxSrcVecRegOperandSize() | gem5::GPUDynInst | |
maxSrcVecRegOpSize | gem5::GPUDynInst | private |
memStatusVector | gem5::GPUDynInst | |
needsToken() const | gem5::GPUDynInst | |
numDstRegOperands() | gem5::GPUDynInst | |
numDstScalarDWords() | gem5::GPUDynInst | |
numDstScalarRegOperands() const | gem5::GPUDynInst | |
numDstVecDWords() | gem5::GPUDynInst | |
numDstVecRegOperands() const | gem5::GPUDynInst | |
numScalarReqs | gem5::GPUDynInst | |
numSrcRegOperands() | gem5::GPUDynInst | |
numSrcScalarDWords() | gem5::GPUDynInst | |
numSrcScalarRegOperands() const | gem5::GPUDynInst | |
numSrcVecDWords() | gem5::GPUDynInst | |
numSrcVecRegOperands() const | gem5::GPUDynInst | |
pAddr | gem5::GPUDynInst | |
pc() | gem5::GPUDynInst | |
pc(Addr _pc) | gem5::GPUDynInst | |
printStatusVector() const | gem5::GPUDynInst | inline |
profileLineAddressTime(Addr addr, Tick currentTime, int hopId) | gem5::GPUDynInst | |
profileRoundTripTime(Tick currentTime, int hopId) | gem5::GPUDynInst | |
readConstVal(int opIdx) const | gem5::GPUExecContext | inline |
readMiscReg(int opIdx) const | gem5::GPUExecContext | |
readsExec() const | gem5::GPUDynInst | |
readsExecMask() const | gem5::GPUDynInst | |
readsFlatScratch() const | gem5::GPUDynInst | |
readsMode() const | gem5::GPUDynInst | |
readsSCC() const | gem5::GPUDynInst | |
readsVCC() const | gem5::GPUDynInst | |
resetEntireStatusVector() | gem5::GPUDynInst | inline |
resetStatusVector(int lane) | gem5::GPUDynInst | inline |
resolveFlatSegment(const VectorMask &mask) | gem5::GPUDynInst | |
roundTripTime | gem5::GPUDynInst | private |
scalar_data | gem5::GPUDynInst | |
scalarAddr | gem5::GPUDynInst | |
seqNum() const | gem5::GPUDynInst | |
setAccessTime(Tick currentTime) | gem5::GPUDynInst | inline |
setRequestFlags(RequestPtr req) const | gem5::GPUDynInst | inline |
setStatusVector(int lane, int newVal) | gem5::GPUDynInst | inline |
setSystemReq() | gem5::GPUDynInst | inline |
simdId | gem5::GPUDynInst | |
srcLiteral() const | gem5::GPUDynInst | |
srcScalarRegOperands() const | gem5::GPUDynInst | |
srcVecRegOperands() const | gem5::GPUDynInst | |
staticInstruction() | gem5::GPUDynInst | inline |
StatusVector typedef | gem5::GPUDynInst | |
statusVector | gem5::GPUDynInst | |
systemReq | gem5::GPUDynInst | private |
time | gem5::GPUDynInst | |
tlbHitLevel | gem5::GPUDynInst | |
updateStats() | gem5::GPUDynInst | |
wavefront() | gem5::GPUExecContext | |
wf | gem5::GPUExecContext | protected |
wfDynId | gem5::GPUDynInst | |
wfSlotId | gem5::GPUDynInst | |
wg_id | gem5::GPUDynInst | |
writeMiscReg(int opIdx, RegVal operandVal) | gem5::GPUExecContext | |
writesExec() const | gem5::GPUDynInst | |
writesExecMask() const | gem5::GPUDynInst | |
writesFlatScratch() const | gem5::GPUDynInst | |
writesMode() const | gem5::GPUDynInst | |
writesSCC() const | gem5::GPUDynInst | |
writesVCC() const | gem5::GPUDynInst | |
x_data | gem5::GPUDynInst | |
~GPUDynInst() | gem5::GPUDynInst | |