gem5  v21.2.0.0
Classes | Macros
ide_atareg.h File Reference
#include <machine/endian.h>

Go to the source code of this file.

Classes

struct  ataparams
 

Macros

#define WDC_CFG_ATAPI_MASK   0xc000
 
#define WDC_CFG_ATAPI   0x8000
 
#define ATA_CFG_REMOVABLE   0x0080
 
#define ATA_CFG_FIXED   0x0040
 
#define ATAPI_CFG_TYPE_MASK   0x1f00
 
#define ATAPI_CFG_TYPE(x)   (((x) & ATAPI_CFG_TYPE_MASK) >> 8)
 
#define ATAPI_CFG_TYPE_DIRECT   0x00
 
#define ATAPI_CFG_TYPE_SEQUENTIAL   0x01
 
#define ATAPI_CFG_TYPE_CDROM   0x05
 
#define ATAPI_CFG_TYPE_OPTICAL   0x07
 
#define ATAPI_CFG_TYPE_NODEVICE   0x1F
 
#define ATAPI_CFG_REMOV   0x0080
 
#define ATAPI_CFG_DRQ_MASK   0x0060
 
#define ATAPI_CFG_STD_DRQ   0x0000
 
#define ATAPI_CFG_IRQ_DRQ   0x0020
 
#define ATAPI_CFG_ACCEL_DRQ   0x0040
 
#define ATAPI_CFG_CMD_MASK   0x0003
 
#define ATAPI_CFG_CMD_12   0x0000
 
#define ATAPI_CFG_CMD_16   0x0001
 
#define WDC_CAP_IORDY   0x0800
 
#define WDC_CAP_IORDY_DSBL   0x0400
 
#define WDC_CAP_LBA   0x0200
 
#define WDC_CAP_DMA   0x0100
 
#define ATA_CAP_STBY   0x2000
 
#define ATAPI_CAP_INTERL_DMA   0x8000
 
#define ATAPI_CAP_CMD_QUEUE   0x4000
 
#define ATAPI_CAP_OVERLP   0x2000
 
#define ATAPI_CAP_ATA_RST   0x1000
 
#define WDC_EXT_UDMA_MODES   0x0004
 
#define WDC_EXT_MODES   0x0002
 
#define WDC_EXT_GEOM   0x0001
 
#define WDC_MULTI_VALID   0x0100
 
#define WDC_MULTI_MASK   0x00ff
 
#define WDC_QUEUE_DEPTH_MASK   0x1f
 
#define SATA_SIGNAL_GEN1   0x0002 /* SATA Gen-1 signaling speed */
 
#define SATA_SIGNAL_GEN2   0x0004 /* SATA Gen-2 signaling speed */
 
#define SATA_NATIVE_CMDQ   0x0100 /* native command queuing */
 
#define SATA_HOST_PWR_MGMT   0x0200 /* power management (host) */
 
#define SATA_NONZERO_OFFSETS   0x0002 /* non-zero buffer offsets */
 
#define SATA_DMA_SETUP_AUTO   0x0004 /* DMA setup auto-activate */
 
#define SATA_DRIVE_PWR_MGMT   0x0008 /* power management (device) */
 
#define WDC_VER_ATA1   0x0002
 
#define WDC_VER_ATA2   0x0004
 
#define WDC_VER_ATA3   0x0008
 
#define WDC_VER_ATA4   0x0010
 
#define WDC_VER_ATA5   0x0020
 
#define WDC_VER_ATA6   0x0040
 
#define WDC_VER_ATA7   0x0080
 
#define WDC_VER_ATA8   0x0100
 
#define WDC_VER_ATA9   0x0200
 
#define WDC_VER_ATA10   0x0400
 
#define WDC_VER_ATA11   0x0800
 
#define WDC_VER_ATA12   0x1000
 
#define WDC_VER_ATA13   0x2000
 
#define WDC_VER_ATA14   0x4000
 
#define WDC_CMD1_NOP   0x4000
 
#define WDC_CMD1_RB   0x2000
 
#define WDC_CMD1_WB   0x1000
 
#define WDC_CMD1_HPA   0x0400
 
#define WDC_CMD1_DVRST   0x0200
 
#define WDC_CMD1_SRV   0x0100
 
#define WDC_CMD1_RLSE   0x0080
 
#define WDC_CMD1_AHEAD   0x0040
 
#define WDC_CMD1_CACHE   0x0020
 
#define WDC_CMD1_PKT   0x0010
 
#define WDC_CMD1_PM   0x0008
 
#define WDC_CMD1_REMOV   0x0004
 
#define WDC_CMD1_SEC   0x0002
 
#define WDC_CMD1_SMART   0x0001
 
#define ATAPI_CMD2_FCE   0x2000 /* Flush Cache Ext supported */
 
#define ATAPI_CMD2_FC   0x1000 /* Flush Cache supported */
 
#define ATAPI_CMD2_DCO   0x0800 /* Device Configuration Overlay supported */
 
#define ATAPI_CMD2_48AD   0x0400 /* 48bit address supported */
 
#define ATAPI_CMD2_AAM   0x0200 /* Automatic Acoustic Management supported */
 
#define ATAPI_CMD2_SM   0x0100 /* Set Max security extension supported */
 
#define ATAPI_CMD2_SF   0x0040 /* Set Features subcommand required */
 
#define ATAPI_CMD2_PUIS   0x0020 /* Power up in standby supported */
 
#define WDC_CMD2_RMSN   0x0010
 
#define ATA_CMD2_APM   0x0008
 
#define ATA_CMD2_CFA   0x0004
 
#define ATA_CMD2_RWQ   0x0002
 
#define WDC_CMD2_DM   0x0001 /* Download Microcode supported */
 
#define ATAPI_CMDE_MSER   0x0004 /* Media serial number supported */
 
#define ATAPI_CMDE_TEST   0x0002 /* SMART self-test supported */
 
#define ATAPI_CMDE_SLOG   0x0001 /* SMART error logging supported */
 
#define ATA_HWRES_CBLID   0x2000 /* CBLID above Vih */
 
#define ATA_HWRES_D1_PDIAG   0x0800 /* Device 1 PDIAG detect OK */
 
#define ATA_HWRES_D1_CSEL   0x0400 /* Device 1 used CSEL for address */
 
#define ATA_HWRES_D1_JUMP   0x0200 /* Device 1 jumpered to address */
 
#define ATA_HWRES_D0_SEL   0x0040 /* Device 0 responds when Dev 1 selected */
 
#define ATA_HWRES_D0_DASP   0x0020 /* Device 0 DASP detect OK */
 
#define ATA_HWRES_D0_PDIAG   0x0010 /* Device 0 PDIAG detect OK */
 
#define ATA_HWRES_D0_DIAG   0x0008 /* Device 0 diag OK */
 
#define ATA_HWRES_D0_CSEL   0x0004 /* Device 0 used CSEL for address */
 
#define ATA_HWRES_D0_JUMP   0x0002 /* Device 0 jumpered to address */
 
#define WDC_RMSN_SUPP_MASK   0x0003
 
#define WDC_RMSN_SUPP   0x0001
 
#define WDC_SEC_LEV_MAX   0x0100
 
#define WDC_SEC_ESE_SUPP   0x0020
 
#define WDC_SEC_EXP   0x0010
 
#define WDC_SEC_FROZEN   0x0008
 
#define WDC_SEC_LOCKED   0x0004
 
#define WDC_SEC_EN   0x0002
 
#define WDC_SEC_SUPP   0x0001
 
#define ATAPI_CFA_MAX_MASK   0x0FFF
 
#define ATAPI_CFA_MODE1_DIS   0x1000 /* CFA Mode 1 Disabled */
 
#define ATAPI_CFA_MODE1_REQ   0x2000 /* CFA Mode 1 Required */
 
#define ATAPI_CFA_WORD160   0x8000 /* Word 160 supported */
 

Macro Definition Documentation

◆ ATA_CAP_STBY

#define ATA_CAP_STBY   0x2000

Definition at line 111 of file ide_atareg.h.

◆ ATA_CFG_FIXED

#define ATA_CFG_FIXED   0x0040

Definition at line 74 of file ide_atareg.h.

◆ ATA_CFG_REMOVABLE

#define ATA_CFG_REMOVABLE   0x0080

Definition at line 73 of file ide_atareg.h.

◆ ATA_CMD2_APM

#define ATA_CMD2_APM   0x0008

Definition at line 217 of file ide_atareg.h.

◆ ATA_CMD2_CFA

#define ATA_CMD2_CFA   0x0004

Definition at line 218 of file ide_atareg.h.

◆ ATA_CMD2_RWQ

#define ATA_CMD2_RWQ   0x0002

Definition at line 219 of file ide_atareg.h.

◆ ATA_HWRES_CBLID

#define ATA_HWRES_CBLID   0x2000 /* CBLID above Vih */

Definition at line 244 of file ide_atareg.h.

◆ ATA_HWRES_D0_CSEL

#define ATA_HWRES_D0_CSEL   0x0004 /* Device 0 used CSEL for address */

Definition at line 252 of file ide_atareg.h.

◆ ATA_HWRES_D0_DASP

#define ATA_HWRES_D0_DASP   0x0020 /* Device 0 DASP detect OK */

Definition at line 249 of file ide_atareg.h.

◆ ATA_HWRES_D0_DIAG

#define ATA_HWRES_D0_DIAG   0x0008 /* Device 0 diag OK */

Definition at line 251 of file ide_atareg.h.

◆ ATA_HWRES_D0_JUMP

#define ATA_HWRES_D0_JUMP   0x0002 /* Device 0 jumpered to address */

Definition at line 253 of file ide_atareg.h.

◆ ATA_HWRES_D0_PDIAG

#define ATA_HWRES_D0_PDIAG   0x0010 /* Device 0 PDIAG detect OK */

Definition at line 250 of file ide_atareg.h.

◆ ATA_HWRES_D0_SEL

#define ATA_HWRES_D0_SEL   0x0040 /* Device 0 responds when Dev 1 selected */

Definition at line 248 of file ide_atareg.h.

◆ ATA_HWRES_D1_CSEL

#define ATA_HWRES_D1_CSEL   0x0400 /* Device 1 used CSEL for address */

Definition at line 246 of file ide_atareg.h.

◆ ATA_HWRES_D1_JUMP

#define ATA_HWRES_D1_JUMP   0x0200 /* Device 1 jumpered to address */

Definition at line 247 of file ide_atareg.h.

◆ ATA_HWRES_D1_PDIAG

#define ATA_HWRES_D1_PDIAG   0x0800 /* Device 1 PDIAG detect OK */

Definition at line 245 of file ide_atareg.h.

◆ ATAPI_CAP_ATA_RST

#define ATAPI_CAP_ATA_RST   0x1000

Definition at line 115 of file ide_atareg.h.

◆ ATAPI_CAP_CMD_QUEUE

#define ATAPI_CAP_CMD_QUEUE   0x4000

Definition at line 113 of file ide_atareg.h.

◆ ATAPI_CAP_INTERL_DMA

#define ATAPI_CAP_INTERL_DMA   0x8000

Definition at line 112 of file ide_atareg.h.

◆ ATAPI_CAP_OVERLP

#define ATAPI_CAP_OVERLP   0x2000

Definition at line 114 of file ide_atareg.h.

◆ ATAPI_CFA_MAX_MASK

#define ATAPI_CFA_MAX_MASK   0x0FFF

Definition at line 277 of file ide_atareg.h.

◆ ATAPI_CFA_MODE1_DIS

#define ATAPI_CFA_MODE1_DIS   0x1000 /* CFA Mode 1 Disabled */

Definition at line 278 of file ide_atareg.h.

◆ ATAPI_CFA_MODE1_REQ

#define ATAPI_CFA_MODE1_REQ   0x2000 /* CFA Mode 1 Required */

Definition at line 279 of file ide_atareg.h.

◆ ATAPI_CFA_WORD160

#define ATAPI_CFA_WORD160   0x8000 /* Word 160 supported */

Definition at line 280 of file ide_atareg.h.

◆ ATAPI_CFG_ACCEL_DRQ

#define ATAPI_CFG_ACCEL_DRQ   0x0040

Definition at line 86 of file ide_atareg.h.

◆ ATAPI_CFG_CMD_12

#define ATAPI_CFG_CMD_12   0x0000

Definition at line 88 of file ide_atareg.h.

◆ ATAPI_CFG_CMD_16

#define ATAPI_CFG_CMD_16   0x0001

Definition at line 89 of file ide_atareg.h.

◆ ATAPI_CFG_CMD_MASK

#define ATAPI_CFG_CMD_MASK   0x0003

Definition at line 87 of file ide_atareg.h.

◆ ATAPI_CFG_DRQ_MASK

#define ATAPI_CFG_DRQ_MASK   0x0060

Definition at line 83 of file ide_atareg.h.

◆ ATAPI_CFG_IRQ_DRQ

#define ATAPI_CFG_IRQ_DRQ   0x0020

Definition at line 85 of file ide_atareg.h.

◆ ATAPI_CFG_REMOV

#define ATAPI_CFG_REMOV   0x0080

Definition at line 82 of file ide_atareg.h.

◆ ATAPI_CFG_STD_DRQ

#define ATAPI_CFG_STD_DRQ   0x0000

Definition at line 84 of file ide_atareg.h.

◆ ATAPI_CFG_TYPE

#define ATAPI_CFG_TYPE (   x)    (((x) & ATAPI_CFG_TYPE_MASK) >> 8)

Definition at line 76 of file ide_atareg.h.

◆ ATAPI_CFG_TYPE_CDROM

#define ATAPI_CFG_TYPE_CDROM   0x05

Definition at line 79 of file ide_atareg.h.

◆ ATAPI_CFG_TYPE_DIRECT

#define ATAPI_CFG_TYPE_DIRECT   0x00

Definition at line 77 of file ide_atareg.h.

◆ ATAPI_CFG_TYPE_MASK

#define ATAPI_CFG_TYPE_MASK   0x1f00

Definition at line 75 of file ide_atareg.h.

◆ ATAPI_CFG_TYPE_NODEVICE

#define ATAPI_CFG_TYPE_NODEVICE   0x1F

Definition at line 81 of file ide_atareg.h.

◆ ATAPI_CFG_TYPE_OPTICAL

#define ATAPI_CFG_TYPE_OPTICAL   0x07

Definition at line 80 of file ide_atareg.h.

◆ ATAPI_CFG_TYPE_SEQUENTIAL

#define ATAPI_CFG_TYPE_SEQUENTIAL   0x01

Definition at line 78 of file ide_atareg.h.

◆ ATAPI_CMD2_48AD

#define ATAPI_CMD2_48AD   0x0400 /* 48bit address supported */

Definition at line 211 of file ide_atareg.h.

◆ ATAPI_CMD2_AAM

#define ATAPI_CMD2_AAM   0x0200 /* Automatic Acoustic Management supported */

Definition at line 212 of file ide_atareg.h.

◆ ATAPI_CMD2_DCO

#define ATAPI_CMD2_DCO   0x0800 /* Device Configuration Overlay supported */

Definition at line 210 of file ide_atareg.h.

◆ ATAPI_CMD2_FC

#define ATAPI_CMD2_FC   0x1000 /* Flush Cache supported */

Definition at line 209 of file ide_atareg.h.

◆ ATAPI_CMD2_FCE

#define ATAPI_CMD2_FCE   0x2000 /* Flush Cache Ext supported */

Definition at line 208 of file ide_atareg.h.

◆ ATAPI_CMD2_PUIS

#define ATAPI_CMD2_PUIS   0x0020 /* Power up in standby supported */

Definition at line 215 of file ide_atareg.h.

◆ ATAPI_CMD2_SF

#define ATAPI_CMD2_SF   0x0040 /* Set Features subcommand required */

Definition at line 214 of file ide_atareg.h.

◆ ATAPI_CMD2_SM

#define ATAPI_CMD2_SM   0x0100 /* Set Max security extension supported */

Definition at line 213 of file ide_atareg.h.

◆ ATAPI_CMDE_MSER

#define ATAPI_CMDE_MSER   0x0004 /* Media serial number supported */

Definition at line 222 of file ide_atareg.h.

◆ ATAPI_CMDE_SLOG

#define ATAPI_CMDE_SLOG   0x0001 /* SMART error logging supported */

Definition at line 224 of file ide_atareg.h.

◆ ATAPI_CMDE_TEST

#define ATAPI_CMDE_TEST   0x0002 /* SMART self-test supported */

Definition at line 223 of file ide_atareg.h.

◆ SATA_DMA_SETUP_AUTO

#define SATA_DMA_SETUP_AUTO   0x0004 /* DMA setup auto-activate */

Definition at line 173 of file ide_atareg.h.

◆ SATA_DRIVE_PWR_MGMT

#define SATA_DRIVE_PWR_MGMT   0x0008 /* power management (device) */

Definition at line 174 of file ide_atareg.h.

◆ SATA_HOST_PWR_MGMT

#define SATA_HOST_PWR_MGMT   0x0200 /* power management (host) */

Definition at line 169 of file ide_atareg.h.

◆ SATA_NATIVE_CMDQ

#define SATA_NATIVE_CMDQ   0x0100 /* native command queuing */

Definition at line 168 of file ide_atareg.h.

◆ SATA_NONZERO_OFFSETS

#define SATA_NONZERO_OFFSETS   0x0002 /* non-zero buffer offsets */

Definition at line 172 of file ide_atareg.h.

◆ SATA_SIGNAL_GEN1

#define SATA_SIGNAL_GEN1   0x0002 /* SATA Gen-1 signaling speed */

Definition at line 166 of file ide_atareg.h.

◆ SATA_SIGNAL_GEN2

#define SATA_SIGNAL_GEN2   0x0004 /* SATA Gen-2 signaling speed */

Definition at line 167 of file ide_atareg.h.

◆ WDC_CAP_DMA

#define WDC_CAP_DMA   0x0100

Definition at line 110 of file ide_atareg.h.

◆ WDC_CAP_IORDY

#define WDC_CAP_IORDY   0x0800

Definition at line 107 of file ide_atareg.h.

◆ WDC_CAP_IORDY_DSBL

#define WDC_CAP_IORDY_DSBL   0x0400

Definition at line 108 of file ide_atareg.h.

◆ WDC_CAP_LBA

#define WDC_CAP_LBA   0x0200

Definition at line 109 of file ide_atareg.h.

◆ WDC_CFG_ATAPI

#define WDC_CFG_ATAPI   0x8000

Definition at line 72 of file ide_atareg.h.

◆ WDC_CFG_ATAPI_MASK

#define WDC_CFG_ATAPI_MASK   0xc000

Definition at line 71 of file ide_atareg.h.

◆ WDC_CMD1_AHEAD

#define WDC_CMD1_AHEAD   0x0040

Definition at line 200 of file ide_atareg.h.

◆ WDC_CMD1_CACHE

#define WDC_CMD1_CACHE   0x0020

Definition at line 201 of file ide_atareg.h.

◆ WDC_CMD1_DVRST

#define WDC_CMD1_DVRST   0x0200

Definition at line 197 of file ide_atareg.h.

◆ WDC_CMD1_HPA

#define WDC_CMD1_HPA   0x0400

Definition at line 196 of file ide_atareg.h.

◆ WDC_CMD1_NOP

#define WDC_CMD1_NOP   0x4000

Definition at line 193 of file ide_atareg.h.

◆ WDC_CMD1_PKT

#define WDC_CMD1_PKT   0x0010

Definition at line 202 of file ide_atareg.h.

◆ WDC_CMD1_PM

#define WDC_CMD1_PM   0x0008

Definition at line 203 of file ide_atareg.h.

◆ WDC_CMD1_RB

#define WDC_CMD1_RB   0x2000

Definition at line 194 of file ide_atareg.h.

◆ WDC_CMD1_REMOV

#define WDC_CMD1_REMOV   0x0004

Definition at line 204 of file ide_atareg.h.

◆ WDC_CMD1_RLSE

#define WDC_CMD1_RLSE   0x0080

Definition at line 199 of file ide_atareg.h.

◆ WDC_CMD1_SEC

#define WDC_CMD1_SEC   0x0002

Definition at line 205 of file ide_atareg.h.

◆ WDC_CMD1_SMART

#define WDC_CMD1_SMART   0x0001

Definition at line 206 of file ide_atareg.h.

◆ WDC_CMD1_SRV

#define WDC_CMD1_SRV   0x0100

Definition at line 198 of file ide_atareg.h.

◆ WDC_CMD1_WB

#define WDC_CMD1_WB   0x1000

Definition at line 195 of file ide_atareg.h.

◆ WDC_CMD2_DM

#define WDC_CMD2_DM   0x0001 /* Download Microcode supported */

Definition at line 220 of file ide_atareg.h.

◆ WDC_CMD2_RMSN

#define WDC_CMD2_RMSN   0x0010

Definition at line 216 of file ide_atareg.h.

◆ WDC_EXT_GEOM

#define WDC_EXT_GEOM   0x0001

Definition at line 131 of file ide_atareg.h.

◆ WDC_EXT_MODES

#define WDC_EXT_MODES   0x0002

Definition at line 130 of file ide_atareg.h.

◆ WDC_EXT_UDMA_MODES

#define WDC_EXT_UDMA_MODES   0x0004

Definition at line 129 of file ide_atareg.h.

◆ WDC_MULTI_MASK

#define WDC_MULTI_MASK   0x00ff

Definition at line 140 of file ide_atareg.h.

◆ WDC_MULTI_VALID

#define WDC_MULTI_VALID   0x0100

Definition at line 139 of file ide_atareg.h.

◆ WDC_QUEUE_DEPTH_MASK

#define WDC_QUEUE_DEPTH_MASK   0x1f

Definition at line 164 of file ide_atareg.h.

◆ WDC_RMSN_SUPP

#define WDC_RMSN_SUPP   0x0001

Definition at line 266 of file ide_atareg.h.

◆ WDC_RMSN_SUPP_MASK

#define WDC_RMSN_SUPP_MASK   0x0003

Definition at line 265 of file ide_atareg.h.

◆ WDC_SEC_EN

#define WDC_SEC_EN   0x0002

Definition at line 273 of file ide_atareg.h.

◆ WDC_SEC_ESE_SUPP

#define WDC_SEC_ESE_SUPP   0x0020

Definition at line 269 of file ide_atareg.h.

◆ WDC_SEC_EXP

#define WDC_SEC_EXP   0x0010

Definition at line 270 of file ide_atareg.h.

◆ WDC_SEC_FROZEN

#define WDC_SEC_FROZEN   0x0008

Definition at line 271 of file ide_atareg.h.

◆ WDC_SEC_LEV_MAX

#define WDC_SEC_LEV_MAX   0x0100

Definition at line 268 of file ide_atareg.h.

◆ WDC_SEC_LOCKED

#define WDC_SEC_LOCKED   0x0004

Definition at line 272 of file ide_atareg.h.

◆ WDC_SEC_SUPP

#define WDC_SEC_SUPP   0x0001

Definition at line 274 of file ide_atareg.h.

◆ WDC_VER_ATA1

#define WDC_VER_ATA1   0x0002

Definition at line 177 of file ide_atareg.h.

◆ WDC_VER_ATA10

#define WDC_VER_ATA10   0x0400

Definition at line 186 of file ide_atareg.h.

◆ WDC_VER_ATA11

#define WDC_VER_ATA11   0x0800

Definition at line 187 of file ide_atareg.h.

◆ WDC_VER_ATA12

#define WDC_VER_ATA12   0x1000

Definition at line 188 of file ide_atareg.h.

◆ WDC_VER_ATA13

#define WDC_VER_ATA13   0x2000

Definition at line 189 of file ide_atareg.h.

◆ WDC_VER_ATA14

#define WDC_VER_ATA14   0x4000

Definition at line 190 of file ide_atareg.h.

◆ WDC_VER_ATA2

#define WDC_VER_ATA2   0x0004

Definition at line 178 of file ide_atareg.h.

◆ WDC_VER_ATA3

#define WDC_VER_ATA3   0x0008

Definition at line 179 of file ide_atareg.h.

◆ WDC_VER_ATA4

#define WDC_VER_ATA4   0x0010

Definition at line 180 of file ide_atareg.h.

◆ WDC_VER_ATA5

#define WDC_VER_ATA5   0x0020

Definition at line 181 of file ide_atareg.h.

◆ WDC_VER_ATA6

#define WDC_VER_ATA6   0x0040

Definition at line 182 of file ide_atareg.h.

◆ WDC_VER_ATA7

#define WDC_VER_ATA7   0x0080

Definition at line 183 of file ide_atareg.h.

◆ WDC_VER_ATA8

#define WDC_VER_ATA8   0x0100

Definition at line 184 of file ide_atareg.h.

◆ WDC_VER_ATA9

#define WDC_VER_ATA9   0x0200

Definition at line 185 of file ide_atareg.h.


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