gem5  v21.2.0.0
ide_atareg.h
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1 /* $OpenBSD: atareg.h,v 1.12 2004/09/24 07:15:22 grange Exp $ */
2 /* $NetBSD: atareg.h,v 1.5 1999/01/18 20:06:24 bouyer Exp $ */
3 
4 /*
5  * Copyright (c) 1998, 2001 Manuel Bouyer.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  * notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  * must display the following acknowledgement:
17  * This product includes software developed by Manuel Bouyer.
18  * 4. The name of the author may not be used to endorse or promote products
19  * derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #ifndef _DEV_ATA_ATAREG_H_
34 #define _DEV_ATA_ATAREG_H_
35 
36 #if defined(__linux__)
37 #include <endian.h>
38 
39 #elif defined(__sun)
40 #include <sys/isa_defs.h>
41 
42 #else
43 #include <machine/endian.h>
44 
45 #endif
46 
47 #ifdef LITTLE_ENDIAN
48 #define ATA_BYTE_ORDER LITTLE_ENDIAN
49 #elif defined(BIG_ENDIAN)
50 #define ATA_BYTE_ORDER BIG_ENDIAN
51 #elif defined(_LITTLE_ENDIAN)
52 #define ATA_BYTE_ORDER 1
53 #define LITTLE_ENDIAN 1
54 #elif defined(_BIG_ENDIAN)
55 #define ATA_BYTE_ORDER 0
56 #define LITTLE_ENDIAN 1
57 #else
58 #error "No endianess defined"
59 #endif
60 
61 /*
62  * Drive parameter structure for ATA/ATAPI.
63  * Bit fields: WDC_* : common to ATA/ATAPI
64  * ATA_* : ATA only
65  * ATAPI_* : ATAPI only.
66  */
67 struct ataparams
68 {
69  /* drive info */
70  uint16_t atap_config; /* 0: general configuration */
71 #define WDC_CFG_ATAPI_MASK 0xc000
72 #define WDC_CFG_ATAPI 0x8000
73 #define ATA_CFG_REMOVABLE 0x0080
74 #define ATA_CFG_FIXED 0x0040
75 #define ATAPI_CFG_TYPE_MASK 0x1f00
76 #define ATAPI_CFG_TYPE(x) (((x) & ATAPI_CFG_TYPE_MASK) >> 8)
77 #define ATAPI_CFG_TYPE_DIRECT 0x00
78 #define ATAPI_CFG_TYPE_SEQUENTIAL 0x01
79 #define ATAPI_CFG_TYPE_CDROM 0x05
80 #define ATAPI_CFG_TYPE_OPTICAL 0x07
81 #define ATAPI_CFG_TYPE_NODEVICE 0x1F
82 #define ATAPI_CFG_REMOV 0x0080
83 #define ATAPI_CFG_DRQ_MASK 0x0060
84 #define ATAPI_CFG_STD_DRQ 0x0000
85 #define ATAPI_CFG_IRQ_DRQ 0x0020
86 #define ATAPI_CFG_ACCEL_DRQ 0x0040
87 #define ATAPI_CFG_CMD_MASK 0x0003
88 #define ATAPI_CFG_CMD_12 0x0000
89 #define ATAPI_CFG_CMD_16 0x0001
90 /* words 1-9 are ATA only */
91  uint16_t atap_cylinders; /* 1: # of non-removable cylinders */
92  uint16_t __reserved1;
93  uint16_t atap_heads; /* 3: # of heads */
94  uint16_t __retired1[2]; /* 4-5: # of unform. bytes/track */
95  uint16_t atap_sectors; /* 6: # of sectors */
96  uint16_t __retired2[3];
97 
98  uint8_t atap_serial[20]; /* 10-19: serial number */
99  uint16_t __retired3[2];
100  uint16_t __obsolete1;
101  uint8_t atap_revision[8]; /* 23-26: firmware revision */
102  uint8_t atap_model[40]; /* 27-46: model number */
103  uint16_t atap_multi; /* 47: maximum sectors per irq (ATA) */
104  uint16_t __reserved2;
105  uint8_t atap_vendor; /* 49: vendor */
106  uint8_t atap_capabilities1; /* 49: capability flags */
107 #define WDC_CAP_IORDY 0x0800
108 #define WDC_CAP_IORDY_DSBL 0x0400
109 #define WDC_CAP_LBA 0x0200
110 #define WDC_CAP_DMA 0x0100
111 #define ATA_CAP_STBY 0x2000
112 #define ATAPI_CAP_INTERL_DMA 0x8000
113 #define ATAPI_CAP_CMD_QUEUE 0x4000
114 #define ATAPI_CAP_OVERLP 0x2000
115 #define ATAPI_CAP_ATA_RST 0x1000
116  uint16_t atap_capabilities2; /* 50: capability flags (ATA) */
117 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
118  uint8_t __junk2;
119  uint8_t atap_oldpiotiming; /* 51: old PIO timing mode */
120  uint8_t __junk3;
121  uint8_t atap_olddmatiming; /* 52: old DMA timing mode (ATA) */
122 #else
123  uint8_t atap_oldpiotiming; /* 51: old PIO timing mode */
124  uint8_t __junk2;
125  uint8_t atap_olddmatiming; /* 52: old DMA timing mode (ATA) */
126  uint8_t __junk3;
127 #endif
128  uint16_t atap_extensions; /* 53: extensions supported */
129 #define WDC_EXT_UDMA_MODES 0x0004
130 #define WDC_EXT_MODES 0x0002
131 #define WDC_EXT_GEOM 0x0001
132 /* words 54-62 are ATA only */
133  uint16_t atap_curcylinders; /* 54: current logical cylinders */
134  uint16_t atap_curheads; /* 55: current logical heads */
135  uint16_t atap_cursectors; /* 56: current logical sectors/tracks */
136  uint16_t atap_curcapacity[2]; /* 57-58: current capacity */
137  uint8_t atap_curmulti; /* 59: current multi-sector setting */
138  uint8_t atap_curmulti_valid; /* 59: current multi-sector setting */
139 #define WDC_MULTI_VALID 0x0100
140 #define WDC_MULTI_MASK 0x00ff
141  uint32_t atap_capacity; /* 60-61: total capacity (LBA only) */
142  uint16_t __retired4;
143 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
144  uint8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */
145  uint8_t atap_dmamode_act; /* multiword DMA mode active */
146  uint8_t atap_piomode_supp; /* 64: PIO mode supported */
147  uint8_t __junk4;
148 #else
149  uint8_t atap_dmamode_act; /* multiword DMA mode active */
150  uint8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */
151  uint8_t __junk4;
152  uint8_t atap_piomode_supp; /* 64: PIO mode supported */
153 #endif
154  uint16_t atap_dmatiming_mimi; /* 65: minimum DMA cycle time */
155  uint16_t atap_dmatiming_recom; /* 66: recommended DMA cycle time */
156  uint16_t atap_piotiming; /* 67: mini PIO cycle time without FC */
157  uint16_t atap_piotiming_iordy; /* 68: mini PIO cycle time with IORDY FC */
158  uint16_t __reserved3[2];
159 /* words 71-72 are ATAPI only */
160  uint16_t atap_pkt_br; /* 71: time (ns) to bus release */
161  uint16_t atap_pkt_bsyclr; /* 72: tme to clear BSY after service */
162  uint16_t __reserved4[2];
163  uint16_t atap_queuedepth; /* 75: */
164 #define WDC_QUEUE_DEPTH_MASK 0x1f
165  uint16_t atap_sata_caps; /* 76: SATA capabilities */
166 #define SATA_SIGNAL_GEN1 0x0002 /* SATA Gen-1 signaling speed */
167 #define SATA_SIGNAL_GEN2 0x0004 /* SATA Gen-2 signaling speed */
168 #define SATA_NATIVE_CMDQ 0x0100 /* native command queuing */
169 #define SATA_HOST_PWR_MGMT 0x0200 /* power management (host) */
170  uint16_t atap_sata_reserved; /* 77: reserved */
171  uint16_t atap_sata_features_supp;/* 78: SATA features supported */
172 #define SATA_NONZERO_OFFSETS 0x0002 /* non-zero buffer offsets */
173 #define SATA_DMA_SETUP_AUTO 0x0004 /* DMA setup auto-activate */
174 #define SATA_DRIVE_PWR_MGMT 0x0008 /* power management (device) */
175  uint16_t atap_sata_features_en; /* 79: SATA features enabled */
176  uint16_t atap_ata_major; /* 80: Major version number */
177 #define WDC_VER_ATA1 0x0002
178 #define WDC_VER_ATA2 0x0004
179 #define WDC_VER_ATA3 0x0008
180 #define WDC_VER_ATA4 0x0010
181 #define WDC_VER_ATA5 0x0020
182 #define WDC_VER_ATA6 0x0040
183 #define WDC_VER_ATA7 0x0080
184 #define WDC_VER_ATA8 0x0100
185 #define WDC_VER_ATA9 0x0200
186 #define WDC_VER_ATA10 0x0400
187 #define WDC_VER_ATA11 0x0800
188 #define WDC_VER_ATA12 0x1000
189 #define WDC_VER_ATA13 0x2000
190 #define WDC_VER_ATA14 0x4000
191  uint16_t atap_ata_minor; /* 81: Minor version number */
192  uint16_t atap_cmd_set1; /* 82: command set supported */
193 #define WDC_CMD1_NOP 0x4000
194 #define WDC_CMD1_RB 0x2000
195 #define WDC_CMD1_WB 0x1000
196 #define WDC_CMD1_HPA 0x0400
197 #define WDC_CMD1_DVRST 0x0200
198 #define WDC_CMD1_SRV 0x0100
199 #define WDC_CMD1_RLSE 0x0080
200 #define WDC_CMD1_AHEAD 0x0040
201 #define WDC_CMD1_CACHE 0x0020
202 #define WDC_CMD1_PKT 0x0010
203 #define WDC_CMD1_PM 0x0008
204 #define WDC_CMD1_REMOV 0x0004
205 #define WDC_CMD1_SEC 0x0002
206 #define WDC_CMD1_SMART 0x0001
207  uint16_t atap_cmd_set2; /* 83: command set supported */
208 #define ATAPI_CMD2_FCE 0x2000 /* Flush Cache Ext supported */
209 #define ATAPI_CMD2_FC 0x1000 /* Flush Cache supported */
210 #define ATAPI_CMD2_DCO 0x0800 /* Device Configuration Overlay supported */
211 #define ATAPI_CMD2_48AD 0x0400 /* 48bit address supported */
212 #define ATAPI_CMD2_AAM 0x0200 /* Automatic Acoustic Management supported */
213 #define ATAPI_CMD2_SM 0x0100 /* Set Max security extension supported */
214 #define ATAPI_CMD2_SF 0x0040 /* Set Features subcommand required */
215 #define ATAPI_CMD2_PUIS 0x0020 /* Power up in standby supported */
216 #define WDC_CMD2_RMSN 0x0010
217 #define ATA_CMD2_APM 0x0008
218 #define ATA_CMD2_CFA 0x0004
219 #define ATA_CMD2_RWQ 0x0002
220 #define WDC_CMD2_DM 0x0001 /* Download Microcode supported */
221  uint16_t atap_cmd_ext; /* 84: command/features supp. ext. */
222 #define ATAPI_CMDE_MSER 0x0004 /* Media serial number supported */
223 #define ATAPI_CMDE_TEST 0x0002 /* SMART self-test supported */
224 #define ATAPI_CMDE_SLOG 0x0001 /* SMART error logging supported */
225  uint16_t atap_cmd1_en; /* 85: cmd/features enabled */
226 /* bits are the same as atap_cmd_set1 */
227  uint16_t atap_cmd2_en; /* 86: cmd/features enabled */
228 /* bits are the same as atap_cmd_set2 */
229  uint16_t atap_cmd_def; /* 87: cmd/features default */
230 /* bits are NOT the same as atap_cmd_ext */
231 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
232  uint8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */
233  uint8_t atap_udmamode_act; /* Ultra-DMA mode active */
234 #else
235  uint8_t atap_udmamode_act; /* Ultra-DMA mode active */
236  uint8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */
237 #endif
238 /* 89-92 are ATA-only */
239  uint16_t atap_seu_time; /* 89: Sec. Erase Unit compl. time */
240  uint16_t atap_eseu_time; /* 90: Enhanced SEU compl. time */
241  uint16_t atap_apm_val; /* 91: current APM value */
242  uint16_t atap_mpasswd_rev; /* 92: Master Password revision */
243  uint16_t atap_hwreset_res; /* 93: Hardware reset value */
244 #define ATA_HWRES_CBLID 0x2000 /* CBLID above Vih */
245 #define ATA_HWRES_D1_PDIAG 0x0800 /* Device 1 PDIAG detect OK */
246 #define ATA_HWRES_D1_CSEL 0x0400 /* Device 1 used CSEL for address */
247 #define ATA_HWRES_D1_JUMP 0x0200 /* Device 1 jumpered to address */
248 #define ATA_HWRES_D0_SEL 0x0040 /* Device 0 responds when Dev 1 selected */
249 #define ATA_HWRES_D0_DASP 0x0020 /* Device 0 DASP detect OK */
250 #define ATA_HWRES_D0_PDIAG 0x0010 /* Device 0 PDIAG detect OK */
251 #define ATA_HWRES_D0_DIAG 0x0008 /* Device 0 diag OK */
252 #define ATA_HWRES_D0_CSEL 0x0004 /* Device 0 used CSEL for address */
253 #define ATA_HWRES_D0_JUMP 0x0002 /* Device 0 jumpered to address */
254 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
255  uint8_t atap_acoustic_val; /* 94: Current acoustic level */
256  uint8_t atap_acoustic_def; /* recommended level */
257 #else
258  uint8_t atap_acoustic_def; /* recommended level */
259  uint8_t atap_acoustic_val; /* 94: Current acoustic level */
260 #endif
261  uint16_t __reserved6[5]; /* 95-99: reserved */
262  uint16_t atap_max_lba[4]; /* 100-103: Max. user LBA add */
263  uint16_t __reserved7[23]; /* 104-126: reserved */
264  uint16_t atap_rmsn_supp; /* 127: remov. media status notif. */
265 #define WDC_RMSN_SUPP_MASK 0x0003
266 #define WDC_RMSN_SUPP 0x0001
267  uint16_t atap_sec_st; /* 128: security status */
268 #define WDC_SEC_LEV_MAX 0x0100
269 #define WDC_SEC_ESE_SUPP 0x0020
270 #define WDC_SEC_EXP 0x0010
271 #define WDC_SEC_FROZEN 0x0008
272 #define WDC_SEC_LOCKED 0x0004
273 #define WDC_SEC_EN 0x0002
274 #define WDC_SEC_SUPP 0x0001
275  uint16_t __reserved8[31]; /* 129-159: vendor specific */
276  uint16_t atap_cfa_power; /* 160: CFA powermode */
277 #define ATAPI_CFA_MAX_MASK 0x0FFF
278 #define ATAPI_CFA_MODE1_DIS 0x1000 /* CFA Mode 1 Disabled */
279 #define ATAPI_CFA_MODE1_REQ 0x2000 /* CFA Mode 1 Required */
280 #define ATAPI_CFA_WORD160 0x8000 /* Word 160 supported */
281  uint16_t __reserved9[15]; /* 161-175: reserved for CFA */
282  uint8_t atap_media_serial[60]; /* 176-205: media serial number */
283  uint16_t __reserved10[49]; /* 206-254: reserved */
284 #if ATA_BYTE_ORDER == LITTLE_ENDIAN
285  uint8_t atap_signature; /* 255: Signature */
286  uint8_t atap_checksum; /* Checksum */
287 #else
288  uint8_t atap_checksum; /* Checksum */
289  uint8_t atap_signature; /* 255: Signature */
290 #endif
291 };
292 
293 #undef ATA_BYTE_ORDER
294 #endif /* !_DEV_ATA_ATAREG_H_ */
ataparams::atap_pkt_br
uint16_t atap_pkt_br
Definition: ide_atareg.h:160
ataparams::__obsolete1
uint16_t __obsolete1
Definition: ide_atareg.h:100
ataparams::atap_dmatiming_recom
uint16_t atap_dmatiming_recom
Definition: ide_atareg.h:155
ataparams::atap_acoustic_def
uint8_t atap_acoustic_def
Definition: ide_atareg.h:256
ataparams::atap_piotiming
uint16_t atap_piotiming
Definition: ide_atareg.h:156
ataparams::atap_ata_major
uint16_t atap_ata_major
Definition: ide_atareg.h:176
ataparams::atap_cmd_set2
uint16_t atap_cmd_set2
Definition: ide_atareg.h:207
ataparams::atap_dmamode_act
uint8_t atap_dmamode_act
Definition: ide_atareg.h:145
ataparams::__junk4
uint8_t __junk4
Definition: ide_atareg.h:147
ataparams::atap_curcapacity
uint16_t atap_curcapacity[2]
Definition: ide_atareg.h:136
ataparams::__reserved10
uint16_t __reserved10[49]
Definition: ide_atareg.h:283
ataparams::atap_udmamode_act
uint8_t atap_udmamode_act
Definition: ide_atareg.h:233
ataparams::atap_capabilities2
uint16_t atap_capabilities2
Definition: ide_atareg.h:116
ataparams::atap_cylinders
uint16_t atap_cylinders
Definition: ide_atareg.h:91
ataparams::atap_rmsn_supp
uint16_t atap_rmsn_supp
Definition: ide_atareg.h:264
ataparams::atap_dmatiming_mimi
uint16_t atap_dmatiming_mimi
Definition: ide_atareg.h:154
ataparams::__reserved2
uint16_t __reserved2
Definition: ide_atareg.h:104
ataparams::__reserved9
uint16_t __reserved9[15]
Definition: ide_atareg.h:281
ataparams::__retired2
uint16_t __retired2[3]
Definition: ide_atareg.h:96
ataparams::atap_checksum
uint8_t atap_checksum
Definition: ide_atareg.h:286
ataparams::__retired4
uint16_t __retired4
Definition: ide_atareg.h:142
ataparams::__reserved8
uint16_t __reserved8[31]
Definition: ide_atareg.h:275
ataparams::__reserved4
uint16_t __reserved4[2]
Definition: ide_atareg.h:162
ataparams::atap_mpasswd_rev
uint16_t atap_mpasswd_rev
Definition: ide_atareg.h:242
ataparams::atap_cmd1_en
uint16_t atap_cmd1_en
Definition: ide_atareg.h:225
ataparams::atap_cfa_power
uint16_t atap_cfa_power
Definition: ide_atareg.h:276
ataparams::__reserved7
uint16_t __reserved7[23]
Definition: ide_atareg.h:263
ataparams::__reserved1
uint16_t __reserved1
Definition: ide_atareg.h:92
ataparams::atap_cmd_set1
uint16_t atap_cmd_set1
Definition: ide_atareg.h:192
ataparams::atap_capacity
uint32_t atap_capacity
Definition: ide_atareg.h:141
ataparams::atap_piotiming_iordy
uint16_t atap_piotiming_iordy
Definition: ide_atareg.h:157
ataparams::atap_sata_reserved
uint16_t atap_sata_reserved
Definition: ide_atareg.h:170
ataparams::atap_sata_caps
uint16_t atap_sata_caps
Definition: ide_atareg.h:165
ataparams::__retired3
uint16_t __retired3[2]
Definition: ide_atareg.h:99
ataparams::atap_dmamode_supp
uint8_t atap_dmamode_supp
Definition: ide_atareg.h:144
ataparams::__reserved6
uint16_t __reserved6[5]
Definition: ide_atareg.h:261
ataparams::atap_seu_time
uint16_t atap_seu_time
Definition: ide_atareg.h:239
ataparams::__retired1
uint16_t __retired1[2]
Definition: ide_atareg.h:94
ataparams::atap_vendor
uint8_t atap_vendor
Definition: ide_atareg.h:105
ataparams::atap_sec_st
uint16_t atap_sec_st
Definition: ide_atareg.h:267
ataparams
Definition: ide_atareg.h:67
ataparams::atap_serial
uint8_t atap_serial[20]
Definition: ide_atareg.h:98
ataparams::atap_max_lba
uint16_t atap_max_lba[4]
Definition: ide_atareg.h:262
ataparams::atap_heads
uint16_t atap_heads
Definition: ide_atareg.h:93
ataparams::atap_revision
uint8_t atap_revision[8]
Definition: ide_atareg.h:101
ataparams::atap_oldpiotiming
uint8_t atap_oldpiotiming
Definition: ide_atareg.h:119
ataparams::atap_piomode_supp
uint8_t atap_piomode_supp
Definition: ide_atareg.h:146
ataparams::atap_curcylinders
uint16_t atap_curcylinders
Definition: ide_atareg.h:133
ataparams::atap_extensions
uint16_t atap_extensions
Definition: ide_atareg.h:128
ataparams::atap_queuedepth
uint16_t atap_queuedepth
Definition: ide_atareg.h:163
ataparams::atap_config
uint16_t atap_config
Definition: ide_atareg.h:70
ataparams::atap_cursectors
uint16_t atap_cursectors
Definition: ide_atareg.h:135
ataparams::atap_sata_features_en
uint16_t atap_sata_features_en
Definition: ide_atareg.h:175
ataparams::__reserved3
uint16_t __reserved3[2]
Definition: ide_atareg.h:158
ataparams::atap_cmd_ext
uint16_t atap_cmd_ext
Definition: ide_atareg.h:221
ataparams::atap_signature
uint8_t atap_signature
Definition: ide_atareg.h:285
ataparams::atap_eseu_time
uint16_t atap_eseu_time
Definition: ide_atareg.h:240
ataparams::atap_capabilities1
uint8_t atap_capabilities1
Definition: ide_atareg.h:106
ataparams::atap_ata_minor
uint16_t atap_ata_minor
Definition: ide_atareg.h:191
ataparams::atap_sata_features_supp
uint16_t atap_sata_features_supp
Definition: ide_atareg.h:171
ataparams::atap_media_serial
uint8_t atap_media_serial[60]
Definition: ide_atareg.h:282
ataparams::atap_cmd2_en
uint16_t atap_cmd2_en
Definition: ide_atareg.h:227
ataparams::atap_curmulti
uint8_t atap_curmulti
Definition: ide_atareg.h:137
ataparams::__junk3
uint8_t __junk3
Definition: ide_atareg.h:120
ataparams::atap_hwreset_res
uint16_t atap_hwreset_res
Definition: ide_atareg.h:243
ataparams::atap_acoustic_val
uint8_t atap_acoustic_val
Definition: ide_atareg.h:255
ataparams::atap_cmd_def
uint16_t atap_cmd_def
Definition: ide_atareg.h:229
ataparams::atap_multi
uint16_t atap_multi
Definition: ide_atareg.h:103
ataparams::atap_pkt_bsyclr
uint16_t atap_pkt_bsyclr
Definition: ide_atareg.h:161
ataparams::atap_model
uint8_t atap_model[40]
Definition: ide_atareg.h:102
ataparams::atap_apm_val
uint16_t atap_apm_val
Definition: ide_atareg.h:241
ataparams::atap_olddmatiming
uint8_t atap_olddmatiming
Definition: ide_atareg.h:121
ataparams::atap_curmulti_valid
uint8_t atap_curmulti_valid
Definition: ide_atareg.h:138
ataparams::atap_sectors
uint16_t atap_sectors
Definition: ide_atareg.h:95
ataparams::atap_udmamode_supp
uint8_t atap_udmamode_supp
Definition: ide_atareg.h:232
ataparams::__junk2
uint8_t __junk2
Definition: ide_atareg.h:118
ataparams::atap_curheads
uint16_t atap_curheads
Definition: ide_atareg.h:134

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