- b -

b : arr_struct2 , Block , tlm::tlm_bool< D >
ba : PowerISA::CondLogicOp
backdoor : AbstractMemory
backdoorMap : sc_gem5::Gem5ToTlmBridge< BITWIDTH >
backendLatency : DRAMCtrl
backingStore : PhysicalMemory
badScore : BOPPrefetcher
badvaddr : MipsISA::RemoteGDB::MipsGdbRegCache
bandwidth : GoodbyeObject , SimpleMemory
bank : DRAMCtrl::Bank , DRAMCtrl::Command , DRAMCtrl::DRAMPacket
bankBits : BankedArray , DramGen
bankConflictPenalty : LdsState
bankedRegs : GicV2
bankgr : DRAMCtrl::Bank
bankGroupArch : DRAMCtrl
bankGroupsPerRank : DRAMCtrl
bankId : DRAMCtrl::DRAMPacket
bankRef : DRAMCtrl::DRAMPacket
banks : BankedArray , DRAMCtrl::Rank , LdsState
banksPerRank : DRAMCtrl
bankType : MipsISA::ISA
BAR0_SIZE_BASE : PciVirtIO
BARAddrs : PciDevice
barCnt : Wavefront
barrier : BaseGlobalEvent
barrier_id : ComputeUnit
barrierCnt : Wavefront
barrierEvent : BaseGlobalEvent
barrierId : Wavefront
barrierSlots : Wavefront
BARSize : PciDevice
base : ArmFreebsdProcessBits::SyscallTable , ArmISA::Memory64 , ArmISA::Memory , ArmISA::RfeOp , ArmISA::SveContigMemSI , ArmISA::SveContigMemSS , ArmISA::SveIndexedMemSV< RegElemType, MemElemType, MicroopType, FirstFaultWritebackMicroopType > , ArmISA::SveIndexedMemVI< RegElemType, MemElemType, MicroopType, FirstFaultWritebackMicroopType > , ArmISA::SveLdStructSI< Element, MicroopLdMemType, MicroopDeIntrlvType > , ArmISA::SveLdStructSS< Element, MicroopLdMemType, MicroopDeIntrlvType > , ArmISA::SveMemPredFillSpill , ArmISA::SveMemVecFillSpill , ArmISA::SveStStructSI< Element, MicroopStMemType, MicroopIntrlvType > , ArmISA::SveStStructSS< Element, MicroopStMemType, MicroopIntrlvType > , ArmISA::SysDC64 , ArmLinuxProcessBits::SyscallTable , Brig::BrigDirectiveArgBlockEnd , Brig::BrigDirectiveArgBlockStart , Brig::BrigDirectiveComment , Brig::BrigDirectiveControl , Brig::BrigDirectiveExecutable , Brig::BrigDirectiveExtension , Brig::BrigDirectiveFbarrier , Brig::BrigDirectiveLabel , Brig::BrigDirectiveLoc , Brig::BrigDirectiveModule , Brig::BrigDirectiveNone , Brig::BrigDirectivePragma , Brig::BrigDirectiveVariable , Brig::BrigInstAddr , Brig::BrigInstAtomic , Brig::BrigInstBase , Brig::BrigInstBasic , Brig::BrigInstBr , Brig::BrigInstCmp , Brig::BrigInstCvt , Brig::BrigInstImage , Brig::BrigInstLane , Brig::BrigInstMem , Brig::BrigInstMemFence , Brig::BrigInstMod , Brig::BrigInstQueryImage , Brig::BrigInstQuerySampler , Brig::BrigInstQueue , Brig::BrigInstSeg , Brig::BrigInstSegCvt , Brig::BrigInstSignal , Brig::BrigInstSourceType , Brig::BrigOperandAddress , Brig::BrigOperandAlign , Brig::BrigOperandCodeList , Brig::BrigOperandCodeRef , Brig::BrigOperandConstantBytes , Brig::BrigOperandConstantImage , Brig::BrigOperandConstantOperandList , Brig::BrigOperandConstantSampler , Brig::BrigOperandOperandList , Brig::BrigOperandRegister , Brig::BrigOperandString , Brig::BrigOperandWavesize , cp::Format , EmbeddedPyBind , MemoryImage::Segment , TimeBuffer< T > , X86ISA::EmulEnv , X86ISA::I386Process::VSyscallPage , X86ISA::MemOp , X86ISA::X86_64Process::VSyscallPage
base_addr : UserDesc64
baseAddr : BOPPrefetcher::DelayQueueEntry , IndirectMemoryPrefetcher::IndirectPatternDetectorEntry , IndirectMemoryPrefetcher::PrefetchTableEntry , PCIConfig
baseaddr : Pl111
baseAddr : PrdEntry , UFSHostDevice::UFSHCDSGEntry
baseAddr1 : MemTest
baseAddr2 : MemTest
baseCpu : ThreadState
baseEntries : X86ISA::IntelMP::ConfigTable
baseFilename : CheckpointIn
baseIsSP : ArmISA::Memory64 , ArmISA::SveContigMemSI , ArmISA::SveContigMemSS , ArmISA::SveMemPredFillSpill , ArmISA::SveMemVecFillSpill
basename : MathExprPowerModel
basePC : X86ISA::Decoder
basePtr : Wavefront
BASER_ESZ : Gicv3Its
BASER_INDIRECT : Gicv3Its
BASER_SZ : Gicv3Its
BASER_TYPE : Gicv3Its
BASER_WMASK : Gicv3Its
BASER_WMASK_UNIMPL : Gicv3Its
basicBlocks : ControlFlowInfo
bb : PowerISA::CondLogicOp
bbMap : SimPoint
bc : GPUDynInst
bcd : Intel8254Timer , Pl111
bCond : Barrier
bdelayDoneSeqNum : DefaultDecode< Impl >
bebo : Pl111
bebuf_size : tlm::tlm_endian_context
bepo : Pl111
bestOffset : BOPPrefetcher
bestSandbox : SBOOEPrefetcher
bestScore : BOPPrefetcher
bf : PowerISA::CondMoveOp
bfa : PowerISA::CondMoveOp
bgr : Pl111
bi : PowerISA::BranchCond
bias : StatisticalCorrector
bias0 : MultiperspectivePerceptron
bias1 : MultiperspectivePerceptron
biasBank : StatisticalCorrector
biasmostly0 : MultiperspectivePerceptron
biasmostly1 : MultiperspectivePerceptron
biasSK : StatisticalCorrector
big_endian : HDLcd
bigendian : VncInput::PixelFormat
bigPkt : TimingSimpleCPU::SplitFragmentSenderState
bigThumb : ArmISA::Decoder
bimodalAltMatchProviderCorrect : TAGEBase
bimodalAltMatchProviderWrong : TAGEBase
bimodalIndex : TAGEBase::BranchInfo
binary : MathExpr::OpSearch
bindingIndex : sc_gem5::Module
bindings : sc_gem5::Port
bindToLoopback : ListenSocket
bist : PCIConfig
BitCount : BmpWriter::InfoHeaderV1
bitmask : WaiterState
bits : DictionaryCompressor< T >::MaskedPattern< mask > , ImmOperand< T > , MSIXPbaEntry , Set
blank_space : cp::Format
bldrev : aout_exechdr
blk : CacheBlkPrintWrapper
blkAddr : MSHR::TargetList , QueueEntry
blkMask : BaseTags
blks : BaseSetAssoc , CompressedTags , FALRU , SectorBlk , SectorTags
blkSize : AccessMapPatternMatching , BaseCache , BaseCacheCompressor , BasePrefetcher , BaseTags , FALRU::CacheTracking , MSHR::TargetList , QueueEntry , SuperBlk , UFSHostDevice::UFSSCSIDevice
block : FlashDevice::PageMapEntry
blockAddrMask : MemTest
blockBits : DramGen
blocked : BaseCache , BaseCache::CacheSlavePort , Minor::Decode::DecodeThreadInfo , Minor::Fetch1::Fetch1ThreadInfo , Minor::Fetch2::Fetch2ThreadInfo , SimpleCache , SimpleMemobj
blocked_causes : BaseCache::CacheStats
blocked_cycles : BaseCache::CacheStats
blockedCycle : BaseCache
blockedMemInsts : InstructionQueue< Impl >
blockedPacket : SimpleCache::CPUSidePort , SimpleCache::MemSidePort , SimpleMemobj::CPUSidePort , SimpleMemobj::MemSidePort
blockedWaitingResp : BaseTrafficGen
blockEmptyEntries : FlashDevice
blockingRequest : sc_gem5::Gem5ToTlmBridge< BITWIDTH >
blockingResponse : sc_gem5::Gem5ToTlmBridge< BITWIDTH >
blockSize : FlashDevice , MemTest , MultiperspectivePerceptron , SimpleCache
blocksize : StochasticGen , TraceCPU::FixedRetryGen::TraceElement , TraceGen::TraceElement
blockSizeBits : GarnetSyntheticTraffic
blocksPerDisk : FlashDevice
blockThisCycle : DefaultRename< Impl >
blockValidEntries : FlashDevice
blue : BmpWriter::BmpPixel32 , Pixel , PngWriter::PngPixel24 , rgb_t
blue_select : HDLcd
bluemax : VncInput::PixelFormat
blueshift : VncInput::PixelFormat
blurrypath_bits : MultiperspectivePerceptron
blurrypath_histories : MultiperspectivePerceptron::ThreadData
bmEnabled : IdeController
bmiAddr : IdeController
bmiSize : IdeController
bmp : Pl111 , sc_gem5::TlmToGem5Bridge< BITWIDTH >
bMutex : Barrier
bo : PowerISA::BranchCond
bootldr : ArmSystem
bootloader : BareMetalRiscvSystem
bootLoaders : ArmSystem
bootReleaseAddr : FreebsdArmSystem
bottomDW : X86ISA::I82094AA
bottomReserved : X86ISA::I82094AA
boundaries : FALRU::CacheTracking
box_tick_cnt : Shader
bpHistory : BPredUnit::PredictorHistory
bpp : VncInput::PixelFormat
bps : Iris::ThreadContext
bpSpaceId : FastModel::CortexA76TC
branchAddr : TimeBufStruct< Impl >::decodeComm
branchCount : TimeBufStruct< Impl >::decodeComm
branchInp : Minor::Fetch2
branchMispredict : DefaultIEWDefaultCommit< Impl > , TimeBufStruct< Impl >::decodeComm
branchMispredicts : DefaultCommit< Impl > , DefaultIEW< Impl >
branchPC : TAGEBase::BranchInfo
branchPred : BaseSimpleCPU , DefaultFetch< Impl >
branchPredictor : Minor::Fetch2
branchRate : DefaultFetch< Impl >
branchTaken : DefaultIEWDefaultCommit< Impl > , TimeBufStruct< Impl >::commitComm , TimeBufStruct< Impl >::decodeComm
brar : dp_regs
brdr : dp_regs
breakpointEventStreamId : Iris::ThreadContext
bridge : Bridge::BridgeMasterPort , Bridge::BridgeSlavePort , sc_gem5::Gem5ToTlmBridge< BITWIDTH >::BridgeSlavePort , sc_gem5::TlmToGem5Bridge< BITWIDTH >::BridgeMasterPort
brigInstBase : HsailISA::MachInst
brigMajor : Brig::BrigModuleHeader
brigMinor : Brig::BrigModuleHeader
brigObj : HsailISA::MachInst
brigSymbol : StorageElement
bsize : aout_exechdr , ecoff_aouthdr
bsp : sc_gem5::Gem5ToTlmBridge< BITWIDTH >
bss_start : aout_exechdr , ecoff_aouthdr
bt : PowerISA::CondLogicOp , TIR
btableHysteresis : TAGEBase
btablePrediction : TAGEBase
BTB : BPredUnit
btb : DefaultBTB
BTBCorrect : BPredUnit
BTBHitPct : BPredUnit
BTBHits : BPredUnit
BTBLookups : BPredUnit
btp : BIPRP , BRRIPRP
bubbleFlag : Minor::ForwardLineData
bubbleInst : Minor::MinorDynInst
bucket_size : Stats::DistData , Stats::DistStor , Stats::DistStor::Params , Stats::HistStor
buckets : Stats::DistStor::Params , Stats::HistStor::Params
budgetbits : MultiperspectivePerceptron
buf : Fifo< T > , iGbReg::RxDesc , sc_gem5::UniqueNameGen , Trace::InstPBTrace , Trace::TarmacParserRecord
buff_per_vc : FaultModel::system_conf
buffer : DmaReadFifo , EtherTapBase , GoodbyeObject , Minor::Latch< Data > , TimeBuffer< T >::wire , tlm::tlm_fifo< T > , UFSHostDevice::transferInfo , VPtr< T >
buffer_size : Pl111
buffer_used : EtherTapStub
bufferram : AlphaLinux::tgt_sysinfo , ArmLinux32::tgt_sysinfo , ArmLinux64::tgt_sysinfo , MipsLinux::tgt_sysinfo , RiscvLinux32::tgt_sysinfo , RiscvLinux64::tgt_sysinfo , Sparc32Linux::tgt_sysinfo , SparcLinux::tgt_sysinfo , X86Linux32::tgt_sysinfo , X86Linux64::tgt_sysinfo
bufferSize : GoodbyeObject , TAGEBase::FoldedHistory
bufferUsed : GoodbyeObject
buflen : EtherTapBase
bufLength : EthPacketData
bufPtr : BaseBufferArg
bufptr : ns_desc32 , ns_desc64
bufSize : Trace::InstPBTrace
burst_len : HDLcd
burstCount : DRAMCtrl::BurstHelper
burstHelper : DRAMCtrl::DRAMPacket
burstLength : DRAMCtrl
burstSize : DRAMCtrl
burstsServiced : DRAMCtrl::BurstHelper
bus : PciBusAddr
bus_options : HDLcd
BUS_OPTIONS_RESETV : HDLcd
busAddr : PciHost::DeviceInterface
busID : X86ISA::IntelMP::AddrSpaceMapping , X86ISA::IntelMP::Bus , X86ISA::IntelMP::BusHierarchy , X86ISA::IntelMP::CompatAddrSpaceMod
busState : QoS::MemCtrl
busStateNext : QoS::MemCtrl
busType : X86ISA::IntelMP::Bus
busUtil : DRAMCtrl::DRAMStats
busUtilRead : DRAMCtrl::DRAMStats
busUtilWrite : DRAMCtrl::DRAMStats
busy : ConditionRegisterState , CopyEngine::CopyEngineChannel , Iob::IntBusy , sc_core::sc_event_and_list , sc_core::sc_event_or_list , SMMUCommandExecProcess , VectorRegisterFile
busyBanks : BankedArray
button_mask : VncInput::PointerEventMessage
bwgehl : StatisticalCorrector
bwHist : StatisticalCorrector::SCThreadHistory
bwID : MultiSocketSimpleSwitchAT::ConnectionInfo
bwInstRead : AbstractMemory::MemStats
bwm : StatisticalCorrector
bwnb : StatisticalCorrector
bwRead : AbstractMemory::MemStats
bwTotal : AbstractMemory::MemStats
bwWrite : AbstractMemory::MemStats
byte_enable : tlm::tlm_endian_context
byte_order : PixelConverter
byte_trackers : MemChecker
byteCount : Brig::BrigBase , Brig::BrigData , Brig::BrigModuleHeader , Brig::BrigSectionHeader , PrdEntry , WriteAllocator
byteMask : MsrBase
byteOrder : AlphaLinux , ArmFreebsd , ArmLinux , IndirectMemoryPrefetcher , MipsLinux , PowerLinux , RiscvLinux , SimpleUart , SparcLinux , SparcSolaris , VirtDescriptor , VirtIODeviceBase , VirtQueue , VirtQueue::VirtRing< T > , X86Linux
bytes : Brig::BrigData , Brig::BrigOperandConstantBytes , DictionaryCompressor< T >::DeltaPattern< DeltaSizeBits >
bytes_completed : DMARequest
bytes_issued : DMARequest
bytes_per_pixel : HDLcd
bytesAccessed : DRAMCtrl::Bank
bytesAllocated : LdsState
bytesCopied : CopyEngine , IGbE::RxDescCache
bytesInstRead : AbstractMemory::MemStats
bytesPerActivate : DRAMCtrl::DRAMStats
bytesPerPixel : Pl111
bytesRead : AbstractMemory::MemStats , BaseTrafficGen::StatGroup
bytesReadDRAM : DRAMCtrl::DRAMStats
bytesReadSys : DRAMCtrl::DRAMStats
bytesReadWrQ : DRAMCtrl::DRAMStats
bytesValid : Packet
bytesWritten : AbstractMemory::MemStats , BaseTrafficGen::StatGroup , DRAMCtrl::DRAMStats
bytesWrittenSys : DRAMCtrl::DRAMStats
ByteSz : LaneData< LS >