50 const sc_signal<bool>& cs;
51 const sc_signal<bool>& we;
59 const int wait_cycles;
62 ram(sc_module_name NAME,
65 const sc_signal<bool>&
CS,
66 const sc_signal<bool>& WE,
69 const int WAIT_CYCLES = 1)
70 : datain(DATAIN), cs(CS), we(WE),
71 addr(ADDR), dataout(DATAOUT), wait_cycles(WAIT_CYCLES)
sc_signal< sc_bv< 10 > > signal_bool_vector10
#define SC_CTHREAD(name, clk)
#define SC_HAS_PROCESS(name)
sc_signal< sc_bv< 32 > > signal_bool_vector32