|
| enum | ArmISA::ArmShiftType { ArmISA::LSL = 0,
ArmISA::LSR,
ArmISA::ASR,
ArmISA::ROR
} |
| |
| enum | ArmISA::ArmExtendType {
ArmISA::UXTB = 0,
ArmISA::UXTH = 1,
ArmISA::UXTW = 2,
ArmISA::UXTX = 3,
ArmISA::SXTB = 4,
ArmISA::SXTH = 5,
ArmISA::SXTW = 6,
ArmISA::SXTX = 7
} |
| |
| enum | ArmISA::ConvertType {
ArmISA::SINGLE_TO_DOUBLE,
ArmISA::SINGLE_TO_WORD,
ArmISA::SINGLE_TO_LONG,
ArmISA::DOUBLE_TO_SINGLE,
ArmISA::DOUBLE_TO_WORD,
ArmISA::DOUBLE_TO_LONG,
ArmISA::LONG_TO_SINGLE,
ArmISA::LONG_TO_DOUBLE,
ArmISA::LONG_TO_WORD,
ArmISA::LONG_TO_PS,
ArmISA::WORD_TO_SINGLE,
ArmISA::WORD_TO_DOUBLE,
ArmISA::WORD_TO_LONG,
ArmISA::WORD_TO_PS,
ArmISA::PL_TO_SINGLE,
ArmISA::PU_TO_SINGLE
} |
| |
| enum | ArmISA::RoundMode { ArmISA::RND_ZERO,
ArmISA::RND_DOWN,
ArmISA::RND_UP,
ArmISA::RND_NEAREST
} |
| |
| enum | ArmISA::ExceptionLevel { ArmISA::EL0 = 0,
ArmISA::EL1,
ArmISA::EL2,
ArmISA::EL3
} |
| |
| enum | ArmISA::OperatingMode {
ArmISA::MODE_EL0T = 0x0,
ArmISA::MODE_EL1T = 0x4,
ArmISA::MODE_EL1H = 0x5,
ArmISA::MODE_EL2T = 0x8,
ArmISA::MODE_EL2H = 0x9,
ArmISA::MODE_EL3T = 0xC,
ArmISA::MODE_EL3H = 0xD,
ArmISA::MODE_USER = 16,
ArmISA::MODE_FIQ = 17,
ArmISA::MODE_IRQ = 18,
ArmISA::MODE_SVC = 19,
ArmISA::MODE_MON = 22,
ArmISA::MODE_ABORT = 23,
ArmISA::MODE_HYP = 26,
ArmISA::MODE_UNDEFINED = 27,
ArmISA::MODE_SYSTEM = 31,
ArmISA::MODE_MAXMODE = MODE_SYSTEM
} |
| |
| enum | ArmISA::ExceptionClass {
ArmISA::EC_INVALID = -1,
ArmISA::EC_UNKNOWN = 0x0,
ArmISA::EC_TRAPPED_WFI_WFE = 0x1,
ArmISA::EC_TRAPPED_CP15_MCR_MRC = 0x3,
ArmISA::EC_TRAPPED_CP15_MCRR_MRRC = 0x4,
ArmISA::EC_TRAPPED_CP14_MCR_MRC = 0x5,
ArmISA::EC_TRAPPED_CP14_LDC_STC = 0x6,
ArmISA::EC_TRAPPED_HCPTR = 0x7,
ArmISA::EC_TRAPPED_SIMD_FP = 0x7,
ArmISA::EC_TRAPPED_CP10_MRC_VMRS = 0x8,
ArmISA::EC_TRAPPED_PAC = 0x9,
ArmISA::EC_TRAPPED_BXJ = 0xA,
ArmISA::EC_TRAPPED_CP14_MCRR_MRRC = 0xC,
ArmISA::EC_ILLEGAL_INST = 0xE,
ArmISA::EC_SVC_TO_HYP = 0x11,
ArmISA::EC_SVC = 0x11,
ArmISA::EC_HVC = 0x12,
ArmISA::EC_SMC_TO_HYP = 0x13,
ArmISA::EC_SMC = 0x13,
ArmISA::EC_SVC_64 = 0x15,
ArmISA::EC_HVC_64 = 0x16,
ArmISA::EC_SMC_64 = 0x17,
ArmISA::EC_TRAPPED_MSR_MRS_64 = 0x18,
ArmISA::EC_TRAPPED_SVE = 0x19,
ArmISA::EC_PREFETCH_ABORT_TO_HYP = 0x20,
ArmISA::EC_PREFETCH_ABORT_LOWER_EL = 0x20,
ArmISA::EC_PREFETCH_ABORT_FROM_HYP = 0x21,
ArmISA::EC_PREFETCH_ABORT_CURR_EL = 0x21,
ArmISA::EC_PC_ALIGNMENT = 0x22,
ArmISA::EC_DATA_ABORT_TO_HYP = 0x24,
ArmISA::EC_DATA_ABORT_LOWER_EL = 0x24,
ArmISA::EC_DATA_ABORT_FROM_HYP = 0x25,
ArmISA::EC_DATA_ABORT_CURR_EL = 0x25,
ArmISA::EC_STACK_PTR_ALIGNMENT = 0x26,
ArmISA::EC_FP_EXCEPTION = 0x28,
ArmISA::EC_FP_EXCEPTION_64 = 0x2C,
ArmISA::EC_SERROR = 0x2F,
ArmISA::EC_HW_BREAKPOINT = 0x30,
ArmISA::EC_HW_BREAKPOINT_LOWER_EL = 0x30,
ArmISA::EC_HW_BREAKPOINT_CURR_EL = 0x31,
ArmISA::EC_SOFTWARE_STEP = 0x32,
ArmISA::EC_SOFTWARE_STEP_LOWER_EL = 0x32,
ArmISA::EC_SOFTWARE_STEP_CURR_EL = 0x33,
ArmISA::EC_WATCHPOINT = 0x34,
ArmISA::EC_WATCHPOINT_LOWER_EL = 0x34,
ArmISA::EC_WATCHPOINT_CURR_EL = 0x35,
ArmISA::EC_SOFTWARE_BREAKPOINT = 0x38,
ArmISA::EC_VECTOR_CATCH = 0x3A,
ArmISA::EC_SOFTWARE_BREAKPOINT_64 = 0x3C
} |
| |
| enum | ArmISA::DecoderFault : std::uint8_t { ArmISA::OK = 0x0,
ArmISA::UNALIGNED = 0x1,
ArmISA::PANIC = 0x3
} |
| | Instruction decoder fault codes in ExtMachInst. More...
|
| |