gem5
v20.1.0.0
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This is the complete list of members for ArmISA::ArmFaultVals< T >, including all inherited members.
aarch64FaultSources | ArmISA::ArmFault | static |
abortDisable(ThreadContext *tc) override | ArmISA::ArmFaultVals< T > | inlinevirtual |
AccessFlagLL enum value | ArmISA::ArmFault | |
AddressSizeLL enum value | ArmISA::ArmFault | |
AlignmentFault enum value | ArmISA::ArmFault | |
annotate(AnnotationIDs id, uint64_t val) | ArmISA::ArmFault | inlinevirtual |
AnnotationIDs enum name | ArmISA::ArmFault | |
AR enum value | ArmISA::ArmFault | |
ArmFault(ExtMachInst _machInst=0, uint32_t _iss=0) | ArmISA::ArmFault | inline |
ArmFaultVals(ExtMachInst _machInst=0, uint32_t _iss=0) | ArmISA::ArmFaultVals< T > | inline |
armPcElrOffset() override | ArmISA::ArmFaultVals< T > | inlinevirtual |
armPcOffset(bool isHyp) override | ArmISA::ArmFaultVals< T > | inlinevirtual |
AsynchPtyErrOnMemoryAccess enum value | ArmISA::ArmFault | |
AsynchronousExternalAbort enum value | ArmISA::ArmFault | |
BRKPOINT enum value | ArmISA::ArmFault | |
bStep | ArmISA::ArmFault | protected |
CM enum value | ArmISA::ArmFault | |
countStat() override | ArmISA::ArmFaultVals< T > | inlinevirtual |
DebugEvent enum value | ArmISA::ArmFault | |
DebugType enum name | ArmISA::ArmFault | |
DomainLL enum value | ArmISA::ArmFault | |
ec(ThreadContext *tc) const override | ArmISA::ArmFaultVals< T > | inlinevirtual |
FaultSource enum name | ArmISA::ArmFault | |
FaultSourceInvalid enum value | ArmISA::ArmFault | |
faultUpdated | ArmISA::ArmFault | protected |
fiqDisable(ThreadContext *tc) override | ArmISA::ArmFaultVals< T > | inlinevirtual |
from64 | ArmISA::ArmFault | protected |
fromEL | ArmISA::ArmFault | protected |
fromMode | ArmISA::ArmFault | protected |
getFaultAddrReg64() const | ArmISA::ArmFault | |
getFaultVAddr(Addr &va) const | ArmISA::ArmFault | inlinevirtual |
getFsr(ThreadContext *tc) const | ArmISA::ArmFault | inlinevirtual |
getSyndromeReg64() const | ArmISA::ArmFault | |
getToMode() const | ArmISA::ArmFault | inline |
getVector(ThreadContext *tc) | ArmISA::ArmFault | protectedvirtual |
getVector64(ThreadContext *tc) | ArmISA::ArmFault | protected |
hypRouted | ArmISA::ArmFault | protected |
instrAnnotate(const StaticInstPtr &inst) | ArmISA::ArmFault | |
InstructionCacheMaintenance enum value | ArmISA::ArmFault | |
invoke(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) override | ArmISA::ArmFault | virtual |
invoke64(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr) | ArmISA::ArmFault | |
isResetSPSR() | ArmISA::ArmFault | inline |
iss() const override | ArmISA::ArmFaultVals< T > | inlinevirtual |
issRaw | ArmISA::ArmFault | protected |
isStage2() const | ArmISA::ArmFault | inlinevirtual |
longDescFaultSources | ArmISA::ArmFault | static |
LpaeTran enum value | ArmISA::ArmFault | |
machInst | ArmISA::ArmFault | protected |
name() const override | ArmISA::ArmFaultVals< T > | inlinevirtual |
nextMode() override | ArmISA::ArmFaultVals< T > | inlinevirtual |
NODEBUG enum value | ArmISA::ArmFault | |
NumFaultSources enum value | ArmISA::ArmFault | |
OFA enum value | ArmISA::ArmFault | |
offset(ThreadContext *tc) override | ArmISA::ArmFaultVals< T > | virtual |
offset64(ThreadContext *tc) override | ArmISA::ArmFaultVals< T > | virtual |
OVA enum value | ArmISA::ArmFault | |
PermissionLL enum value | ArmISA::ArmFault | |
PrefetchTLBMiss enum value | ArmISA::ArmFault | |
PrefetchUncacheable enum value | ArmISA::ArmFault | |
routeToHyp(ThreadContext *tc) const | ArmISA::ArmFault | inlinevirtual |
routeToMonitor(ThreadContext *tc) const override | ArmISA::ArmFaultVals< T > | inlinevirtual |
S1PTW enum value | ArmISA::ArmFault | |
SAS enum value | ArmISA::ArmFault | |
setSyndrome(ThreadContext *tc, MiscRegIndex syndrome_reg) | ArmISA::ArmFault | virtual |
SF enum value | ArmISA::ArmFault | |
shortDescFaultSources | ArmISA::ArmFault | static |
span | ArmISA::ArmFault | protected |
SRT enum value | ArmISA::ArmFault | |
SSE enum value | ArmISA::ArmFault | |
SynchExtAbtOnTranslTableWalkLL enum value | ArmISA::ArmFault | |
SynchPtyErrOnMemoryAccess enum value | ArmISA::ArmFault | |
SynchPtyErrOnTranslTableWalkLL enum value | ArmISA::ArmFault | |
SynchronousExternalAbort enum value | ArmISA::ArmFault | |
thumbPcElrOffset() override | ArmISA::ArmFaultVals< T > | inlinevirtual |
thumbPcOffset(bool isHyp) override | ArmISA::ArmFaultVals< T > | inlinevirtual |
TLBConflictAbort enum value | ArmISA::ArmFault | |
to64 | ArmISA::ArmFault | protected |
toEL | ArmISA::ArmFault | protected |
toMode | ArmISA::ArmFault | protected |
TranMethod enum name | ArmISA::ArmFault | |
TranslationLL enum value | ArmISA::ArmFault | |
UnknownTran enum value | ArmISA::ArmFault | |
update(ThreadContext *tc) | ArmISA::ArmFault | |
vals | ArmISA::ArmFaultVals< T > | protectedstatic |
vals("Reset", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC, 0, 0, 0, 0, false, true, true, EC_UNKNOWN) | ArmISA::ArmFaultVals< T > | protected |
vals("Undefined Instruction", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED, 4, 2, 0, 0, true, false, false, EC_UNKNOWN) | ArmISA::ArmFaultVals< T > | protected |
vals("Supervisor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 4, 2, 4, 2, true, false, false, EC_SVC_TO_HYP) | ArmISA::ArmFaultVals< T > | protected |
vals("Secure Monitor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_MON, 4, 4, 4, 4, false, true, true, EC_SMC_TO_HYP) | ArmISA::ArmFaultVals< T > | protected |
vals("Hypervisor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_HYP, 4, 4, 4, 4, true, false, false, EC_HVC) | ArmISA::ArmFaultVals< T > | protected |
vals("Prefetch Abort", 0x00C, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 4, 4, 0, 0, true, true, false, EC_PREFETCH_ABORT_TO_HYP) | ArmISA::ArmFaultVals< T > | protected |
vals("Data Abort", 0x010, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 8, 8, 0, 0, true, true, false, EC_DATA_ABORT_TO_HYP) | ArmISA::ArmFaultVals< T > | protected |
vals("Virtual Data Abort", 0x010, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 8, 8, 0, 0, true, true, false, EC_INVALID) | ArmISA::ArmFaultVals< T > | protected |
vals("Hypervisor Trap", 0x014, 0x000, 0x200, 0x400, 0x600, MODE_HYP, 0, 0, 0, 0, false, false, false, EC_UNKNOWN) | ArmISA::ArmFaultVals< T > | protected |
vals("Secure Monitor Trap", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_MON, 4, 2, 0, 0, false, false, false, EC_UNKNOWN) | ArmISA::ArmFaultVals< T > | protected |
vals("IRQ", 0x018, 0x080, 0x280, 0x480, 0x680, MODE_IRQ, 4, 4, 0, 0, false, true, false, EC_UNKNOWN) | ArmISA::ArmFaultVals< T > | protected |
vals("Virtual IRQ", 0x018, 0x080, 0x280, 0x480, 0x680, MODE_IRQ, 4, 4, 0, 0, false, true, false, EC_INVALID) | ArmISA::ArmFaultVals< T > | protected |
vals("FIQ", 0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ, 4, 4, 0, 0, false, true, true, EC_UNKNOWN) | ArmISA::ArmFaultVals< T > | protected |
vals("Virtual FIQ", 0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ, 4, 4, 0, 0, false, true, true, EC_INVALID) | ArmISA::ArmFaultVals< T > | protected |
vals("Illegal Inst Set State Fault", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED, 4, 2, 0, 0, true, false, false, EC_ILLEGAL_INST) | ArmISA::ArmFaultVals< T > | protected |
vals("Supervisor Trap", 0x014, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, false, false, false, EC_UNKNOWN) | ArmISA::ArmFaultVals< T > | protected |
vals("PC Alignment Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_PC_ALIGNMENT) | ArmISA::ArmFaultVals< T > | protected |
vals("SP Alignment Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_STACK_PTR_ALIGNMENT) | ArmISA::ArmFaultVals< T > | protected |
vals("SError", 0x000, 0x180, 0x380, 0x580, 0x780, MODE_SVC, 0, 0, 0, 0, false, true, true, EC_SERROR) | ArmISA::ArmFaultVals< T > | protected |
vals("Software Breakpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_SOFTWARE_BREAKPOINT) | ArmISA::ArmFaultVals< T > | protected |
vals("Hardware Breakpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_HW_BREAKPOINT) | ArmISA::ArmFaultVals< T > | protected |
vals("Watchpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_WATCHPOINT) | ArmISA::ArmFaultVals< T > | protected |
vals("SoftwareStep", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_SOFTWARE_STEP) | ArmISA::ArmFaultVals< T > | protected |
vals("ArmSev Flush", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC, 0, 0, 0, 0, false, true, true, EC_UNKNOWN) | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vals | ArmISA::ArmFaultVals< T > | protected |
vectorCatch(ThreadContext *tc, const StaticInstPtr &inst) | ArmISA::ArmFault | |
VECTORCATCH enum value | ArmISA::ArmFault | |
vectorCatchFlag() const | ArmISA::ArmFault | inlinevirtual |
VmsaTran enum value | ArmISA::ArmFault | |
WPOINT_CM enum value | ArmISA::ArmFault | |
WPOINT_NOCM enum value | ArmISA::ArmFault | |
~FaultBase() | FaultBase | inlinevirtual |