_drainManager | Drainable | private |
_drainState | Drainable | mutableprivate |
_params | SimObject | protected |
addressToCacheSet(Addr address) const | CacheMemory | private |
addStat(Stats::Info *info) | Stats::Group | |
addStatGroup(const char *name, Group *block) | Stats::Group | |
allocate(Addr address, AbstractCacheEntry *new_entry) | CacheMemory | |
allocateVoid(Addr address, AbstractCacheEntry *new_entry) | CacheMemory | inline |
cacheAvail(Addr address) const | CacheMemory | |
CacheMemory(const Params *p) | CacheMemory | |
CacheMemory(const CacheMemory &obj) | CacheMemory | private |
cacheProbe(Addr address) const | CacheMemory | |
checkResourceAvailable(CacheResourceType res, Addr addr) | CacheMemory | |
clearLocked(Addr addr) | CacheMemory | |
clearLockedAll(int context) | CacheMemory | |
currentSection() | Serializable | static |
dataArray | CacheMemory | private |
deallocate(Addr address) | CacheMemory | |
deschedule(Event &event) | EventManager | inline |
deschedule(Event *event) | EventManager | inline |
dmDrain() | Drainable | private |
dmDrainResume() | Drainable | private |
drain() override | SimObject | inlinevirtual |
Drainable() | Drainable | protected |
drainResume() | Drainable | inlineprotectedvirtual |
drainState() const | Drainable | inline |
EventManager(EventManager &em) | EventManager | inline |
EventManager(EventManager *em) | EventManager | inline |
EventManager(EventQueue *eq) | EventManager | inline |
eventq | EventManager | protected |
eventQueue() const | EventManager | inline |
find(const char *name) | SimObject | static |
findTagInSet(int64_t line, Addr tag) const | CacheMemory | private |
findTagInSetIgnorePermissions(int64_t cacheSet, Addr tag) const | CacheMemory | private |
getAddressAtIdx(int idx) const | CacheMemory | |
getCacheAssoc() const | CacheMemory | inline |
getCacheSize() const | CacheMemory | inline |
getDataLatency() const | CacheMemory | inline |
getNullEntry() const | CacheMemory | inline |
getNumBlocks() const | CacheMemory | inline |
getPort(const std::string &if_name, PortID idx=InvalidPortID) | SimObject | virtual |
getProbeManager() | SimObject | |
getReplacementWeight(int64_t set, int64_t loc) | CacheMemory | |
getStatGroups() const | Stats::Group | |
getStats() const | Stats::Group | |
getTagLatency() const | CacheMemory | inline |
Group()=delete | Stats::Group | |
Group(const Group &)=delete | Stats::Group | |
Group(Group *parent, const char *name=nullptr) | Stats::Group | |
htmAbortTransaction() | CacheMemory | |
htmCommitTransaction() | CacheMemory | |
htmTransAbortReadSet | CacheMemory | |
htmTransAbortWriteSet | CacheMemory | |
htmTransCommitReadSet | CacheMemory | |
htmTransCommitWriteSet | CacheMemory | |
init() | CacheMemory | virtual |
initState() | SimObject | virtual |
isBlockInvalid(int64_t cache_set, int64_t loc) | CacheMemory | |
isBlockNotBusy(int64_t cache_set, int64_t loc) | CacheMemory | |
isLocked(Addr addr, int context) | CacheMemory | |
isTagPresent(Addr address) const | CacheMemory | |
loadState(CheckpointIn &cp) | SimObject | virtual |
lookup(Addr address) | CacheMemory | |
lookup(Addr address) const | CacheMemory | |
m_accessModeType | CacheMemory | |
m_block_size | CacheMemory | private |
m_cache | CacheMemory | private |
m_cache_assoc | CacheMemory | private |
m_cache_num_set_bits | CacheMemory | private |
m_cache_num_sets | CacheMemory | private |
m_cache_size | CacheMemory | private |
m_demand_accesses | CacheMemory | |
m_demand_hits | CacheMemory | |
m_demand_misses | CacheMemory | |
m_hw_prefetches | CacheMemory | |
m_is_instruction_only_cache | CacheMemory | private |
m_prefetches | CacheMemory | |
m_replacementPolicy_ptr | CacheMemory | private |
m_resource_stalls | CacheMemory | private |
m_start_index_bit | CacheMemory | private |
m_sw_prefetches | CacheMemory | |
m_tag_index | CacheMemory | private |
m_use_occupancy | CacheMemory | private |
memInvalidate() | SimObject | inlinevirtual |
memWriteback() | SimObject | inlinevirtual |
mergedParent | Stats::Group | private |
mergedStatGroups | Stats::Group | private |
mergeStatGroup(Group *block) | Stats::Group | private |
name() const | SimObject | inlinevirtual |
notifyFork() | Drainable | inlinevirtual |
numDataArrayReads | CacheMemory | |
numDataArrayStalls | CacheMemory | |
numDataArrayWrites | CacheMemory | |
numTagArrayReads | CacheMemory | |
numTagArrayStalls | CacheMemory | |
numTagArrayWrites | CacheMemory | |
operator=(const CacheMemory &obj) | CacheMemory | private |
SimObject::operator=(const Group &)=delete | Stats::Group | |
params() const | SimObject | inline |
Params typedef | CacheMemory | |
path | Serializable | privatestatic |
preDumpStats() | Stats::Group | virtual |
print(std::ostream &out) const | CacheMemory | |
printData(std::ostream &out) const | CacheMemory | |
probeManager | SimObject | private |
recordCacheContents(int cntrl, CacheRecorder *tr) const | CacheMemory | |
recordRequestType(CacheRequestType requestType, Addr addr) | CacheMemory | |
regProbeListeners() | SimObject | virtual |
regProbePoints() | SimObject | virtual |
regStats() | CacheMemory | virtual |
replacement_data | CacheMemory | private |
ReplData typedef | CacheMemory | |
reschedule(Event &event, Tick when, bool always=false) | EventManager | inline |
reschedule(Event *event, Tick when, bool always=false) | EventManager | inline |
resetStats() | Stats::Group | virtual |
resolveStat(std::string name) const | Stats::Group | |
schedule(Event &event, Tick when) | EventManager | inline |
schedule(Event *event, Tick when) | EventManager | inline |
Serializable() | Serializable | |
serialize(CheckpointOut &cp) const override | SimObject | inlinevirtual |
serializeAll(CheckpointOut &cp) | SimObject | static |
Serializable::serializeAll(const std::string &cpt_dir) | Serializable | static |
serializeSection(CheckpointOut &cp, const char *name) const | Serializable | |
serializeSection(CheckpointOut &cp, const std::string &name) const | Serializable | inline |
setCurTick(Tick newVal) | EventManager | inline |
setLocked(Addr addr, int context) | CacheMemory | |
setMRU(Addr address) | CacheMemory | |
setMRU(Addr addr, int occupancy) | CacheMemory | |
setMRU(AbstractCacheEntry *entry) | CacheMemory | |
signalDrainDone() const | Drainable | inlineprotected |
SimObject(const Params *_params) | SimObject | |
SimObjectList typedef | SimObject | private |
simObjectList | SimObject | privatestatic |
startup() | SimObject | virtual |
statGroups | Stats::Group | private |
stats | Stats::Group | private |
tagArray | CacheMemory | private |
testCacheAccess(Addr address, RubyRequestType type, DataBlock *&data_ptr) | CacheMemory | |
tryCacheAccess(Addr address, RubyRequestType type, DataBlock *&data_ptr) | CacheMemory | |
unserialize(CheckpointIn &cp) override | SimObject | inlinevirtual |
unserializeGlobals(CheckpointIn &cp) | Serializable | static |
unserializeSection(CheckpointIn &cp, const char *name) | Serializable | |
unserializeSection(CheckpointIn &cp, const std::string &name) | Serializable | inline |
wakeupEventQueue(Tick when=(Tick) -1) | EventManager | inline |
~CacheMemory() | CacheMemory | |
~Drainable() | Drainable | protectedvirtual |
~Group() | Stats::Group | virtual |
~Serializable() | Serializable | virtual |
~SimObject() | SimObject | virtual |