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gem5
v20.1.0.0
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This is the complete list of members for ExecContext, including all inherited members.
| amoMem(Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) | ExecContext | inlinevirtual |
| armMonitor(Addr address)=0 | ExecContext | pure virtual |
| demapPage(Addr vaddr, uint64_t asn)=0 | ExecContext | pure virtual |
| getAddrMonitor()=0 | ExecContext | pure virtual |
| getHtmTransactionalDepth() const =0 | ExecContext | pure virtual |
| getHtmTransactionUid() const =0 | ExecContext | pure virtual |
| getWritableVecPredRegOperand(const StaticInst *si, int idx)=0 | ExecContext | pure virtual |
| getWritableVecRegOperand(const StaticInst *si, int idx)=0 | ExecContext | pure virtual |
| inHtmTransactionalState() const =0 | ExecContext | pure virtual |
| initiateHtmCmd(Request::Flags flags)=0 | ExecContext | pure virtual |
| initiateMemAMO(Addr addr, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) | ExecContext | inlinevirtual |
| initiateMemRead(Addr addr, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >()) | ExecContext | inlinevirtual |
| mwait(PacketPtr pkt)=0 | ExecContext | pure virtual |
| mwaitAtomic(ThreadContext *tc)=0 | ExecContext | pure virtual |
| newHtmTransactionUid() const =0 | ExecContext | pure virtual |
| PCState typedef | ExecContext | |
| pcState() const =0 | ExecContext | pure virtual |
| pcState(const PCState &val)=0 | ExecContext | pure virtual |
| readCCRegOperand(const StaticInst *si, int idx)=0 | ExecContext | pure virtual |
| readFloatRegOperandBits(const StaticInst *si, int idx)=0 | ExecContext | pure virtual |
| readIntRegOperand(const StaticInst *si, int idx)=0 | ExecContext | pure virtual |
| readMem(Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >()) | ExecContext | inlinevirtual |
| readMemAccPredicate() const =0 | ExecContext | pure virtual |
| readMiscReg(int misc_reg)=0 | ExecContext | pure virtual |
| readMiscRegOperand(const StaticInst *si, int idx)=0 | ExecContext | pure virtual |
| readPredicate() const =0 | ExecContext | pure virtual |
| readStCondFailures() const =0 | ExecContext | pure virtual |
| readVec16BitLaneOperand(const StaticInst *si, int idx) const =0 | ExecContext | pure virtual |
| readVec32BitLaneOperand(const StaticInst *si, int idx) const =0 | ExecContext | pure virtual |
| readVec64BitLaneOperand(const StaticInst *si, int idx) const =0 | ExecContext | pure virtual |
| readVec8BitLaneOperand(const StaticInst *si, int idx) const =0 | ExecContext | pure virtual |
| readVecElemOperand(const StaticInst *si, int idx) const =0 | ExecContext | pure virtual |
| readVecPredRegOperand(const StaticInst *si, int idx) const =0 | ExecContext | pure virtual |
| readVecRegOperand(const StaticInst *si, int idx) const =0 | ExecContext | pure virtual |
| setCCRegOperand(const StaticInst *si, int idx, RegVal val)=0 | ExecContext | pure virtual |
| setFloatRegOperandBits(const StaticInst *si, int idx, RegVal val)=0 | ExecContext | pure virtual |
| setIntRegOperand(const StaticInst *si, int idx, RegVal val)=0 | ExecContext | pure virtual |
| setMemAccPredicate(bool val)=0 | ExecContext | pure virtual |
| setMiscReg(int misc_reg, RegVal val)=0 | ExecContext | pure virtual |
| setMiscRegOperand(const StaticInst *si, int idx, RegVal val)=0 | ExecContext | pure virtual |
| setPredicate(bool val)=0 | ExecContext | pure virtual |
| setStCondFailures(unsigned int sc_failures)=0 | ExecContext | pure virtual |
| setVecElemOperand(const StaticInst *si, int idx, const VecElem val)=0 | ExecContext | pure virtual |
| setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::Byte > &val)=0 | ExecContext | pure virtual |
| setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::TwoByte > &val)=0 | ExecContext | pure virtual |
| setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::FourByte > &val)=0 | ExecContext | pure virtual |
| setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::EightByte > &val)=0 | ExecContext | pure virtual |
| setVecPredRegOperand(const StaticInst *si, int idx, const VecPredRegContainer &val)=0 | ExecContext | pure virtual |
| setVecRegOperand(const StaticInst *si, int idx, const VecRegContainer &val)=0 | ExecContext | pure virtual |
| syscall()=0 | ExecContext | pure virtual |
| tcBase() const =0 | ExecContext | pure virtual |
| VecElem typedef | ExecContext | |
| VecPredRegContainer typedef | ExecContext | |
| VecRegContainer typedef | ExecContext | |
| writeMem(uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable=std::vector< bool >())=0 | ExecContext | pure virtual |