gem5  v20.1.0.0
Gcn3ISA::Inst_DS__DS_ADD_SRC2_U32 Member List

This is the complete list of members for Gcn3ISA::Inst_DS__DS_ADD_SRC2_U32, including all inherited members.

_flagsGPUStaticInstprotected
_instAddrGPUStaticInstprotected
_instNumGPUStaticInstprotected
_ipdInstNumGPUStaticInstprotected
_opcodeGPUStaticInstprotected
_srcLiteralGcn3ISA::GCN3GPUStaticInstprotected
calcAddr(GPUDynInstPtr gpuDynInst, ConstVecOperandU32 &addr)Gcn3ISA::Inst_DSinlineprotected
coalescerTokenCount() const overrideGcn3ISA::GCN3GPUStaticInstinlinevirtual
completeAcc(GPUDynInstPtr gpuDynInst)GPUStaticInstinlinevirtual
disassemble()GPUStaticInst
disassemblyGPUStaticInstprotected
dstVecDWORDsGPUStaticInstprotected
dstVecOperandsGPUStaticInstprotected
dynamic_id_countGPUStaticInststatic
execute(GPUDynInstPtr) overrideGcn3ISA::Inst_DS__DS_ADD_SRC2_U32virtual
executed_asGPUStaticInst
extDataGcn3ISA::Inst_DSprotected
GCN3GPUStaticInst(const std::string &opcode)Gcn3ISA::GCN3GPUStaticInst
generateDisassembly() overrideGcn3ISA::Inst_DSvirtual
getNumOperands() overrideGcn3ISA::Inst_DS__DS_ADD_SRC2_U32inlinevirtual
getOperandSize(int opIdx) overrideGcn3ISA::Inst_DS__DS_ADD_SRC2_U32inlinevirtual
getRegisterIndex(int opIdx, GPUDynInstPtr gpuDynInst) overrideGcn3ISA::Inst_DSvirtual
getTargetPc()GPUStaticInstinlinevirtual
GPUStaticInst(const std::string &opcode)GPUStaticInst
ignoreExec() constGPUStaticInstinline
initDualMemRead(GPUDynInstPtr gpuDynInst, Addr offset0, Addr offset1)Gcn3ISA::Inst_DSinlineprotected
initDualMemWrite(GPUDynInstPtr gpuDynInst, Addr offset0, Addr offset1)Gcn3ISA::Inst_DSinlineprotected
initiateAcc(GPUDynInstPtr gpuDynInst)GPUStaticInstinlinevirtual
initMemRead(GPUDynInstPtr gpuDynInst, Addr offset)Gcn3ISA::Inst_DSinlineprotected
initMemWrite(GPUDynInstPtr gpuDynInst, Addr offset)Gcn3ISA::Inst_DSinlineprotected
Inst_DS(InFmt_DS *, const std::string &opcode)Gcn3ISA::Inst_DS
Inst_DS__DS_ADD_SRC2_U32(InFmt_DS *)Gcn3ISA::Inst_DS__DS_ADD_SRC2_U32
instAddr(int inst_addr)GPUStaticInstinline
instAddr() constGPUStaticInstinline
instDataGcn3ISA::Inst_DSprotected
instNum(int num)GPUStaticInstinline
instNum()GPUStaticInstinline
instSize() const overrideGcn3ISA::Inst_DSvirtual
ipdInstNum(int num)GPUStaticInstinline
ipdInstNum() constGPUStaticInstinline
isALU() constGPUStaticInstinline
isArgLoad() constGPUStaticInstinline
isArgSeg() constGPUStaticInstinline
isAtomic() constGPUStaticInstinline
isAtomicAdd() constGPUStaticInstinline
isAtomicAnd() constGPUStaticInstinline
isAtomicCAS() constGPUStaticInstinline
isAtomicDec() constGPUStaticInstinline
isAtomicExch() constGPUStaticInstinline
isAtomicInc() constGPUStaticInstinline
isAtomicMax() constGPUStaticInstinline
isAtomicMin() constGPUStaticInstinline
isAtomicNoRet() constGPUStaticInstinline
isAtomicOr() constGPUStaticInstinline
isAtomicRet() constGPUStaticInstinline
isAtomicSub() constGPUStaticInstinline
isAtomicXor() constGPUStaticInstinline
isBarrier() constGPUStaticInstinline
isBranch() constGPUStaticInstinline
isCondBranch() constGPUStaticInstinline
isDPPInst() constGPUStaticInstinline
isDstOperand(int opIdx) overrideGcn3ISA::Inst_DS__DS_ADD_SRC2_U32inlinevirtual
isEndOfKernel() constGPUStaticInstinline
isExecMaskRegister(int opIdx) overrideGcn3ISA::GCN3GPUStaticInstinlinevirtual
isF16() constGPUStaticInstinline
isF32() constGPUStaticInstinline
isF64() constGPUStaticInstinline
isFlat() constGPUStaticInstinline
isFlatScratchRegister(int opIdx) overrideGcn3ISA::GCN3GPUStaticInstinlinevirtual
isFMA() constGPUStaticInstinline
isGloballyCoherent() constGPUStaticInstinline
isGlobalMem() constGPUStaticInstinline
isGlobalSeg() constGPUStaticInstinline
isGroupSeg() constGPUStaticInstinline
isKernArgSeg() constGPUStaticInstinline
isKernelLaunch() constGPUStaticInstinline
isLoad() constGPUStaticInstinline
isLocalMem() constGPUStaticInstinline
isMAC() constGPUStaticInstinline
isMAD() constGPUStaticInstinline
isMemRef() constGPUStaticInstinline
isMemSync() constGPUStaticInstinline
isNop() constGPUStaticInstinline
isPrivateSeg() constGPUStaticInstinline
isReadOnlySeg() constGPUStaticInstinline
isReturn() constGPUStaticInstinline
isScalar() constGPUStaticInstinline
isScalarRegister(int opIdx) overrideGcn3ISA::Inst_DSvirtual
isSDWAInst() constGPUStaticInstinline
isSpecialOp() constGPUStaticInstinline
isSpillSeg() constGPUStaticInstinline
isSrcOperand(int opIdx) overrideGcn3ISA::Inst_DS__DS_ADD_SRC2_U32inlinevirtual
isStore() constGPUStaticInstinline
isSystemCoherent() constGPUStaticInstinline
isUnconditionalJump() constGPUStaticInstinline
isVectorRegister(int opIdx) overrideGcn3ISA::Inst_DSvirtual
isWaitcnt() constGPUStaticInstinline
nextInstAddr() constGPUStaticInstinline
numDstRegOperands() overrideGcn3ISA::Inst_DS__DS_ADD_SRC2_U32inlinevirtual
numDstVecDWORDs()GPUStaticInst
numDstVecOperands()GPUStaticInst
numOpdDWORDs(int operandIdx)GPUStaticInst
numSrcRegOperands() overrideGcn3ISA::Inst_DS__DS_ADD_SRC2_U32inlinevirtual
numSrcVecDWORDs()GPUStaticInst
numSrcVecOperands()GPUStaticInst
opcode() constGPUStaticInstinline
panicUnimplemented() constGcn3ISA::GCN3GPUStaticInstprotected
readsEXEC() constGPUStaticInstinline
readsMode() constGPUStaticInstinline
readsSCC() constGPUStaticInstinline
readsVCC() constGPUStaticInstinline
setFlag(Flags flag)GPUStaticInstinline
srcLiteral() const overrideGcn3ISA::GCN3GPUStaticInstinlinevirtual
srcVecDWORDsGPUStaticInstprotected
srcVecOperandsGPUStaticInstprotected
writesEXEC() constGPUStaticInstinline
writesMode() constGPUStaticInstinline
writesSCC() constGPUStaticInstinline
writesVCC() constGPUStaticInstinline
~GCN3GPUStaticInst()Gcn3ISA::GCN3GPUStaticInst
~GPUStaticInst()GPUStaticInstinlinevirtual
~Inst_DS()Gcn3ISA::Inst_DS
~Inst_DS__DS_ADD_SRC2_U32()Gcn3ISA::Inst_DS__DS_ADD_SRC2_U32
Generated on Wed Sep 30 2020 14:02:40 for gem5 by doxygen 1.8.17