gem5  v20.1.0.0
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Gcn3ISA::Inst_DS Class Reference

#include <op_encodings.hh>

Inheritance diagram for Gcn3ISA::Inst_DS:
Gcn3ISA::GCN3GPUStaticInst GPUStaticInst Gcn3ISA::Inst_DS__DS_ADD_F32 Gcn3ISA::Inst_DS__DS_ADD_RTN_F32 Gcn3ISA::Inst_DS__DS_ADD_RTN_U32 Gcn3ISA::Inst_DS__DS_ADD_RTN_U64 Gcn3ISA::Inst_DS__DS_ADD_SRC2_F32 Gcn3ISA::Inst_DS__DS_ADD_SRC2_U32 Gcn3ISA::Inst_DS__DS_ADD_SRC2_U64 Gcn3ISA::Inst_DS__DS_ADD_U32 Gcn3ISA::Inst_DS__DS_ADD_U64 Gcn3ISA::Inst_DS__DS_AND_B32 Gcn3ISA::Inst_DS__DS_AND_B64 Gcn3ISA::Inst_DS__DS_AND_RTN_B32 Gcn3ISA::Inst_DS__DS_AND_RTN_B64 Gcn3ISA::Inst_DS__DS_AND_SRC2_B32 Gcn3ISA::Inst_DS__DS_AND_SRC2_B64 Gcn3ISA::Inst_DS__DS_APPEND Gcn3ISA::Inst_DS__DS_BPERMUTE_B32 Gcn3ISA::Inst_DS__DS_CMPST_B32 Gcn3ISA::Inst_DS__DS_CMPST_B64 Gcn3ISA::Inst_DS__DS_CMPST_F32 Gcn3ISA::Inst_DS__DS_CMPST_F64 Gcn3ISA::Inst_DS__DS_CMPST_RTN_B32 Gcn3ISA::Inst_DS__DS_CMPST_RTN_B64 Gcn3ISA::Inst_DS__DS_CMPST_RTN_F32 Gcn3ISA::Inst_DS__DS_CMPST_RTN_F64 Gcn3ISA::Inst_DS__DS_CONDXCHG32_RTN_B64 Gcn3ISA::Inst_DS__DS_CONSUME Gcn3ISA::Inst_DS__DS_DEC_RTN_U32 Gcn3ISA::Inst_DS__DS_DEC_RTN_U64 Gcn3ISA::Inst_DS__DS_DEC_SRC2_U32 Gcn3ISA::Inst_DS__DS_DEC_SRC2_U64 Gcn3ISA::Inst_DS__DS_DEC_U32 Gcn3ISA::Inst_DS__DS_DEC_U64 Gcn3ISA::Inst_DS__DS_GWS_BARRIER Gcn3ISA::Inst_DS__DS_GWS_INIT Gcn3ISA::Inst_DS__DS_GWS_SEMA_BR Gcn3ISA::Inst_DS__DS_GWS_SEMA_P Gcn3ISA::Inst_DS__DS_GWS_SEMA_RELEASE_ALL Gcn3ISA::Inst_DS__DS_GWS_SEMA_V Gcn3ISA::Inst_DS__DS_INC_RTN_U32 Gcn3ISA::Inst_DS__DS_INC_RTN_U64 Gcn3ISA::Inst_DS__DS_INC_SRC2_U32 Gcn3ISA::Inst_DS__DS_INC_SRC2_U64 Gcn3ISA::Inst_DS__DS_INC_U32 Gcn3ISA::Inst_DS__DS_INC_U64 Gcn3ISA::Inst_DS__DS_MAX_F32 Gcn3ISA::Inst_DS__DS_MAX_F64 Gcn3ISA::Inst_DS__DS_MAX_I32 Gcn3ISA::Inst_DS__DS_MAX_I64 Gcn3ISA::Inst_DS__DS_MAX_RTN_F32 Gcn3ISA::Inst_DS__DS_MAX_RTN_F64 Gcn3ISA::Inst_DS__DS_MAX_RTN_I32 Gcn3ISA::Inst_DS__DS_MAX_RTN_I64 Gcn3ISA::Inst_DS__DS_MAX_RTN_U32 Gcn3ISA::Inst_DS__DS_MAX_RTN_U64 Gcn3ISA::Inst_DS__DS_MAX_SRC2_F32 Gcn3ISA::Inst_DS__DS_MAX_SRC2_F64 Gcn3ISA::Inst_DS__DS_MAX_SRC2_I32 Gcn3ISA::Inst_DS__DS_MAX_SRC2_I64 Gcn3ISA::Inst_DS__DS_MAX_SRC2_U32 Gcn3ISA::Inst_DS__DS_MAX_SRC2_U64 Gcn3ISA::Inst_DS__DS_MAX_U32 Gcn3ISA::Inst_DS__DS_MAX_U64 Gcn3ISA::Inst_DS__DS_MIN_F32 Gcn3ISA::Inst_DS__DS_MIN_F64 Gcn3ISA::Inst_DS__DS_MIN_I32 Gcn3ISA::Inst_DS__DS_MIN_I64 Gcn3ISA::Inst_DS__DS_MIN_RTN_F32 Gcn3ISA::Inst_DS__DS_MIN_RTN_F64 Gcn3ISA::Inst_DS__DS_MIN_RTN_I32 Gcn3ISA::Inst_DS__DS_MIN_RTN_I64 Gcn3ISA::Inst_DS__DS_MIN_RTN_U32 Gcn3ISA::Inst_DS__DS_MIN_RTN_U64 Gcn3ISA::Inst_DS__DS_MIN_SRC2_F32 Gcn3ISA::Inst_DS__DS_MIN_SRC2_F64 Gcn3ISA::Inst_DS__DS_MIN_SRC2_I32 Gcn3ISA::Inst_DS__DS_MIN_SRC2_I64 Gcn3ISA::Inst_DS__DS_MIN_SRC2_U32 Gcn3ISA::Inst_DS__DS_MIN_SRC2_U64 Gcn3ISA::Inst_DS__DS_MIN_U32 Gcn3ISA::Inst_DS__DS_MIN_U64 Gcn3ISA::Inst_DS__DS_MSKOR_B32 Gcn3ISA::Inst_DS__DS_MSKOR_B64 Gcn3ISA::Inst_DS__DS_MSKOR_RTN_B32 Gcn3ISA::Inst_DS__DS_MSKOR_RTN_B64 Gcn3ISA::Inst_DS__DS_NOP Gcn3ISA::Inst_DS__DS_OR_B32 Gcn3ISA::Inst_DS__DS_OR_B64 Gcn3ISA::Inst_DS__DS_OR_RTN_B32 Gcn3ISA::Inst_DS__DS_OR_RTN_B64 Gcn3ISA::Inst_DS__DS_OR_SRC2_B32 Gcn3ISA::Inst_DS__DS_OR_SRC2_B64 Gcn3ISA::Inst_DS__DS_ORDERED_COUNT Gcn3ISA::Inst_DS__DS_PERMUTE_B32 Gcn3ISA::Inst_DS__DS_READ2_B32 Gcn3ISA::Inst_DS__DS_READ2_B64 Gcn3ISA::Inst_DS__DS_READ2ST64_B32 Gcn3ISA::Inst_DS__DS_READ2ST64_B64 Gcn3ISA::Inst_DS__DS_READ_B128 Gcn3ISA::Inst_DS__DS_READ_B32 Gcn3ISA::Inst_DS__DS_READ_B64 Gcn3ISA::Inst_DS__DS_READ_B96 Gcn3ISA::Inst_DS__DS_READ_I16 Gcn3ISA::Inst_DS__DS_READ_I8 Gcn3ISA::Inst_DS__DS_READ_U16 Gcn3ISA::Inst_DS__DS_READ_U8 Gcn3ISA::Inst_DS__DS_RSUB_RTN_U32 Gcn3ISA::Inst_DS__DS_RSUB_RTN_U64 Gcn3ISA::Inst_DS__DS_RSUB_SRC2_U32 Gcn3ISA::Inst_DS__DS_RSUB_SRC2_U64 Gcn3ISA::Inst_DS__DS_RSUB_U32 Gcn3ISA::Inst_DS__DS_RSUB_U64 Gcn3ISA::Inst_DS__DS_SUB_RTN_U32 Gcn3ISA::Inst_DS__DS_SUB_RTN_U64 Gcn3ISA::Inst_DS__DS_SUB_SRC2_U32 Gcn3ISA::Inst_DS__DS_SUB_SRC2_U64 Gcn3ISA::Inst_DS__DS_SUB_U32 Gcn3ISA::Inst_DS__DS_SUB_U64 Gcn3ISA::Inst_DS__DS_SWIZZLE_B32 Gcn3ISA::Inst_DS__DS_WRAP_RTN_B32 Gcn3ISA::Inst_DS__DS_WRITE2_B32 Gcn3ISA::Inst_DS__DS_WRITE2_B64 Gcn3ISA::Inst_DS__DS_WRITE2ST64_B32 Gcn3ISA::Inst_DS__DS_WRITE2ST64_B64 Gcn3ISA::Inst_DS__DS_WRITE_B128 Gcn3ISA::Inst_DS__DS_WRITE_B16 Gcn3ISA::Inst_DS__DS_WRITE_B32 Gcn3ISA::Inst_DS__DS_WRITE_B64 Gcn3ISA::Inst_DS__DS_WRITE_B8 Gcn3ISA::Inst_DS__DS_WRITE_B96 Gcn3ISA::Inst_DS__DS_WRITE_SRC2_B32 Gcn3ISA::Inst_DS__DS_WRITE_SRC2_B64 Gcn3ISA::Inst_DS__DS_WRXCHG2_RTN_B32 Gcn3ISA::Inst_DS__DS_WRXCHG2_RTN_B64 Gcn3ISA::Inst_DS__DS_WRXCHG2ST64_RTN_B32 Gcn3ISA::Inst_DS__DS_WRXCHG2ST64_RTN_B64 Gcn3ISA::Inst_DS__DS_WRXCHG_RTN_B32 Gcn3ISA::Inst_DS__DS_WRXCHG_RTN_B64 Gcn3ISA::Inst_DS__DS_XOR_B32 Gcn3ISA::Inst_DS__DS_XOR_B64 Gcn3ISA::Inst_DS__DS_XOR_RTN_B32 Gcn3ISA::Inst_DS__DS_XOR_RTN_B64 Gcn3ISA::Inst_DS__DS_XOR_SRC2_B32 Gcn3ISA::Inst_DS__DS_XOR_SRC2_B64

Public Member Functions

 Inst_DS (InFmt_DS *, const std::string &opcode)
 
 ~Inst_DS ()
 
int instSize () const override
 
void generateDisassembly () override
 
bool isScalarRegister (int opIdx) override
 
bool isVectorRegister (int opIdx) override
 
int getRegisterIndex (int opIdx, GPUDynInstPtr gpuDynInst) override
 
- Public Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst
 GCN3GPUStaticInst (const std::string &opcode)
 
 ~GCN3GPUStaticInst ()
 
bool isFlatScratchRegister (int opIdx) override
 
bool isExecMaskRegister (int opIdx) override
 
bool isSrcOperand (int opIdx) override
 
bool isDstOperand (int opIdx) override
 
int getOperandSize (int opIdx) override
 
int coalescerTokenCount () const override
 Return the number of tokens needed by the coalescer. More...
 
ScalarRegU32 srcLiteral () const override
 
- Public Member Functions inherited from GPUStaticInst
 GPUStaticInst (const std::string &opcode)
 
virtual ~GPUStaticInst ()
 
void instAddr (int inst_addr)
 
int instAddr () const
 
int nextInstAddr () const
 
void instNum (int num)
 
int instNum ()
 
void ipdInstNum (int num)
 
int ipdInstNum () const
 
virtual void execute (GPUDynInstPtr gpuDynInst)=0
 
const std::string & disassemble ()
 
virtual int getNumOperands ()=0
 
virtual int numDstRegOperands ()=0
 
virtual int numSrcRegOperands ()=0
 
int numDstVecOperands ()
 
int numSrcVecOperands ()
 
int numDstVecDWORDs ()
 
int numSrcVecDWORDs ()
 
int numOpdDWORDs (int operandIdx)
 
bool isALU () const
 
bool isBranch () const
 
bool isCondBranch () const
 
bool isNop () const
 
bool isReturn () const
 
bool isEndOfKernel () const
 
bool isKernelLaunch () const
 
bool isSDWAInst () const
 
bool isDPPInst () const
 
bool isUnconditionalJump () const
 
bool isSpecialOp () const
 
bool isWaitcnt () const
 
bool isBarrier () const
 
bool isMemSync () const
 
bool isMemRef () const
 
bool isFlat () const
 
bool isLoad () const
 
bool isStore () const
 
bool isAtomic () const
 
bool isAtomicNoRet () const
 
bool isAtomicRet () const
 
bool isScalar () const
 
bool readsSCC () const
 
bool writesSCC () const
 
bool readsVCC () const
 
bool writesVCC () const
 
bool readsEXEC () const
 
bool writesEXEC () const
 
bool readsMode () const
 
bool writesMode () const
 
bool ignoreExec () const
 
bool isAtomicAnd () const
 
bool isAtomicOr () const
 
bool isAtomicXor () const
 
bool isAtomicCAS () const
 
bool isAtomicExch () const
 
bool isAtomicAdd () const
 
bool isAtomicSub () const
 
bool isAtomicInc () const
 
bool isAtomicDec () const
 
bool isAtomicMax () const
 
bool isAtomicMin () const
 
bool isArgLoad () const
 
bool isGlobalMem () const
 
bool isLocalMem () const
 
bool isArgSeg () const
 
bool isGlobalSeg () const
 
bool isGroupSeg () const
 
bool isKernArgSeg () const
 
bool isPrivateSeg () const
 
bool isReadOnlySeg () const
 
bool isSpillSeg () const
 
bool isGloballyCoherent () const
 Coherence domain of a memory instruction. More...
 
bool isSystemCoherent () const
 
bool isF16 () const
 
bool isF32 () const
 
bool isF64 () const
 
bool isFMA () const
 
bool isMAC () const
 
bool isMAD () const
 
virtual void initiateAcc (GPUDynInstPtr gpuDynInst)
 
virtual void completeAcc (GPUDynInstPtr gpuDynInst)
 
virtual uint32_t getTargetPc ()
 
void setFlag (Flags flag)
 
const std::string & opcode () const
 

Protected Member Functions

template<typename T >
void initMemRead (GPUDynInstPtr gpuDynInst, Addr offset)
 
template<typename T >
void initDualMemRead (GPUDynInstPtr gpuDynInst, Addr offset0, Addr offset1)
 
template<typename T >
void initMemWrite (GPUDynInstPtr gpuDynInst, Addr offset)
 
template<typename T >
void initDualMemWrite (GPUDynInstPtr gpuDynInst, Addr offset0, Addr offset1)
 
void calcAddr (GPUDynInstPtr gpuDynInst, ConstVecOperandU32 &addr)
 
- Protected Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst
void panicUnimplemented () const
 

Protected Attributes

InFmt_DS instData
 
InFmt_DS_1 extData
 
- Protected Attributes inherited from Gcn3ISA::GCN3GPUStaticInst
ScalarRegU32 _srcLiteral
 if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here More...
 
- Protected Attributes inherited from GPUStaticInst
const std::string _opcode
 
std::string disassembly
 
int _instNum
 
int _instAddr
 
int srcVecOperands
 
int dstVecOperands
 
int srcVecDWORDs
 
int dstVecDWORDs
 
int _ipdInstNum
 Identifier of the immediate post-dominator instruction. More...
 
std::bitset< Num_Flags > _flags
 

Additional Inherited Members

- Public Attributes inherited from GPUStaticInst
Enums::StorageClassType executed_as
 
- Static Public Attributes inherited from GPUStaticInst
static uint64_t dynamic_id_count
 

Detailed Description

Definition at line 412 of file op_encodings.hh.

Constructor & Destructor Documentation

◆ Inst_DS()

Gcn3ISA::Inst_DS::Inst_DS ( InFmt_DS iFmt,
const std::string &  opcode 
)

◆ ~Inst_DS()

Gcn3ISA::Inst_DS::~Inst_DS ( )

Definition at line 1812 of file op_encodings.cc.

Member Function Documentation

◆ calcAddr()

void Gcn3ISA::Inst_DS::calcAddr ( GPUDynInstPtr  gpuDynInst,
ConstVecOperandU32 addr 
)
inlineprotected

◆ generateDisassembly()

void Gcn3ISA::Inst_DS::generateDisassembly ( )
overridevirtual

◆ getRegisterIndex()

int Gcn3ISA::Inst_DS::getRegisterIndex ( int  opIdx,
GPUDynInstPtr  gpuDynInst 
)
overridevirtual

◆ initDualMemRead()

template<typename T >
void Gcn3ISA::Inst_DS::initDualMemRead ( GPUDynInstPtr  gpuDynInst,
Addr  offset0,
Addr  offset1 
)
inlineprotected

◆ initDualMemWrite()

template<typename T >
void Gcn3ISA::Inst_DS::initDualMemWrite ( GPUDynInstPtr  gpuDynInst,
Addr  offset0,
Addr  offset1 
)
inlineprotected

◆ initMemRead()

template<typename T >
void Gcn3ISA::Inst_DS::initMemRead ( GPUDynInstPtr  gpuDynInst,
Addr  offset 
)
inlineprotected

◆ initMemWrite()

template<typename T >
void Gcn3ISA::Inst_DS::initMemWrite ( GPUDynInstPtr  gpuDynInst,
Addr  offset 
)
inlineprotected

◆ instSize()

int Gcn3ISA::Inst_DS::instSize ( ) const
overridevirtual

Implements GPUStaticInst.

Definition at line 1817 of file op_encodings.cc.

◆ isScalarRegister()

bool Gcn3ISA::Inst_DS::isScalarRegister ( int  opIdx)
overridevirtual

Reimplemented from Gcn3ISA::GCN3GPUStaticInst.

Definition at line 1856 of file op_encodings.cc.

References GPUStaticInst::getNumOperands().

◆ isVectorRegister()

bool Gcn3ISA::Inst_DS::isVectorRegister ( int  opIdx)
overridevirtual

Reimplemented from Gcn3ISA::GCN3GPUStaticInst.

Definition at line 1866 of file op_encodings.cc.

References GPUStaticInst::getNumOperands().

Member Data Documentation

◆ extData

InFmt_DS_1 Gcn3ISA::Inst_DS::extData
protected

◆ instData

InFmt_DS Gcn3ISA::Inst_DS::instData
protected

The documentation for this class was generated from the following files:

Generated on Wed Sep 30 2020 14:02:40 for gem5 by doxygen 1.8.17