gem5  v20.1.0.0
NoncoherentXBar Member List

This is the complete list of members for NoncoherentXBar, including all inherited members.

_drainManagerDrainableprivate
_drainStateDrainablemutableprivate
_paramsSimObjectprotected
addStat(Stats::Info *info)Stats::Group
addStatGroup(const char *name, Group *block)Stats::Group
BaseXBar(const BaseXBarParams *p)BaseXBarprotected
calcPacketTiming(PacketPtr pkt, Tick header_delay)BaseXBarprotected
clockDomainClockedprivate
Clocked(ClockDomain &clk_domain)Clockedinlineprotected
Clocked(Clocked &)=deleteClockedprotected
clockEdge(Cycles cycles=Cycles(0)) constClockedinline
ClockedObject(const ClockedObjectParams *p)ClockedObject
clockPeriod() constClockedinline
clockPeriodUpdated()Clockedinlineprotectedvirtual
cpuSidePortsBaseXBarprotected
curCycle() constClockedinline
currentSection()Serializablestatic
cycleClockedmutableprivate
cyclesToTicks(Cycles c) constClockedinline
defaultPortIDBaseXBarprotected
defaultRangeBaseXBarprotected
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
dmDrain()Drainableprivate
dmDrainResume()Drainableprivate
drain() overrideSimObjectinlinevirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainState() constDrainableinline
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() constEventManagerinline
find(const char *name)SimObjectstatic
findPort(AddrRange addr_range)BaseXBarprotected
forwardLatencyBaseXBarprotected
frequency() constClockedinline
frontendLatencyBaseXBarprotected
getAddrRanges() constBaseXBarprotected
getPort(const std::string &if_name, PortID idx=InvalidPortID) overrideBaseXBarvirtual
getProbeManager()SimObject
getStatGroups() constStats::Group
getStats() constStats::Group
gotAddrRangesBaseXBarprotected
gotAllAddrRangesBaseXBarprotected
Group()=deleteStats::Group
Group(const Group &)=deleteStats::Group
Group(Group *parent, const char *name=nullptr)Stats::Group
headerLatencyBaseXBarprotected
init()SimObjectvirtual
initState()SimObjectvirtual
loadState(CheckpointIn &cp)SimObjectvirtual
memInvalidate()SimObjectinlinevirtual
memSidePortsBaseXBarprotected
memWriteback()SimObjectinlinevirtual
mergedParentStats::Groupprivate
mergedStatGroupsStats::Groupprivate
mergeStatGroup(Group *block)Stats::Groupprivate
name() constSimObjectinlinevirtual
nextCycle() constClockedinline
NoncoherentXBar(const NoncoherentXBarParams *p)NoncoherentXBar
notifyFork()Drainableinlinevirtual
SimObject::operator=(const Group &)=deleteStats::Group
Clocked::operator=(Clocked &)=deleteClockedprotected
Params typedefClockedObject
params() constClockedObjectinline
pathSerializableprivatestatic
pktCountBaseXBarprotected
pktSizeBaseXBarprotected
portMapBaseXBarprotected
powerStateClockedObject
preDumpStats()Stats::Groupvirtual
probeManagerSimObjectprivate
recvAtomicBackdoor(PacketPtr pkt, PortID cpu_side_port_id, MemBackdoorPtr *backdoor=nullptr)NoncoherentXBarprotected
recvFunctional(PacketPtr pkt, PortID cpu_side_port_id)NoncoherentXBarprotected
recvRangeChange(PortID mem_side_port_id)BaseXBarprotectedvirtual
recvReqRetry(PortID mem_side_port_id)NoncoherentXBarprotected
recvTimingReq(PacketPtr pkt, PortID cpu_side_port_id)NoncoherentXBarprotectedvirtual
recvTimingResp(PacketPtr pkt, PortID mem_side_port_id)NoncoherentXBarprotectedvirtual
regProbeListeners()SimObjectvirtual
regProbePoints()SimObjectvirtual
regStats() overrideBaseXBarvirtual
reqLayersNoncoherentXBarprotected
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetClock() constClockedinlineprotected
resetStats()Stats::Groupvirtual
resolveStat(std::string name) constStats::Group
respLayersNoncoherentXBarprotected
responseLatencyBaseXBarprotected
routeToBaseXBarprotected
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideClockedObjectvirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) constSerializable
serializeSection(CheckpointOut &cp, const std::string &name) constSerializableinline
setCurTick(Tick newVal)EventManagerinline
signalDrainDone() constDrainableinlineprotected
SimObject(const Params *_params)SimObject
SimObjectList typedefSimObjectprivate
simObjectListSimObjectprivatestatic
startup()SimObjectvirtual
statGroupsStats::Groupprivate
statsStats::Groupprivate
tickClockedmutableprivate
ticksToCycles(Tick t) constClockedinline
transDistBaseXBarprotected
unserialize(CheckpointIn &cp) overrideClockedObjectvirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
update() constClockedinlineprivate
updateClockPeriod()Clockedinline
useDefaultRangeBaseXBarprotected
voltage() constClockedinline
wakeupEventQueue(Tick when=(Tick) -1)EventManagerinline
widthBaseXBarprotected
xbarRangesBaseXBarprotected
~BaseXBar()BaseXBarvirtual
~Clocked()Clockedinlineprotectedvirtual
~Drainable()Drainableprotectedvirtual
~Group()Stats::Groupvirtual
~NoncoherentXBar()NoncoherentXBarvirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual

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