gem5  v20.1.0.0
Prefetcher::STeMS Member List

This is the complete list of members for Prefetcher::STeMS, including all inherited members.

_drainManagerDrainableprivate
_drainStateDrainablemutableprivate
_paramsSimObjectprotected
activeGenerationTablePrefetcher::STeMSprivate
addEventProbe(SimObject *obj, const char *name)Prefetcher::Base
AddrPriority typedefPrefetcher::Queued
addStat(Stats::Info *info)Stats::Group
addStatGroup(const char *name, Group *block)Stats::Group
addTLB(BaseTLB *tlb)Prefetcher::Base
addToQueue(std::list< DeferredPacket > &queue, DeferredPacket &dpp)Prefetcher::Queuedprivate
addToRMOB(Addr sr_addr, Addr pst_addr, unsigned int delta)Prefetcher::STeMSprivate
alreadyInQueue(std::list< DeferredPacket > &queue, const PrefetchInfo &pfi, int32_t priority)Prefetcher::Queuedprivate
Base(const BasePrefetcherParams *p)Prefetcher::Base
blkSizePrefetcher::Baseprotected
blockAddress(Addr a) constPrefetcher::Baseprotected
blockIndex(Addr a) constPrefetcher::Baseprotected
cachePrefetcher::Baseprotected
cacheSnoopPrefetcher::Queuedprotected
calculatePrefetch(const PrefetchInfo &pfi, std::vector< AddrPriority > &addresses) overridePrefetcher::STeMSvirtual
checkForActiveGenerationsEnd()Prefetcher::STeMSprivate
clockDomainClockedprivate
Clocked(ClockDomain &clk_domain)Clockedinlineprotected
Clocked(Clocked &)=deleteClockedprotected
clockEdge(Cycles cycles=Cycles(0)) constClockedinline
ClockedObject(const ClockedObjectParams *p)ClockedObject
clockPeriod() constClockedinline
clockPeriodUpdated()Clockedinlineprotectedvirtual
const_iterator typedefPrefetcher::Queuedprotected
createPrefetchRequest(Addr addr, PrefetchInfo const &pfi, PacketPtr pkt)Prefetcher::Queuedprivate
curCycle() constClockedinline
currentSection()Serializablestatic
cycleClockedmutableprivate
cyclesToTicks(Cycles c) constClockedinline
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
dmDrain()Drainableprivate
dmDrainResume()Drainableprivate
drain() overrideSimObjectinlinevirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainState() constDrainableinline
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() constEventManagerinline
find(const char *name)SimObjectstatic
frequency() constClockedinline
getMaxPermittedPrefetches(size_t total) constPrefetcher::Queuedprivate
getPacket() overridePrefetcher::Queuedvirtual
getPort(const std::string &if_name, PortID idx=InvalidPortID)SimObjectvirtual
getProbeManager()SimObject
getStatGroups() constStats::Group
getStats() constStats::Group
Group()=deleteStats::Group
Group(const Group &)=deleteStats::Group
Group(Group *parent, const char *name=nullptr)Stats::Group
hasBeenPrefetched(Addr addr, bool is_secure) constPrefetcher::Baseprotected
inCache(Addr addr, bool is_secure) constPrefetcher::Baseprotected
init()SimObjectvirtual
initState()SimObjectvirtual
inMissQueue(Addr addr, bool is_secure) constPrefetcher::Baseprotected
insert(const PacketPtr &pkt, PrefetchInfo &new_pfi, int32_t priority)Prefetcher::Queued
issuedPrefetchesPrefetcher::Baseprotected
iterator typedefPrefetcher::Queuedprotected
lastTriggerCounterPrefetcher::STeMSprivate
latencyPrefetcher::Queuedprotected
lBlkSizePrefetcher::Baseprotected
listenersPrefetcher::Baseprivate
loadState(CheckpointIn &cp)SimObjectvirtual
memInvalidate()SimObjectinlinevirtual
memWriteback()SimObjectinlinevirtual
mergedParentStats::Groupprivate
mergedStatGroupsStats::Groupprivate
mergeStatGroup(Group *block)Stats::Groupprivate
missingTranslationQueueSizePrefetcher::Queuedprotected
name() constSimObjectinlinevirtual
nextCycle() constClockedinline
nextPrefetchReadyTime() const overridePrefetcher::Queuedinlinevirtual
notify(const PacketPtr &pkt, const PrefetchInfo &pfi) overridePrefetcher::Queuedvirtual
notifyFill(const PacketPtr &pkt)Prefetcher::Baseinlinevirtual
notifyFork()Drainableinlinevirtual
observeAccess(const PacketPtr &pkt, bool miss) constPrefetcher::Baseprotected
onDataPrefetcher::Baseprotected
onInstPrefetcher::Baseprotected
onMissPrefetcher::Baseprotected
onReadPrefetcher::Baseprotected
onWritePrefetcher::Baseprotected
SimObject::operator=(const Group &)=deleteStats::Group
Clocked::operator=(Clocked &)=deleteClockedprotected
pageAddress(Addr a) constPrefetcher::Baseprotected
pageBytesPrefetcher::Baseprotected
pageIthBlockAddress(Addr page, uint32_t i) constPrefetcher::Baseprotected
pageOffset(Addr a) constPrefetcher::Baseprotected
Params typedefClockedObject
params() constClockedObjectinline
pathSerializableprivatestatic
patternSequenceTablePrefetcher::STeMSprivate
pfqPrefetcher::Queuedprotected
pfqMissingTranslationPrefetcher::Queuedprotected
powerStateClockedObject
preDumpStats()Stats::Groupvirtual
prefetchOnAccessPrefetcher::Baseprotected
prefetchStatsPrefetcher::Baseprotected
probeManagerSimObjectprivate
probeNotify(const PacketPtr &pkt, bool miss)Prefetcher::Base
processMissingTranslations(unsigned max)Prefetcher::Queuedprivate
Queued(const QueuedPrefetcherParams *p)Prefetcher::Queued
queueFilterPrefetcher::Queuedprotected
queueSizePrefetcher::Queuedprotected
queueSquashPrefetcher::Queuedprotected
reconstructionEntriesPrefetcher::STeMSprivate
reconstructSequence(CircularQueue< RegionMissOrderBufferEntry >::iterator rmob_it, std::vector< AddrPriority > &addresses)Prefetcher::STeMSprivate
regProbeListeners() overridePrefetcher::Basevirtual
regProbePoints()SimObjectvirtual
regStats()Stats::Groupvirtual
requestorIdPrefetcher::Baseprotected
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetClock() constClockedinlineprotected
resetStats()Stats::Groupvirtual
resolveStat(std::string name) constStats::Group
rmobPrefetcher::STeMSprivate
samePage(Addr a, Addr b) constPrefetcher::Baseprotected
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideClockedObjectvirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) constSerializable
serializeSection(CheckpointOut &cp, const std::string &name) constSerializableinline
setCache(BaseCache *_cache)Prefetcher::Basevirtual
setCurTick(Tick newVal)EventManagerinline
signalDrainDone() constDrainableinlineprotected
SimObject(const Params *_params)SimObject
SimObjectList typedefSimObjectprivate
simObjectListSimObjectprivatestatic
spatialRegionSizePrefetcher::STeMSprivate
spatialRegionSizeBitsPrefetcher::STeMSprivate
startup()SimObjectvirtual
statGroupsStats::Groupprivate
statsStats::Groupprivate
statsQueuedPrefetcher::Queuedprotected
STeMS(const STeMSPrefetcherParams *p)Prefetcher::STeMS
tagPrefetchPrefetcher::Queuedprotected
throttleControlPctPrefetcher::Queuedprotected
tickClockedmutableprivate
ticksToCycles(Tick t) constClockedinline
tlbPrefetcher::Baseprotected
translationComplete(DeferredPacket *dp, bool failed)Prefetcher::Queuedprivate
unserialize(CheckpointIn &cp) overrideClockedObjectvirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
update() constClockedinlineprivate
updateClockPeriod()Clockedinline
usefulPrefetchesPrefetcher::Baseprotected
useVirtualAddressesPrefetcher::Baseprotected
voltage() constClockedinline
wakeupEventQueue(Tick when=(Tick) -1)EventManagerinline
~Base()=defaultPrefetcher::Basevirtual
~Clocked()Clockedinlineprotectedvirtual
~Drainable()Drainableprotectedvirtual
~Group()Stats::Groupvirtual
~Queued()Prefetcher::Queuedvirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual
~STeMS()=defaultPrefetcher::STeMS

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