_destRegIdx | StaticInst | protected |
_numCCDestRegs | StaticInst | protected |
_numDestRegs | StaticInst | protected |
_numFPDestRegs | StaticInst | protected |
_numIntDestRegs | StaticInst | protected |
_numSrcRegs | StaticInst | protected |
_numVecDestRegs | StaticInst | protected |
_numVecElemDestRegs | StaticInst | protected |
_numVecPredDestRegs | StaticInst | protected |
_opClass | StaticInst | protected |
_srcRegIdx | StaticInst | protected |
advancePC(PCState &pc) const override | RiscvISA::RiscvStaticInst | inline |
StaticInst::advancePC(TheISA::PCState &pcState) const =0 | StaticInst | pure virtual |
asBytes(void *buf, size_t size) override | RiscvISA::RiscvStaticInst | inlinevirtual |
branchTarget(const TheISA::PCState &pc) const | StaticInst | virtual |
branchTarget(ThreadContext *tc) const | StaticInst | virtual |
cachedDisassembly | StaticInst | mutableprotected |
completeAcc(Packet *pkt, ExecContext *xc, Trace::InstRecord *traceData) const | StaticInst | inlinevirtual |
count | RefCounted | mutableprivate |
csr | RiscvISA::CSROp | protected |
CSROp(const char *mnem, MachInst _machInst, OpClass __opClass) | RiscvISA::CSROp | inlineprotected |
decref() const | RefCounted | inline |
destRegIdx(int i) const | StaticInst | inline |
disassemble(Addr pc, const Loader::SymbolTable *symtab=nullptr) const | StaticInst | virtual |
execute(ExecContext *xc, Trace::InstRecord *traceData) const =0 | StaticInst | pure virtual |
ExtMachInst typedef | StaticInst | |
fetchMicroop(MicroPC upc) const | StaticInst | virtual |
flags | StaticInst | protected |
generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override | RiscvISA::CSROp | protectedvirtual |
getName() | StaticInst | inline |
hasBranchTarget(const TheISA::PCState &pc, ThreadContext *tc, TheISA::PCState &tgt) const | StaticInst | |
incref() const | RefCounted | inline |
initiateAcc(ExecContext *xc, Trace::InstRecord *traceData) const | StaticInst | inlinevirtual |
isAtomic() const | StaticInst | inline |
isCall() const | StaticInst | inline |
isCC() const | StaticInst | inline |
isCondCtrl() const | StaticInst | inline |
isCondDelaySlot() const | StaticInst | inline |
isControl() const | StaticInst | inline |
isDataPrefetch() const | StaticInst | inline |
isDelayedCommit() const | StaticInst | inline |
isDirectCtrl() const | StaticInst | inline |
isFirstMicroop() const | StaticInst | inline |
isFloating() const | StaticInst | inline |
isHtmCancel() const | StaticInst | inline |
isHtmCmd() const | StaticInst | inline |
isHtmStart() const | StaticInst | inline |
isHtmStop() const | StaticInst | inline |
isIndirectCtrl() const | StaticInst | inline |
isInstPrefetch() const | StaticInst | inline |
isInteger() const | StaticInst | inline |
isIprAccess() const | StaticInst | inline |
isLastMicroop() const | StaticInst | inline |
isLoad() const | StaticInst | inline |
isMacroop() const | StaticInst | inline |
isMemBarrier() const | StaticInst | inline |
isMemRef() const | StaticInst | inline |
isMicroBranch() const | StaticInst | inline |
isMicroop() const | StaticInst | inline |
isNonSpeculative() const | StaticInst | inline |
isNop() const | StaticInst | inline |
isPrefetch() const | StaticInst | inline |
isQuiesce() const | StaticInst | inline |
isReturn() const | StaticInst | inline |
isSerializeAfter() const | StaticInst | inline |
isSerializeBefore() const | StaticInst | inline |
isSerializing() const | StaticInst | inline |
isSquashAfter() const | StaticInst | inline |
isStore() const | StaticInst | inline |
isStoreConditional() const | StaticInst | inline |
isSyscall() const | StaticInst | inline |
isThreadSync() const | StaticInst | inline |
isUncondCtrl() const | StaticInst | inline |
isUnverifiable() const | StaticInst | inline |
isVector() const | StaticInst | inline |
isWriteBarrier() const | StaticInst | inline |
machInst | StaticInst | |
MaxInstDestRegs enum value | StaticInst | |
MaxInstSrcRegs enum value | StaticInst | |
mnemonic | StaticInst | protected |
nopStaticInstPtr | StaticInst | static |
nullStaticInstPtr | StaticInst | static |
numCCDestRegs() const | StaticInst | inline |
numDestRegs() const | StaticInst | inline |
numFPDestRegs() const | StaticInst | inline |
numIntDestRegs() const | StaticInst | inline |
numSrcRegs() const | StaticInst | inline |
numVecDestRegs() const | StaticInst | inline |
numVecElemDestRegs() const | StaticInst | inline |
numVecPredDestRegs() const | StaticInst | inline |
opClass() const | StaticInst | inline |
operator=(const RefCounted &) | RefCounted | private |
printFlags(std::ostream &outs, const std::string &separator) const | StaticInst | |
RefCounted(const RefCounted &) | RefCounted | private |
RefCounted() | RefCounted | inline |
setDelayedCommit() | StaticInst | inline |
setFirstMicroop() | StaticInst | inline |
setFlag(Flags f) | StaticInst | inline |
setLastMicroop() | StaticInst | inline |
simpleAsBytes(void *buf, size_t max_size, const T &t) | StaticInst | inlineprotected |
srcRegIdx(int i) const | StaticInst | inline |
StaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass) | RiscvISA::RiscvStaticInst | inlineprotected |
StaticInst::StaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass) | StaticInst | inlineprotected |
uimm | RiscvISA::CSROp | protected |
~RefCounted() | RefCounted | inlinevirtual |
~StaticInst() | StaticInst | virtual |