gem5  v20.1.0.0
device.hh
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37 
38 
43 #ifndef __DEV_I2C_DEVICE_HH__
44 #define __DEV_I2C_DEVICE_HH__
45 
46 #include "base/types.hh"
47 #include "params/I2CDevice.hh"
48 #include "sim/sim_object.hh"
49 
50 class I2CDevice : public SimObject
51 {
52 
53  protected:
54 
55  uint8_t _addr;
56 
57  public:
58 
59  I2CDevice(const I2CDeviceParams* p)
60  : SimObject(p), _addr(p->i2c_addr)
61  { }
62 
63  virtual ~I2CDevice() { }
64 
72  virtual uint8_t read() = 0;
73 
81  virtual void write(uint8_t msg) = 0;
82 
88  virtual void i2cStart() = 0;
89 
90  uint8_t i2cAddr() const { return _addr; }
91 
92 };
93 
94 #endif // __DEV_I2C_DEVICE__
I2CDevice
Definition: device.hh:50
I2CDevice::i2cAddr
uint8_t i2cAddr() const
Definition: device.hh:90
I2CDevice::read
virtual uint8_t read()=0
Return the next message that the device expects to send.
I2CDevice::write
virtual void write(uint8_t msg)=0
Perform any actions triggered by an i2c write (save msg in a register, perform an interrupt,...
sim_object.hh
I2CDevice::~I2CDevice
virtual ~I2CDevice()
Definition: device.hh:63
types.hh
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
I2CDevice::I2CDevice
I2CDevice(const I2CDeviceParams *p)
Definition: device.hh:59
I2CDevice::i2cStart
virtual void i2cStart()=0
Perform any initialization necessary for the device when it received a start signal from the bus mast...
I2CDevice::_addr
uint8_t _addr
Definition: device.hh:55
SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:92

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