kernel_code.hh File Reference

#include <bitset>
#include <cstdint>

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Classes
struct	AMDKernelCode

Enumerations
enum	ScalarRegInitFields : int {   PrivateSegBuf = 0, DispatchPtr = 1, QueuePtr = 2, KernargSegPtr = 3,   DispatchId = 4, FlatScratchInit = 5, PrivateSegSize = 6, GridWorkgroupCountX = 7,   GridWorkgroupCountY = 8, GridWorkgroupCountZ = 9, WorkgroupIdX = 10, WorkgroupIdY = 11,   WorkgroupIdZ = 12, WorkgroupInfo = 13, PrivSegWaveByteOffset = 14, NumScalarInitFields = 15 }
	these enums represent the indices into the initialRegState bitfields in HsaKernelInfo. More...
enum	VectorRegInitFields : int { WorkitemIdX = 0, WorkitemIdY = 1, WorkitemIdZ = 2, NumVectorInitFields = 3 }

Enumeration Type Documentation

ScalarRegInitFields

enum ScalarRegInitFields : int

these enums represent the indices into the initialRegState bitfields in HsaKernelInfo.

each bit specifies whether or not the particular piece of state that the bit corresponds to should be initialized into the VGPRs/SGPRs. the order in which the fields are placed matters, as all enabled pieces of state will be initialized into contiguous registers in the same order as their position in the bitfield - which is specified in the HSA ABI.

Enumerator
PrivateSegBuf
DispatchPtr
QueuePtr
KernargSegPtr
DispatchId
FlatScratchInit
PrivateSegSize
GridWorkgroupCountX
GridWorkgroupCountY
GridWorkgroupCountZ
WorkgroupIdX
WorkgroupIdY
WorkgroupIdZ
WorkgroupInfo
PrivSegWaveByteOffset
NumScalarInitFields

Definition at line 55 of file kernel_code.hh.

VectorRegInitFields

enum VectorRegInitFields : int

Enumerator
WorkitemIdX
WorkitemIdY
WorkitemIdZ
NumVectorInitFields

Definition at line 75 of file kernel_code.hh.