gem5
v20.1.0.0
arch
riscv
locked_mem.cc
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#include "
arch/riscv/locked_mem.hh
"
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#include <stack>
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#include "
base/types.hh
"
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namespace
RiscvISA
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{
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std::unordered_map<int, std::stack<Addr>>
locked_addrs
;
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}
RiscvISA
Definition:
fs_workload.cc:36
RiscvISA::locked_addrs
std::unordered_map< int, std::stack< Addr > > locked_addrs
Definition:
locked_mem.cc:9
locked_mem.hh
types.hh
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