gem5
v20.1.0.0
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#include "base/inet.hh"
#include "dev/io_device.hh"
#include "dev/net/etherdevice.hh"
#include "dev/net/etherint.hh"
#include "dev/net/etherpkt.hh"
#include "dev/net/ns_gige_reg.h"
#include "dev/net/pktfifo.hh"
#include "params/NSGigE.hh"
#include "sim/eventq.hh"
Go to the source code of this file.
Classes | |
struct | dp_regs |
Ethernet device registers. More... | |
struct | dp_rom |
class | NSGigE |
NS DP83820 Ethernet device model. More... | |
class | NSGigEInt |
Variables | |
const uint16_t | FHASH_ADDR = 0x100 |
const uint16_t | FHASH_SIZE = 0x100 |
const uint8_t | EEPROM_READ = 0x2 |
const uint8_t | EEPROM_SIZE = 64 |
const uint8_t | EEPROM_PMATCH2_ADDR = 0xA |
const uint8_t | EEPROM_PMATCH1_ADDR = 0xB |
const uint8_t | EEPROM_PMATCH0_ADDR = 0xC |
Device module for modelling the National Semiconductor DP83820 ethernet controller
Definition in file ns_gige.hh.
const uint8_t EEPROM_PMATCH0_ADDR = 0xC |
Definition at line 56 of file ns_gige.hh.
Referenced by NSGigE::eepromKick().
const uint8_t EEPROM_PMATCH1_ADDR = 0xB |
Definition at line 55 of file ns_gige.hh.
Referenced by NSGigE::eepromKick().
const uint8_t EEPROM_PMATCH2_ADDR = 0xA |
Definition at line 54 of file ns_gige.hh.
Referenced by NSGigE::eepromKick().
const uint8_t EEPROM_READ = 0x2 |
Definition at line 52 of file ns_gige.hh.
Referenced by NSGigE::eepromKick().
const uint8_t EEPROM_SIZE = 64 |
Definition at line 53 of file ns_gige.hh.
Referenced by NSGigE::eepromKick(), and IGbE::write().
const uint16_t FHASH_ADDR = 0x100 |
Definition at line 48 of file ns_gige.hh.
Referenced by NSGigE::read(), and NSGigE::write().
const uint16_t FHASH_SIZE = 0x100 |
Definition at line 49 of file ns_gige.hh.
Referenced by NSGigE::read(), NSGigE::serialize(), NSGigE::unserialize(), and NSGigE::write().