gem5  v20.1.0.0
Classes | Namespaces | Typedefs | Enumerations | Variables
reg_class.hh File Reference
#include <cassert>
#include <cstddef>
#include "arch/generic/types.hh"
#include "arch/registers.hh"
#include "config/the_isa.hh"

Go to the source code of this file.

Classes

class  RegId
 Register ID: describe an architectural register with its class and index. More...
 
class  PhysRegId
 Physical register ID. More...
 
struct  std::hash< RegId >
 

Namespaces

 std
 Overload hash function for BasicBlockRange type.
 

Typedefs

using PhysRegIndex = short int
 Physical register index type. More...
 
using PhysRegIdPtr = PhysRegId *
 

Enumerations

enum  RegClass {
  IntRegClass, FloatRegClass, VecRegClass, VecElemClass,
  VecPredRegClass, CCRegClass, MiscRegClass
}
 Enumerate the classes of registers. More...
 

Variables

const int NumRegClasses = MiscRegClass + 1
 Number of register classes. More...
 

Typedef Documentation

◆ PhysRegIdPtr

Definition at line 346 of file reg_class.hh.

◆ PhysRegIndex

using PhysRegIndex = short int

Physical register index type.

Although the Impl might be a better for this, but there are a few classes that need this typedef yet are not templated on the Impl.

Definition at line 217 of file reg_class.hh.

Enumeration Type Documentation

◆ RegClass

enum RegClass

Enumerate the classes of registers.

Enumerator
IntRegClass 

Integer register.

FloatRegClass 

Floating-point register.

VecRegClass 

Vector Register.

VecElemClass 

Vector Register Native Elem lane.

VecPredRegClass 
CCRegClass 

Condition-code register.

MiscRegClass 

Control (misc) register.

Definition at line 52 of file reg_class.hh.

Variable Documentation

◆ NumRegClasses

const int NumRegClasses = MiscRegClass + 1

Number of register classes.

This value is not part of the enum, because putting it there makes the compiler complain about unhandled cases in some switch statements.

Definition at line 68 of file reg_class.hh.


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