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42 #ifndef __CPU_O3_RENAME_HH__
43 #define __CPU_O3_RENAME_HH__
49 #include "config/the_isa.hh"
53 struct DerivO3CPUParams;
72 typedef typename Impl::CPUPol
CPUPol;
74 typedef typename Impl::O3CPU
O3CPU;
83 typedef typename CPUPol::IEW
IEW;
84 typedef typename CPUPol::Commit
Commit;
134 std::string
name()
const;
539 #endif // __CPU_O3_RENAME_HH__
void rename(bool &status_change, ThreadID tid)
Determines what to do based on rename's current status.
void skidInsert(ThreadID tid)
Inserts unused instructions from a given thread into the skid buffer, to be renamed once rename unblo...
int decodeToRenameDelay
Delay between decode and rename, in ticks.
bool checkStall(ThreadID tid)
Checks if any stages are telling rename to block.
bool skidsEmpty()
Returns if all of the skid buffers are empty.
FreeEntries freeEntries[Impl::MaxThreads]
Per-thread tracking of the number of free entries of back-end structures.
RenameHistory(InstSeqNum _instSeqNum, const RegId &_archReg, PhysRegIdPtr _newPhysReg, PhysRegIdPtr _prevPhysReg)
Stats::Scalar serializeStallCycles
Stat for total number of cycles spent stalling for a serializing inst.
unsigned skidBufferMax
The maximum skid buffer size.
Stats::Scalar renamedInsts
Stat for total number of renamed instructions.
int calcFreeIQEntries(ThreadID tid)
Calculates the number of free IQ entries for a specific thread.
Stats::Scalar skidInsts
Number of instructions inserted into skid buffers.
RegId archReg
The architectural register index that was renamed.
void dumpHistory()
Debugging function used to dump history buffer of renamings.
void tick()
Ticks rename, which processes all input signals and attempts to rename as many instructions as possib...
int storesInProgress[Impl::MaxThreads]
Count of Store instructions in progress that have been sent off to the IQ and ROB,...
void setDecodeQueue(TimeBuffer< DecodeStruct > *dq_ptr)
Sets pointer to time buffer coming from decode.
int16_t ThreadID
Thread index/ID type.
bool emptyROB[Impl::MaxThreads]
Records if the ROB is empty.
InstQueue insts[Impl::MaxThreads]
Queue of all instructions coming from decode this cycle.
void removeFromHistory(InstSeqNum inst_seq_num, ThreadID tid)
Removes a committed instruction's rename history.
void setFreeList(FreeList *fl_ptr)
Sets pointer to the free list.
Stats::Scalar tempSerializing
Number of instructions marked as temporarily serializing.
TimeBuffer< TimeStruct >::wire toDecode
Wire to write infromation heading to previous stages.
Stats::Scalar blockCycles
Stat for total number of cycles spent blocking.
std::pair< InstSeqNum, PhysRegIdPtr > SeqNumRegPair
Probe points.
TimeBuffer< DecodeStruct > * decodeQueue
Decode instruction queue interface.
TimeBuffer< DecodeStruct >::wire fromDecode
Wire to get decode's output from decode queue.
void setRenameQueue(TimeBuffer< RenameStruct > *rq_ptr)
Sets pointer to time buffer used to communicate to the next stage.
CPUPol::RenameStruct RenameStruct
void setTimeBuffer(TimeBuffer< TimeStruct > *tb_ptr)
Sets the main backwards communication time buffer pointer.
void readStallSignals(ThreadID tid)
Reads signals telling rename to block/unblock.
void renameInsts(ThreadID tid)
Renames instructions for the given thread.
bool checkSignalsAndUpdate(ThreadID tid)
Checks the signals and updates the status.
Stats::Scalar vecPredLookups
std::list< RenameHistory > historyBuffer[Impl::MaxThreads]
A per-thread list of all destination register renames, used to either undo rename mappings or free ol...
int calcFreeSQEntries(ThreadID tid)
Calculates the number of free SQ entries for a specific thread.
void clearStates(ThreadID tid)
Clear all thread-specific states.
void resetStage()
Reset this pipeline stage.
Register ID: describe an architectural register with its class and index.
TimeBuffer< TimeStruct >::wire fromIEW
Wire to get IEW's output from backwards time buffer.
void startupStage()
Initializes variables for the stage.
bool blockThisCycle
Whether or not rename needs to block this cycle.
Stats::Scalar undoneMaps
Stat for total number of mappings that were undone due to a squash.
RenameStatus
Overall rename status.
void updateStatus()
Updates overall rename status based on all of the threads' statuses.
std::list< ThreadID > * activeThreads
Pointer to the list of active threads.
This is a simple scalar statistic, like a counter.
CPUPol::TimeStruct TimeStruct
bool resumeUnblocking
Whether or not rename needs to resume clearing out the skidbuffer after squashing.
Stalls stalls[Impl::MaxThreads]
Tracks which stages are telling decode to stall.
FullSource
Enum to record the source of a structure full stall.
PhysRegIdPtr newPhysReg
The new physical register that the arch.
void takeOverFrom()
Takes over from another CPU's thread.
int calcFreeLQEntries(ThreadID tid)
Calculates the number of free LQ entries for a specific thread.
O3CPU * cpu
Pointer to CPU.
void setScoreboard(Scoreboard *_scoreboard)
Sets pointer to the scoreboard.
Holds the information for each destination register rename.
void readFreeEntries(ThreadID tid)
Gets the number of free entries for a specific thread.
Stats::Scalar unblockCycles
Stat for total number of cycles spent unblocking.
Source of possible stalls.
Scoreboard * scoreboard
Pointer to the scoreboard.
FreeList * freeList
Free list interface.
bool isDrained() const
Has the stage drained?
void incrFullStat(const FullSource &source)
Function used to increment the stat that corresponds to the source of the stall.
CPUPol::RenameMap RenameMap
RenameStats(Stats::Group *parent)
void setCommitStage(Commit *commit_stage)
Sets pointer to commit stage.
DynInstPtr serializeInst[Impl::MaxThreads]
The serialize instruction that rename has stalled on.
Stats::Scalar LQFullEvents
Stat for total number of times that the LQ starts a stall in rename.
void sortInsts()
Separates instructions from decode into individual lists of instructions sorted by thread.
bool wroteToTimeBuffer
Variable that tracks if decode has written to the time buffer this cycle.
bool block(ThreadID tid)
Switches rename to blocking, and signals back that rename has become blocked.
void renameSrcRegs(const DynInstPtr &inst, ThreadID tid)
Renames the source registers of an instruction.
Stats::Scalar squashCycles
Stat for total number of cycles spent squashing.
Stats::Scalar SQFullEvents
Stat for total number of times that the SQ starts a stall in rename.
IEW * iew_ptr
Pointer to IEW stage.
void squash(const InstSeqNum &squash_seq_num, ThreadID tid)
Squashes all instructions in a thread.
void regProbePoints()
Registers probes.
Stats::Scalar squashedInsts
Stat for total number of squashed instructions that rename discards.
void setIEWStage(IEW *iew_stage)
Sets pointer to IEW stage.
Stats::Scalar IQFullEvents
Stat for total number of times that the IQ starts a stall in rename.
Stats::Scalar fullRegistersEvents
Stat for total number of times that rename runs out of free registers to use to rename.
void setRenameMap(RenameMap rm_ptr[Impl::MaxThreads])
Sets pointer to rename maps (per-thread structures).
void renameDestRegs(const DynInstPtr &inst, ThreadID tid)
Renames the destination registers of an instruction.
unsigned toIEWIndex
The index of the instruction in the time buffer to IEW that rename is currently using.
Impl::DynInstPtr DynInstPtr
DefaultRename(O3CPU *_cpu, DerivO3CPUParams *params)
DefaultRename constructor.
Stats::Scalar committedMaps
Stat for total number of committed renaming mappings.
Structures whose free entries impact the amount of instructions that can be renamed.
void serializeAfter(InstQueue &inst_list, ThreadID tid)
Either serializes on the next instruction available in the InstQueue, or records that it must seriali...
bool resumeSerialize
Whether or not rename needs to resume a serialize instruction after squashing.
void doSquash(const InstSeqNum &squash_seq_num, ThreadID tid)
Executes actual squash, removing squashed instructions.
DefaultRename::RenameStats stats
std::string name() const
Returns the name of rename.
TimeBuffer< RenameStruct > * renameQueue
Rename instruction queue.
unsigned commitWidth
Commit width, in instructions.
Stats::Scalar runCycles
Stat for total number of cycles spent running normally.
void setActiveThreads(std::list< ThreadID > *at_ptr)
Sets pointer to list of active threads.
bool unblock(ThreadID tid)
Switches rename to unblocking if the skid buffer is empty, and signals back that rename has unblocked...
TimeBuffer< TimeStruct > * timeBuffer
Pointer to main time buffer used for backwards communication.
RenameStatus _status
Rename status.
ThreadStatus renameStatus[Impl::MaxThreads]
Per-thread status.
InstQueue skidBuffer[Impl::MaxThreads]
Skid buffer between rename and decode.
CPUPol::DecodeStruct DecodeStruct
RenameMap * renameMap[Impl::MaxThreads]
Rename map interface.
int instsInProgress[Impl::MaxThreads]
Count of instructions in progress that have been sent off to the IQ and ROB, but are not yet included...
Stats::Scalar idleCycles
Stat for total number of cycles spent idle.
Commit * commit_ptr
Pointer to commit stage.
int calcFreeROBEntries(ThreadID tid)
Calculates the number of free ROB entries for a specific thread.
ProbePointArg< DynInstPtr > * ppRename
To probe when register renaming for an instruction is complete.
ThreadStatus
Individual thread status.
std::deque< DynInstPtr > InstQueue
CPUPol::FreeList FreeList
void drainSanityCheck() const
Perform sanity checks after a drain.
Stats::Scalar ROBFullEvents
Stat for total number of times that the ROB starts a stall in rename.
PhysRegIdPtr prevPhysReg
The old physical register that the arch.
unsigned validInsts()
Returns the number of valid instructions coming from decode.
unsigned commitToRenameDelay
Delay between commit and rename, in ticks.
bool serializeOnNextInst[Impl::MaxThreads]
Records if rename needs to serialize on the next instruction for any thread.
TimeBuffer< RenameStruct >::wire toIEW
Wire to write any information heading to IEW.
ThreadID numThreads
The number of threads active in rename.
InstSeqNum instSeqNum
The sequence number of the instruction that renamed.
Stats::Scalar serializing
Number of serialize instructions handled.
Stats::Scalar lookups
Stat for total number of source register rename lookups.
int loadsInProgress[Impl::MaxThreads]
Count of Load instructions in progress that have been sent off to the IQ and ROB, but are not yet inc...
ProbePointArg< SeqNumRegPair > * ppSquashInRename
To probe when an instruction is squashed and the register mapping for it needs to be undone.
Implements a simple scoreboard to track which registers are ready.
DefaultRename handles both single threaded and SMT rename.
int iewToRenameDelay
Delay between iew and rename, in ticks.
Stats::Scalar renamedOperands
Stat for total number of renamed destination registers.
TimeBuffer< TimeStruct >::wire fromCommit
Wire to get commit's output from backwards time buffer.
unsigned renameWidth
Rename width, in instructions.
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