gem5
v20.1.0.0
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#include <iostream>
#include <utility>
#include <vector>
#include "arch/types.hh"
#include "config/the_isa.hh"
#include "cpu/o3/free_list.hh"
#include "cpu/o3/regfile.hh"
#include "cpu/reg_class.hh"
#include "enums/VecRegRenameMode.hh"
Go to the source code of this file.
Classes | |
class | SimpleRenameMap |
Register rename map for a single class of registers (e.g., integer or floating point). More... | |
class | UnifiedRenameMap |
Unified register rename map for all classes of registers. More... | |