#include <stdint.h>
#include "base/bitunion.hh"
Go to the source code of this file.
|
| enum | { SMMU_SECURE_SZ = 0x184,
SMMU_PAGE_ZERO_SZ = 0x10000,
SMMU_PAGE_ONE_SZ = 0x10000,
SMMU_REG_SIZE = SMMU_PAGE_ONE_SZ + SMMU_PAGE_ZERO_SZ
} |
| |
| enum | {
STE_CONFIG_ABORT = 0x0,
STE_CONFIG_BYPASS = 0x4,
STE_CONFIG_STAGE1_ONLY = 0x5,
STE_CONFIG_STAGE2_ONLY = 0x6,
STE_CONFIG_STAGE1_AND_2 = 0x7
} |
| |
| enum | { STAGE1_CFG_1L = 0x0,
STAGE1_CFG_2L_4K = 0x1,
STAGE1_CFG_2L_64K = 0x2
} |
| |
| enum | { ST_CFG_SPLIT_SHIFT = 6,
ST_CD_ADDR_SHIFT = 6,
CD_TTB_SHIFT = 4,
STE_S2TTB_SHIFT = 4
} |
| |
| enum | { TRANS_GRANULE_4K = 0x0,
TRANS_GRANULE_64K = 0x1,
TRANS_GRANULE_16K = 0x2,
TRANS_GRANULE_INVALID = 0x3
} |
| |
| enum | {
ST_BASE_ADDR_MASK = 0x0000ffffffffffe0ULL,
ST_CFG_SIZE_MASK = 0x000000000000003fULL,
ST_CFG_SPLIT_MASK = 0x00000000000007c0ULL,
ST_CFG_FMT_MASK = 0x0000000000030000ULL,
ST_CFG_FMT_LINEAR = 0x0000000000000000ULL,
ST_CFG_FMT_2LEVEL = 0x0000000000010000ULL,
ST_L2_SPAN_MASK = 0x000000000000001fULL,
ST_L2_ADDR_MASK = 0x0000ffffffffffe0ULL,
VMT_BASE_ADDR_MASK = 0x0000ffffffffffe0ULL,
VMT_BASE_SIZE_MASK = 0x000000000000001fULL,
Q_BASE_ADDR_MASK = 0x0000ffffffffffe0ULL,
Q_BASE_SIZE_MASK = 0x000000000000001fULL,
E_BASE_ENABLE_MASK = 0x8000000000000000ULL,
E_BASE_ADDR_MASK = 0x0000fffffffffffcULL
} |
| |
| enum | {
CR0_SMMUEN_MASK = 0x1,
CR0_PRIQEN_MASK = 0x2,
CR0_EVENTQEN_MASK = 0x4,
CR0_CMDQEN_MASK = 0x8,
CR0_ATSCHK_MASK = 0x10,
CR0_VMW_MASK = 0x1C0
} |
| |
| enum | SMMUCommandType {
CMD_PRF_CONFIG = 0x01,
CMD_PRF_ADDR = 0x02,
CMD_CFGI_STE = 0x03,
CMD_CFGI_STE_RANGE = 0x04,
CMD_CFGI_CD = 0x05,
CMD_CFGI_CD_ALL = 0x06,
CMD_TLBI_NH_ALL = 0x10,
CMD_TLBI_NH_ASID = 0x11,
CMD_TLBI_NH_VAA = 0x13,
CMD_TLBI_NH_VA = 0x12,
CMD_TLBI_EL3_ALL = 0x18,
CMD_TLBI_EL3_VA = 0x1A,
CMD_TLBI_EL2_ALL = 0x20,
CMD_TLBI_EL2_ASID = 0x21,
CMD_TLBI_EL2_VA = 0x22,
CMD_TLBI_EL2_VAA = 0x23,
CMD_TLBI_S2_IPA = 0x2a,
CMD_TLBI_S12_VMALL = 0x28,
CMD_TLBI_NSNH_ALL = 0x30,
CMD_ATC_INV = 0x40,
CMD_PRI_RESP = 0x41,
CMD_RESUME = 0x44,
CMD_STALL_TERM = 0x45,
CMD_SYNC = 0x46
} |
| |
| enum | SMMUEventTypes { EVT_FAULT = 0x0001
} |
| |
| enum | SMMUEventFlags { EVF_WRITE = 0x0001
} |
| |
| enum | { SMMU_MAX_TRANS_ID = 64
} |
| |
◆ anonymous enum
| Enumerator |
|---|
| SMMU_SECURE_SZ | |
| SMMU_PAGE_ZERO_SZ | |
| SMMU_PAGE_ONE_SZ | |
| SMMU_REG_SIZE | |
Definition at line 45 of file smmu_v3_defs.hh.
◆ anonymous enum
| Enumerator |
|---|
| STE_CONFIG_ABORT | |
| STE_CONFIG_BYPASS | |
| STE_CONFIG_STAGE1_ONLY | |
| STE_CONFIG_STAGE2_ONLY | |
| STE_CONFIG_STAGE1_AND_2 | |
Definition at line 52 of file smmu_v3_defs.hh.
◆ anonymous enum
| Enumerator |
|---|
| STAGE1_CFG_1L | |
| STAGE1_CFG_2L_4K | |
| STAGE1_CFG_2L_64K | |
Definition at line 60 of file smmu_v3_defs.hh.
◆ anonymous enum
| Enumerator |
|---|
| ST_CFG_SPLIT_SHIFT | |
| ST_CD_ADDR_SHIFT | |
| CD_TTB_SHIFT | |
| STE_S2TTB_SHIFT | |
Definition at line 66 of file smmu_v3_defs.hh.
◆ anonymous enum
| Enumerator |
|---|
| TRANS_GRANULE_4K | |
| TRANS_GRANULE_64K | |
| TRANS_GRANULE_16K | |
| TRANS_GRANULE_INVALID | |
Definition at line 73 of file smmu_v3_defs.hh.
◆ anonymous enum
| Enumerator |
|---|
| ST_BASE_ADDR_MASK | |
| ST_CFG_SIZE_MASK | |
| ST_CFG_SPLIT_MASK | |
| ST_CFG_FMT_MASK | |
| ST_CFG_FMT_LINEAR | |
| ST_CFG_FMT_2LEVEL | |
| ST_L2_SPAN_MASK | |
| ST_L2_ADDR_MASK | |
| VMT_BASE_ADDR_MASK | |
| VMT_BASE_SIZE_MASK | |
| Q_BASE_ADDR_MASK | |
| Q_BASE_SIZE_MASK | |
| E_BASE_ENABLE_MASK | |
| E_BASE_ADDR_MASK | |
Definition at line 80 of file smmu_v3_defs.hh.
◆ anonymous enum
| Enumerator |
|---|
| CR0_SMMUEN_MASK | |
| CR0_PRIQEN_MASK | |
| CR0_EVENTQEN_MASK | |
| CR0_CMDQEN_MASK | |
| CR0_ATSCHK_MASK | |
| CR0_VMW_MASK | |
Definition at line 312 of file smmu_v3_defs.hh.
◆ anonymous enum
◆ SMMUCommandType
| Enumerator |
|---|
| CMD_PRF_CONFIG | |
| CMD_PRF_ADDR | |
| CMD_CFGI_STE | |
| CMD_CFGI_STE_RANGE | |
| CMD_CFGI_CD | |
| CMD_CFGI_CD_ALL | |
| CMD_TLBI_NH_ALL | |
| CMD_TLBI_NH_ASID | |
| CMD_TLBI_NH_VAA | |
| CMD_TLBI_NH_VA | |
| CMD_TLBI_EL3_ALL | |
| CMD_TLBI_EL3_VA | |
| CMD_TLBI_EL2_ALL | |
| CMD_TLBI_EL2_ASID | |
| CMD_TLBI_EL2_VA | |
| CMD_TLBI_EL2_VAA | |
| CMD_TLBI_S2_IPA | |
| CMD_TLBI_S12_VMALL | |
| CMD_TLBI_NSNH_ALL | |
| CMD_ATC_INV | |
| CMD_PRI_RESP | |
| CMD_RESUME | |
| CMD_STALL_TERM | |
| CMD_SYNC | |
Definition at line 321 of file smmu_v3_defs.hh.
◆ SMMUEventFlags
◆ SMMUEventTypes