gem5
v21.0.1.0
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- m -
M5_AT_SYSINFO :
X86ISA
M5_AT_SYSINFO_EHDR :
X86ISA
MAX_ASI :
SparcISA
MAX_LOOKUP_LEVELS :
ArmISA
Max_Reg_Index :
X86ISA
MaxNormalTaskId :
ContextSwitchTaskId
MediaMultHiOp :
X86ISA
MediaScalarOp :
X86ISA
MediaSignedOp :
X86ISA
MemoryMsn :
Iris
Mips :
Loader
Misc_Reg_Base :
X86ISA
MISCREG_ACTLR :
ArmISA
MISCREG_ACTLR_EL1 :
ArmISA
MISCREG_ACTLR_EL2 :
ArmISA
MISCREG_ACTLR_EL3 :
ArmISA
MISCREG_ACTLR_NS :
ArmISA
MISCREG_ACTLR_S :
ArmISA
MISCREG_ADFSR :
ArmISA
MISCREG_ADFSR_NS :
ArmISA
MISCREG_ADFSR_S :
ArmISA
MISCREG_AFSR0_EL1 :
ArmISA
MISCREG_AFSR0_EL12 :
ArmISA
MISCREG_AFSR0_EL2 :
ArmISA
MISCREG_AFSR0_EL3 :
ArmISA
MISCREG_AFSR1_EL1 :
ArmISA
MISCREG_AFSR1_EL12 :
ArmISA
MISCREG_AFSR1_EL2 :
ArmISA
MISCREG_AFSR1_EL3 :
ArmISA
MISCREG_AIDR :
ArmISA
MISCREG_AIDR_EL1 :
ArmISA
MISCREG_AIFSR :
ArmISA
MISCREG_AIFSR_NS :
ArmISA
MISCREG_AIFSR_S :
ArmISA
MISCREG_AMAIR0 :
ArmISA
MISCREG_AMAIR0_NS :
ArmISA
MISCREG_AMAIR0_S :
ArmISA
MISCREG_AMAIR1 :
ArmISA
MISCREG_AMAIR1_NS :
ArmISA
MISCREG_AMAIR1_S :
ArmISA
MISCREG_AMAIR_EL1 :
ArmISA
MISCREG_AMAIR_EL12 :
ArmISA
MISCREG_AMAIR_EL2 :
ArmISA
MISCREG_AMAIR_EL3 :
ArmISA
MISCREG_APDAKeyHi_EL1 :
ArmISA
MISCREG_APDAKeyLo_EL1 :
ArmISA
MISCREG_APDBKeyHi_EL1 :
ArmISA
MISCREG_APDBKeyLo_EL1 :
ArmISA
MISCREG_APGAKeyHi_EL1 :
ArmISA
MISCREG_APGAKeyLo_EL1 :
ArmISA
MISCREG_APIAKeyHi_EL1 :
ArmISA
MISCREG_APIAKeyLo_EL1 :
ArmISA
MISCREG_APIBKeyHi_EL1 :
ArmISA
MISCREG_APIBKeyLo_EL1 :
ArmISA
MISCREG_APIC_BASE :
X86ISA
MISCREG_ARCHID :
RiscvISA
MISCREG_ASI :
SparcISA
MISCREG_AT_S12E0R_Xt :
ArmISA
MISCREG_AT_S12E0W_Xt :
ArmISA
MISCREG_AT_S12E1R_Xt :
ArmISA
MISCREG_AT_S12E1W_Xt :
ArmISA
MISCREG_AT_S1E0R_Xt :
ArmISA
MISCREG_AT_S1E0W_Xt :
ArmISA
MISCREG_AT_S1E1R_Xt :
ArmISA
MISCREG_AT_S1E1W_Xt :
ArmISA
MISCREG_AT_S1E2R_Xt :
ArmISA
MISCREG_AT_S1E2W_Xt :
ArmISA
MISCREG_AT_S1E3R_Xt :
ArmISA
MISCREG_AT_S1E3W_Xt :
ArmISA
MISCREG_ATS12NSOPR :
ArmISA
MISCREG_ATS12NSOPW :
ArmISA
MISCREG_ATS12NSOUR :
ArmISA
MISCREG_ATS12NSOUW :
ArmISA
MISCREG_ATS1CPR :
ArmISA
MISCREG_ATS1CPW :
ArmISA
MISCREG_ATS1CUR :
ArmISA
MISCREG_ATS1CUW :
ArmISA
MISCREG_ATS1HR :
ArmISA
MISCREG_ATS1HW :
ArmISA
MISCREG_BADVADDR :
MipsISA
MISCREG_BANKED :
ArmISA
MISCREG_BANKED64 :
ArmISA
MISCREG_BANKED_CHILD :
ArmISA
MISCREG_BPIALL :
ArmISA
MISCREG_BPIALLIS :
ArmISA
MISCREG_BPIMVA :
ArmISA
MISCREG_CACHEERR0 :
MipsISA
MISCREG_CACHEERR1 :
MipsISA
MISCREG_CACHEERR2 :
MipsISA
MISCREG_CACHEERR3 :
MipsISA
MISCREG_CAUSE :
MipsISA
MISCREG_CBAR :
ArmISA
MISCREG_CBAR_EL1 :
ArmISA
MISCREG_CCSIDR :
ArmISA
MISCREG_CCSIDR_EL1 :
ArmISA
MISCREG_CLIDR :
ArmISA
MISCREG_CLIDR_EL1 :
ArmISA
MISCREG_CNTFRQ :
ArmISA
MISCREG_CNTFRQ_EL0 :
ArmISA
MISCREG_CNTHCTL :
ArmISA
MISCREG_CNTHCTL_EL2 :
ArmISA
MISCREG_CNTHP_CTL :
ArmISA
MISCREG_CNTHP_CTL_EL2 :
ArmISA
MISCREG_CNTHP_CVAL :
ArmISA
MISCREG_CNTHP_CVAL_EL2 :
ArmISA
MISCREG_CNTHP_TVAL :
ArmISA
MISCREG_CNTHP_TVAL_EL2 :
ArmISA
MISCREG_CNTHPS_CTL_EL2 :
ArmISA
MISCREG_CNTHPS_CVAL_EL2 :
ArmISA
MISCREG_CNTHPS_TVAL_EL2 :
ArmISA
MISCREG_CNTHV_CTL_EL2 :
ArmISA
MISCREG_CNTHV_CVAL_EL2 :
ArmISA
MISCREG_CNTHV_TVAL_EL2 :
ArmISA
MISCREG_CNTHVS_CTL_EL2 :
ArmISA
MISCREG_CNTHVS_CVAL_EL2 :
ArmISA
MISCREG_CNTHVS_TVAL_EL2 :
ArmISA
MISCREG_CNTKCTL :
ArmISA
MISCREG_CNTKCTL_EL1 :
ArmISA
MISCREG_CNTKCTL_EL12 :
ArmISA
MISCREG_CNTP_CTL :
ArmISA
MISCREG_CNTP_CTL_EL0 :
ArmISA
MISCREG_CNTP_CTL_EL02 :
ArmISA
MISCREG_CNTP_CTL_NS :
ArmISA
MISCREG_CNTP_CTL_S :
ArmISA
MISCREG_CNTP_CVAL :
ArmISA
MISCREG_CNTP_CVAL_EL0 :
ArmISA
MISCREG_CNTP_CVAL_EL02 :
ArmISA
MISCREG_CNTP_CVAL_NS :
ArmISA
MISCREG_CNTP_CVAL_S :
ArmISA
MISCREG_CNTP_TVAL :
ArmISA
MISCREG_CNTP_TVAL_EL0 :
ArmISA
MISCREG_CNTP_TVAL_EL02 :
ArmISA
MISCREG_CNTP_TVAL_NS :
ArmISA
MISCREG_CNTP_TVAL_S :
ArmISA
MISCREG_CNTPCT :
ArmISA
MISCREG_CNTPCT_EL0 :
ArmISA
MISCREG_CNTPS_CTL_EL1 :
ArmISA
MISCREG_CNTPS_CVAL_EL1 :
ArmISA
MISCREG_CNTPS_TVAL_EL1 :
ArmISA
MISCREG_CNTV_CTL :
ArmISA
MISCREG_CNTV_CTL_EL0 :
ArmISA
MISCREG_CNTV_CTL_EL02 :
ArmISA
MISCREG_CNTV_CVAL :
ArmISA
MISCREG_CNTV_CVAL_EL0 :
ArmISA
MISCREG_CNTV_CVAL_EL02 :
ArmISA
MISCREG_CNTV_TVAL :
ArmISA
MISCREG_CNTV_TVAL_EL0 :
ArmISA
MISCREG_CNTV_TVAL_EL02 :
ArmISA
MISCREG_CNTVCT :
ArmISA
MISCREG_CNTVCT_EL0 :
ArmISA
MISCREG_CNTVOFF :
ArmISA
MISCREG_CNTVOFF_EL2 :
ArmISA
MISCREG_COMPARE :
MipsISA
MISCREG_CONFIG :
MipsISA
MISCREG_CONFIG1 :
MipsISA
MISCREG_CONFIG2 :
MipsISA
MISCREG_CONFIG3 :
MipsISA
MISCREG_CONFIG4 :
MipsISA
MISCREG_CONFIG5 :
MipsISA
MISCREG_CONFIG6 :
MipsISA
MISCREG_CONFIG7 :
MipsISA
MISCREG_CONTEXT :
MipsISA
MISCREG_CONTEXT_CONFIG :
MipsISA
MISCREG_CONTEXTIDR :
ArmISA
MISCREG_CONTEXTIDR_EL1 :
ArmISA
MISCREG_CONTEXTIDR_EL12 :
ArmISA
MISCREG_CONTEXTIDR_EL2 :
ArmISA
MISCREG_CONTEXTIDR_NS :
ArmISA
MISCREG_CONTEXTIDR_S :
ArmISA
MISCREG_COUNT :
MipsISA
MISCREG_CP0_RANDOM :
MipsISA
MISCREG_CP14_UNIMPL :
ArmISA
MISCREG_CP15_UNIMPL :
ArmISA
MISCREG_CP15DMB :
ArmISA
MISCREG_CP15DSB :
ArmISA
MISCREG_CP15ISB :
ArmISA
MISCREG_CPACR :
ArmISA
MISCREG_CPACR_EL1 :
ArmISA
MISCREG_CPACR_EL12 :
ArmISA
MISCREG_CPSR :
ArmISA
MISCREG_CPSR_MODE :
ArmISA
MISCREG_CPSR_Q :
ArmISA
MISCREG_CPTR_EL2 :
ArmISA
MISCREG_CPTR_EL3 :
ArmISA
MISCREG_CPUACTLR_EL1 :
ArmISA
MISCREG_CPUECTLR_EL1 :
ArmISA
MISCREG_CPUMERRSR :
ArmISA
MISCREG_CPUMERRSR_EL1 :
ArmISA
MISCREG_CR0 :
X86ISA
MISCREG_CR1 :
X86ISA
MISCREG_CR10 :
X86ISA
MISCREG_CR11 :
X86ISA
MISCREG_CR12 :
X86ISA
MISCREG_CR13 :
X86ISA
MISCREG_CR14 :
X86ISA
MISCREG_CR15 :
X86ISA
MISCREG_CR2 :
X86ISA
MISCREG_CR3 :
X86ISA
MISCREG_CR4 :
X86ISA
MISCREG_CR5 :
X86ISA
MISCREG_CR6 :
X86ISA
MISCREG_CR7 :
X86ISA
MISCREG_CR8 :
X86ISA
MISCREG_CR9 :
X86ISA
MISCREG_CR_BASE :
X86ISA
MISCREG_CS :
X86ISA
MISCREG_CS_ATTR :
X86ISA
MISCREG_CS_BASE :
X86ISA
MISCREG_CS_EFF_BASE :
X86ISA
MISCREG_CS_LIMIT :
X86ISA
MISCREG_CSSELR :
ArmISA
MISCREG_CSSELR_EL1 :
ArmISA
MISCREG_CSSELR_NS :
ArmISA
MISCREG_CSSELR_S :
ArmISA
MISCREG_CSTAR :
X86ISA
MISCREG_CTR :
ArmISA
MISCREG_CTR_EL0 :
ArmISA
MISCREG_CURRENTEL :
ArmISA
MISCREG_CWP :
SparcISA
MISCREG_CYCLE :
RiscvISA
MISCREG_DACR :
ArmISA
MISCREG_DACR32_EL2 :
ArmISA
MISCREG_DACR_NS :
ArmISA
MISCREG_DACR_S :
ArmISA
MISCREG_DAIF :
ArmISA
MISCREG_DATAHI1 :
MipsISA
MISCREG_DATAHI3 :
MipsISA
MISCREG_DATAHI5 :
MipsISA
MISCREG_DATAHI7 :
MipsISA
MISCREG_DATALO1 :
MipsISA
MISCREG_DATALO3 :
MipsISA
MISCREG_DATALO5 :
MipsISA
MISCREG_DATALO7 :
MipsISA
MISCREG_DBGAUTHSTATUS :
ArmISA
MISCREG_DBGAUTHSTATUS_EL1 :
ArmISA
MISCREG_DBGBCR0 :
ArmISA
MISCREG_DBGBCR0_EL1 :
ArmISA
MISCREG_DBGBCR1 :
ArmISA
MISCREG_DBGBCR10 :
ArmISA
MISCREG_DBGBCR10_EL1 :
ArmISA
MISCREG_DBGBCR11 :
ArmISA
MISCREG_DBGBCR11_EL1 :
ArmISA
MISCREG_DBGBCR12 :
ArmISA
MISCREG_DBGBCR12_EL1 :
ArmISA
MISCREG_DBGBCR13 :
ArmISA
MISCREG_DBGBCR13_EL1 :
ArmISA
MISCREG_DBGBCR14 :
ArmISA
MISCREG_DBGBCR14_EL1 :
ArmISA
MISCREG_DBGBCR15 :
ArmISA
MISCREG_DBGBCR15_EL1 :
ArmISA
MISCREG_DBGBCR1_EL1 :
ArmISA
MISCREG_DBGBCR2 :
ArmISA
MISCREG_DBGBCR2_EL1 :
ArmISA
MISCREG_DBGBCR3 :
ArmISA
MISCREG_DBGBCR3_EL1 :
ArmISA
MISCREG_DBGBCR4 :
ArmISA
MISCREG_DBGBCR4_EL1 :
ArmISA
MISCREG_DBGBCR5 :
ArmISA
MISCREG_DBGBCR5_EL1 :
ArmISA
MISCREG_DBGBCR6 :
ArmISA
MISCREG_DBGBCR6_EL1 :
ArmISA
MISCREG_DBGBCR7 :
ArmISA
MISCREG_DBGBCR7_EL1 :
ArmISA
MISCREG_DBGBCR8 :
ArmISA
MISCREG_DBGBCR8_EL1 :
ArmISA
MISCREG_DBGBCR9 :
ArmISA
MISCREG_DBGBCR9_EL1 :
ArmISA
MISCREG_DBGBVR0 :
ArmISA
MISCREG_DBGBVR0_EL1 :
ArmISA
MISCREG_DBGBVR1 :
ArmISA
MISCREG_DBGBVR10 :
ArmISA
MISCREG_DBGBVR10_EL1 :
ArmISA
MISCREG_DBGBVR11 :
ArmISA
MISCREG_DBGBVR11_EL1 :
ArmISA
MISCREG_DBGBVR12 :
ArmISA
MISCREG_DBGBVR12_EL1 :
ArmISA
MISCREG_DBGBVR13 :
ArmISA
MISCREG_DBGBVR13_EL1 :
ArmISA
MISCREG_DBGBVR14 :
ArmISA
MISCREG_DBGBVR14_EL1 :
ArmISA
MISCREG_DBGBVR15 :
ArmISA
MISCREG_DBGBVR15_EL1 :
ArmISA
MISCREG_DBGBVR1_EL1 :
ArmISA
MISCREG_DBGBVR2 :
ArmISA
MISCREG_DBGBVR2_EL1 :
ArmISA
MISCREG_DBGBVR3 :
ArmISA
MISCREG_DBGBVR3_EL1 :
ArmISA
MISCREG_DBGBVR4 :
ArmISA
MISCREG_DBGBVR4_EL1 :
ArmISA
MISCREG_DBGBVR5 :
ArmISA
MISCREG_DBGBVR5_EL1 :
ArmISA
MISCREG_DBGBVR6 :
ArmISA
MISCREG_DBGBVR6_EL1 :
ArmISA
MISCREG_DBGBVR7 :
ArmISA
MISCREG_DBGBVR7_EL1 :
ArmISA
MISCREG_DBGBVR8 :
ArmISA
MISCREG_DBGBVR8_EL1 :
ArmISA
MISCREG_DBGBVR9 :
ArmISA
MISCREG_DBGBVR9_EL1 :
ArmISA
MISCREG_DBGBXVR0 :
ArmISA
MISCREG_DBGBXVR1 :
ArmISA
MISCREG_DBGBXVR10 :
ArmISA
MISCREG_DBGBXVR11 :
ArmISA
MISCREG_DBGBXVR12 :
ArmISA
MISCREG_DBGBXVR13 :
ArmISA
MISCREG_DBGBXVR14 :
ArmISA
MISCREG_DBGBXVR15 :
ArmISA
MISCREG_DBGBXVR2 :
ArmISA
MISCREG_DBGBXVR3 :
ArmISA
MISCREG_DBGBXVR4 :
ArmISA
MISCREG_DBGBXVR5 :
ArmISA
MISCREG_DBGBXVR6 :
ArmISA
MISCREG_DBGBXVR7 :
ArmISA
MISCREG_DBGBXVR8 :
ArmISA
MISCREG_DBGBXVR9 :
ArmISA
MISCREG_DBGCLAIMCLR :
ArmISA
MISCREG_DBGCLAIMCLR_EL1 :
ArmISA
MISCREG_DBGCLAIMSET :
ArmISA
MISCREG_DBGCLAIMSET_EL1 :
ArmISA
MISCREG_DBGDCCINT :
ArmISA
MISCREG_DBGDEVID0 :
ArmISA
MISCREG_DBGDEVID1 :
ArmISA
MISCREG_DBGDEVID2 :
ArmISA
MISCREG_DBGDIDR :
ArmISA
MISCREG_DBGDRAR :
ArmISA
MISCREG_DBGDSAR :
ArmISA
MISCREG_DBGDSCRext :
ArmISA
MISCREG_DBGDSCRint :
ArmISA
MISCREG_DBGDTRRXext :
ArmISA
MISCREG_DBGDTRRXint :
ArmISA
MISCREG_DBGDTRTXext :
ArmISA
MISCREG_DBGDTRTXint :
ArmISA
MISCREG_DBGOSDLR :
ArmISA
MISCREG_DBGOSECCR :
ArmISA
MISCREG_DBGOSLAR :
ArmISA
MISCREG_DBGOSLSR :
ArmISA
MISCREG_DBGPRCR :
ArmISA
MISCREG_DBGPRCR_EL1 :
ArmISA
MISCREG_DBGVCR :
ArmISA
MISCREG_DBGVCR32_EL2 :
ArmISA
MISCREG_DBGWCR0 :
ArmISA
MISCREG_DBGWCR0_EL1 :
ArmISA
MISCREG_DBGWCR1 :
ArmISA
MISCREG_DBGWCR10 :
ArmISA
MISCREG_DBGWCR10_EL1 :
ArmISA
MISCREG_DBGWCR11 :
ArmISA
MISCREG_DBGWCR11_EL1 :
ArmISA
MISCREG_DBGWCR12 :
ArmISA
MISCREG_DBGWCR12_EL1 :
ArmISA
MISCREG_DBGWCR13 :
ArmISA
MISCREG_DBGWCR13_EL1 :
ArmISA
MISCREG_DBGWCR14 :
ArmISA
MISCREG_DBGWCR14_EL1 :
ArmISA
MISCREG_DBGWCR15 :
ArmISA
MISCREG_DBGWCR15_EL1 :
ArmISA
MISCREG_DBGWCR1_EL1 :
ArmISA
MISCREG_DBGWCR2 :
ArmISA
MISCREG_DBGWCR2_EL1 :
ArmISA
MISCREG_DBGWCR3 :
ArmISA
MISCREG_DBGWCR3_EL1 :
ArmISA
MISCREG_DBGWCR4 :
ArmISA
MISCREG_DBGWCR4_EL1 :
ArmISA
MISCREG_DBGWCR5 :
ArmISA
MISCREG_DBGWCR5_EL1 :
ArmISA
MISCREG_DBGWCR6 :
ArmISA
MISCREG_DBGWCR6_EL1 :
ArmISA
MISCREG_DBGWCR7 :
ArmISA
MISCREG_DBGWCR7_EL1 :
ArmISA
MISCREG_DBGWCR8 :
ArmISA
MISCREG_DBGWCR8_EL1 :
ArmISA
MISCREG_DBGWCR9 :
ArmISA
MISCREG_DBGWCR9_EL1 :
ArmISA
MISCREG_DBGWFAR :
ArmISA
MISCREG_DBGWVR0 :
ArmISA
MISCREG_DBGWVR0_EL1 :
ArmISA
MISCREG_DBGWVR1 :
ArmISA
MISCREG_DBGWVR10 :
ArmISA
MISCREG_DBGWVR10_EL1 :
ArmISA
MISCREG_DBGWVR11 :
ArmISA
MISCREG_DBGWVR11_EL1 :
ArmISA
MISCREG_DBGWVR12 :
ArmISA
MISCREG_DBGWVR12_EL1 :
ArmISA
MISCREG_DBGWVR13 :
ArmISA
MISCREG_DBGWVR13_EL1 :
ArmISA
MISCREG_DBGWVR14 :
ArmISA
MISCREG_DBGWVR14_EL1 :
ArmISA
MISCREG_DBGWVR15 :
ArmISA
MISCREG_DBGWVR15_EL1 :
ArmISA
MISCREG_DBGWVR1_EL1 :
ArmISA
MISCREG_DBGWVR2 :
ArmISA
MISCREG_DBGWVR2_EL1 :
ArmISA
MISCREG_DBGWVR3 :
ArmISA
MISCREG_DBGWVR3_EL1 :
ArmISA
MISCREG_DBGWVR4 :
ArmISA
MISCREG_DBGWVR4_EL1 :
ArmISA
MISCREG_DBGWVR5 :
ArmISA
MISCREG_DBGWVR5_EL1 :
ArmISA
MISCREG_DBGWVR6 :
ArmISA
MISCREG_DBGWVR6_EL1 :
ArmISA
MISCREG_DBGWVR7 :
ArmISA
MISCREG_DBGWVR7_EL1 :
ArmISA
MISCREG_DBGWVR8 :
ArmISA
MISCREG_DBGWVR8_EL1 :
ArmISA
MISCREG_DBGWVR9 :
ArmISA
MISCREG_DBGWVR9_EL1 :
ArmISA
MISCREG_DC_CISW_Xt :
ArmISA
MISCREG_DC_CIVAC_Xt :
ArmISA
MISCREG_DC_CSW_Xt :
ArmISA
MISCREG_DC_CVAC_Xt :
ArmISA
MISCREG_DC_CVAU_Xt :
ArmISA
MISCREG_DC_ISW_Xt :
ArmISA
MISCREG_DC_IVAC_Xt :
ArmISA
MISCREG_DC_ZVA_Xt :
ArmISA
MISCREG_DCCIMVAC :
ArmISA
MISCREG_DCCISW :
ArmISA
MISCREG_DCCMVAC :
ArmISA
MISCREG_DCCMVAU :
ArmISA
MISCREG_DCCSW :
ArmISA
MISCREG_DCIMVAC :
ArmISA
MISCREG_DCISW :
ArmISA
MISCREG_DCSR :
RiscvISA
MISCREG_DCZID_EL0 :
ArmISA
MISCREG_DEBUG :
MipsISA
MISCREG_DEBUG_CTL_MSR :
X86ISA
MISCREG_DEF_TYPE :
X86ISA
MISCREG_DEPC :
MipsISA
MISCREG_DESAVE :
MipsISA
MISCREG_DFAR :
ArmISA
MISCREG_DFAR_NS :
ArmISA
MISCREG_DFAR_S :
ArmISA
MISCREG_DFSR :
ArmISA
MISCREG_DFSR_NS :
ArmISA
MISCREG_DFSR_S :
ArmISA
MISCREG_DISR_EL1 :
ArmISA
MISCREG_DL1DATA0 :
ArmISA
MISCREG_DL1DATA0_EL1 :
ArmISA
MISCREG_DL1DATA1 :
ArmISA
MISCREG_DL1DATA1_EL1 :
ArmISA
MISCREG_DL1DATA2 :
ArmISA
MISCREG_DL1DATA2_EL1 :
ArmISA
MISCREG_DL1DATA3 :
ArmISA
MISCREG_DL1DATA3_EL1 :
ArmISA
MISCREG_DL1DATA4 :
ArmISA
MISCREG_DL1DATA4_EL1 :
ArmISA
MISCREG_DLR_EL0 :
ArmISA
MISCREG_DPC :
RiscvISA
MISCREG_DR0 :
X86ISA
MISCREG_DR1 :
X86ISA
MISCREG_DR2 :
X86ISA
MISCREG_DR3 :
X86ISA
MISCREG_DR4 :
X86ISA
MISCREG_DR5 :
X86ISA
MISCREG_DR6 :
X86ISA
MISCREG_DR7 :
X86ISA
MISCREG_DR_BASE :
X86ISA
MISCREG_DS :
X86ISA
MISCREG_DS_ATTR :
X86ISA
MISCREG_DS_BASE :
X86ISA
MISCREG_DS_EFF_BASE :
X86ISA
MISCREG_DS_LIMIT :
X86ISA
MISCREG_DSCRATCH :
RiscvISA
MISCREG_DSPSR_EL0 :
ArmISA
MISCREG_DTLBIALL :
ArmISA
MISCREG_DTLBIASID :
ArmISA
MISCREG_DTLBIMVA :
ArmISA
MISCREG_EBASE :
MipsISA
MISCREG_EFER :
X86ISA
MISCREG_ELR_EL1 :
ArmISA
MISCREG_ELR_EL12 :
ArmISA
MISCREG_ELR_EL2 :
ArmISA
MISCREG_ELR_EL3 :
ArmISA
MISCREG_ELR_HYP :
ArmISA
MISCREG_ENTRYHI :
MipsISA
MISCREG_ENTRYLO0 :
MipsISA
MISCREG_ENTRYLO1 :
MipsISA
MISCREG_EPC :
MipsISA
MISCREG_ERRCTL :
MipsISA
MISCREG_ERRIDR_EL1 :
ArmISA
MISCREG_ERROR_EPC :
MipsISA
MISCREG_ERRSELR_EL1 :
ArmISA
MISCREG_ERXADDR_EL1 :
ArmISA
MISCREG_ERXCTLR_EL1 :
ArmISA
MISCREG_ERXFR_EL1 :
ArmISA
MISCREG_ERXMISC0_EL1 :
ArmISA
MISCREG_ERXMISC1_EL1 :
ArmISA
MISCREG_ERXSTATUS_EL1 :
ArmISA
MISCREG_ES :
X86ISA
MISCREG_ES_ATTR :
X86ISA
MISCREG_ES_BASE :
X86ISA
MISCREG_ES_EFF_BASE :
X86ISA
MISCREG_ES_LIMIT :
X86ISA
MISCREG_ESR_EL1 :
ArmISA
MISCREG_ESR_EL12 :
ArmISA
MISCREG_ESR_EL2 :
ArmISA
MISCREG_ESR_EL3 :
ArmISA
MISCREG_FAR_EL1 :
ArmISA
MISCREG_FAR_EL12 :
ArmISA
MISCREG_FAR_EL2 :
ArmISA
MISCREG_FAR_EL3 :
ArmISA
MISCREG_FCSEIDR :
ArmISA
MISCREG_FCW :
X86ISA
MISCREG_FFLAGS :
RiscvISA
MISCREG_FIOFF :
X86ISA
MISCREG_FISEG :
X86ISA
MISCREG_FOOFF :
X86ISA
MISCREG_FOP :
X86ISA
MISCREG_FOSEG :
X86ISA
MISCREG_FPCR :
ArmISA
MISCREG_FPEXC :
ArmISA
MISCREG_FPEXC32_EL2 :
ArmISA
MISCREG_FPRS :
SparcISA
MISCREG_FPSCR :
ArmISA
MISCREG_FPSCR_EXC :
ArmISA
MISCREG_FPSCR_QC :
ArmISA
MISCREG_FPSID :
ArmISA
MISCREG_FPSR :
ArmISA
MISCREG_FRM :
RiscvISA
MISCREG_FS :
X86ISA
MISCREG_FS_ATTR :
X86ISA
MISCREG_FS_BASE :
X86ISA
MISCREG_FS_EFF_BASE :
X86ISA
MISCREG_FS_LIMIT :
X86ISA
MISCREG_FSR :
SparcISA
MISCREG_FSW :
X86ISA
MISCREG_FTAG :
X86ISA
MISCREG_FTW :
X86ISA
MISCREG_GL :
SparcISA
MISCREG_GS :
X86ISA
MISCREG_GS_ATTR :
X86ISA
MISCREG_GS_BASE :
X86ISA
MISCREG_GS_EFF_BASE :
X86ISA
MISCREG_GS_LIMIT :
X86ISA
MISCREG_GSR :
SparcISA
MISCREG_HACR :
ArmISA
MISCREG_HACR_EL2 :
ArmISA
MISCREG_HACTLR :
ArmISA
MISCREG_HADFSR :
ArmISA
MISCREG_HAIFSR :
ArmISA
MISCREG_HAMAIR0 :
ArmISA
MISCREG_HAMAIR1 :
ArmISA
MISCREG_HARTID :
RiscvISA
MISCREG_HCPTR :
ArmISA
MISCREG_HCR :
ArmISA
MISCREG_HCR2 :
ArmISA
MISCREG_HCR_EL2 :
ArmISA
MISCREG_HDCR :
ArmISA
MISCREG_HDFAR :
ArmISA
MISCREG_HIFAR :
ArmISA
MISCREG_HINTP :
SparcISA
MISCREG_HMAIR0 :
ArmISA
MISCREG_HMAIR1 :
ArmISA
MISCREG_HPFAR :
ArmISA
MISCREG_HPFAR_EL2 :
ArmISA
MISCREG_HPMCOUNTER03 :
RiscvISA
MISCREG_HPMCOUNTER04 :
RiscvISA
MISCREG_HPMCOUNTER05 :
RiscvISA
MISCREG_HPMCOUNTER06 :
RiscvISA
MISCREG_HPMCOUNTER07 :
RiscvISA
MISCREG_HPMCOUNTER08 :
RiscvISA
MISCREG_HPMCOUNTER09 :
RiscvISA
MISCREG_HPMCOUNTER10 :
RiscvISA
MISCREG_HPMCOUNTER11 :
RiscvISA
MISCREG_HPMCOUNTER12 :
RiscvISA
MISCREG_HPMCOUNTER13 :
RiscvISA
MISCREG_HPMCOUNTER14 :
RiscvISA
MISCREG_HPMCOUNTER15 :
RiscvISA
MISCREG_HPMCOUNTER16 :
RiscvISA
MISCREG_HPMCOUNTER17 :
RiscvISA
MISCREG_HPMCOUNTER18 :
RiscvISA
MISCREG_HPMCOUNTER19 :
RiscvISA
MISCREG_HPMCOUNTER20 :
RiscvISA
MISCREG_HPMCOUNTER21 :
RiscvISA
MISCREG_HPMCOUNTER22 :
RiscvISA
MISCREG_HPMCOUNTER23 :
RiscvISA
MISCREG_HPMCOUNTER24 :
RiscvISA
MISCREG_HPMCOUNTER25 :
RiscvISA
MISCREG_HPMCOUNTER26 :
RiscvISA
MISCREG_HPMCOUNTER27 :
RiscvISA
MISCREG_HPMCOUNTER28 :
RiscvISA
MISCREG_HPMCOUNTER29 :
RiscvISA
MISCREG_HPMCOUNTER30 :
RiscvISA
MISCREG_HPMCOUNTER31 :
RiscvISA
MISCREG_HPMEVENT03 :
RiscvISA
MISCREG_HPMEVENT04 :
RiscvISA
MISCREG_HPMEVENT05 :
RiscvISA
MISCREG_HPMEVENT06 :
RiscvISA
MISCREG_HPMEVENT07 :
RiscvISA
MISCREG_HPMEVENT08 :
RiscvISA
MISCREG_HPMEVENT09 :
RiscvISA
MISCREG_HPMEVENT10 :
RiscvISA
MISCREG_HPMEVENT11 :
RiscvISA
MISCREG_HPMEVENT12 :
RiscvISA
MISCREG_HPMEVENT13 :
RiscvISA
MISCREG_HPMEVENT14 :
RiscvISA
MISCREG_HPMEVENT15 :
RiscvISA
MISCREG_HPMEVENT16 :
RiscvISA
MISCREG_HPMEVENT17 :
RiscvISA
MISCREG_HPMEVENT18 :
RiscvISA
MISCREG_HPMEVENT19 :
RiscvISA
MISCREG_HPMEVENT20 :
RiscvISA
MISCREG_HPMEVENT21 :
RiscvISA
MISCREG_HPMEVENT22 :
RiscvISA
MISCREG_HPMEVENT23 :
RiscvISA
MISCREG_HPMEVENT24 :
RiscvISA
MISCREG_HPMEVENT25 :
RiscvISA
MISCREG_HPMEVENT26 :
RiscvISA
MISCREG_HPMEVENT27 :
RiscvISA
MISCREG_HPMEVENT28 :
RiscvISA
MISCREG_HPMEVENT29 :
RiscvISA
MISCREG_HPMEVENT30 :
RiscvISA
MISCREG_HPMEVENT31 :
RiscvISA
MISCREG_HPSTATE :
SparcISA
MISCREG_HS :
X86ISA
MISCREG_HS_ATTR :
X86ISA
MISCREG_HS_BASE :
X86ISA
MISCREG_HS_EFF_BASE :
X86ISA
MISCREG_HS_LIMIT :
X86ISA
MISCREG_HSCTLR :
ArmISA
MISCREG_HSR :
ArmISA
MISCREG_HSTICK_CMPR :
SparcISA
MISCREG_HSTR :
ArmISA
MISCREG_HSTR_EL2 :
ArmISA
MISCREG_HTBA :
SparcISA
MISCREG_HTCR :
ArmISA
MISCREG_HTPIDR :
ArmISA
MISCREG_HTSTATE :
SparcISA
MISCREG_HTTBR :
ArmISA
MISCREG_HVBAR :
ArmISA
MISCREG_HVER :
SparcISA
MISCREG_HWRENA :
MipsISA
MISCREG_HYP_E2H_NS_RD :
ArmISA
MISCREG_HYP_E2H_NS_WR :
ArmISA
MISCREG_HYP_E2H_S_RD :
ArmISA
MISCREG_HYP_E2H_S_WR :
ArmISA
MISCREG_HYP_NS_RD :
ArmISA
MISCREG_HYP_NS_WR :
ArmISA
MISCREG_HYP_S_RD :
ArmISA
MISCREG_HYP_S_WR :
ArmISA
MISCREG_IC_IALLU :
ArmISA
MISCREG_IC_IALLUIS :
ArmISA
MISCREG_IC_IVAU_Xt :
ArmISA
MISCREG_ICC_AP0R0 :
ArmISA
MISCREG_ICC_AP0R0_EL1 :
ArmISA
MISCREG_ICC_AP0R1 :
ArmISA
MISCREG_ICC_AP0R1_EL1 :
ArmISA
MISCREG_ICC_AP0R2 :
ArmISA
MISCREG_ICC_AP0R2_EL1 :
ArmISA
MISCREG_ICC_AP0R3 :
ArmISA
MISCREG_ICC_AP0R3_EL1 :
ArmISA
MISCREG_ICC_AP1R0 :
ArmISA
MISCREG_ICC_AP1R0_EL1 :
ArmISA
MISCREG_ICC_AP1R0_EL1_NS :
ArmISA
MISCREG_ICC_AP1R0_EL1_S :
ArmISA
MISCREG_ICC_AP1R0_NS :
ArmISA
MISCREG_ICC_AP1R0_S :
ArmISA
MISCREG_ICC_AP1R1 :
ArmISA
MISCREG_ICC_AP1R1_EL1 :
ArmISA
MISCREG_ICC_AP1R1_EL1_NS :
ArmISA
MISCREG_ICC_AP1R1_EL1_S :
ArmISA
MISCREG_ICC_AP1R1_NS :
ArmISA
MISCREG_ICC_AP1R1_S :
ArmISA
MISCREG_ICC_AP1R2 :
ArmISA
MISCREG_ICC_AP1R2_EL1 :
ArmISA
MISCREG_ICC_AP1R2_EL1_NS :
ArmISA
MISCREG_ICC_AP1R2_EL1_S :
ArmISA
MISCREG_ICC_AP1R2_NS :
ArmISA
MISCREG_ICC_AP1R2_S :
ArmISA
MISCREG_ICC_AP1R3 :
ArmISA
MISCREG_ICC_AP1R3_EL1 :
ArmISA
MISCREG_ICC_AP1R3_EL1_NS :
ArmISA
MISCREG_ICC_AP1R3_EL1_S :
ArmISA
MISCREG_ICC_AP1R3_NS :
ArmISA
MISCREG_ICC_AP1R3_S :
ArmISA
MISCREG_ICC_ASGI1R :
ArmISA
MISCREG_ICC_ASGI1R_EL1 :
ArmISA
MISCREG_ICC_BPR0 :
ArmISA
MISCREG_ICC_BPR0_EL1 :
ArmISA
MISCREG_ICC_BPR1 :
ArmISA
MISCREG_ICC_BPR1_EL1 :
ArmISA
MISCREG_ICC_BPR1_EL1_NS :
ArmISA
MISCREG_ICC_BPR1_EL1_S :
ArmISA
MISCREG_ICC_BPR1_NS :
ArmISA
MISCREG_ICC_BPR1_S :
ArmISA
MISCREG_ICC_CTLR :
ArmISA
MISCREG_ICC_CTLR_EL1 :
ArmISA
MISCREG_ICC_CTLR_EL1_NS :
ArmISA
MISCREG_ICC_CTLR_EL1_S :
ArmISA
MISCREG_ICC_CTLR_EL3 :
ArmISA
MISCREG_ICC_CTLR_NS :
ArmISA
MISCREG_ICC_CTLR_S :
ArmISA
MISCREG_ICC_DIR :
ArmISA
MISCREG_ICC_DIR_EL1 :
ArmISA
MISCREG_ICC_EOIR0 :
ArmISA
MISCREG_ICC_EOIR0_EL1 :
ArmISA
MISCREG_ICC_EOIR1 :
ArmISA
MISCREG_ICC_EOIR1_EL1 :
ArmISA
MISCREG_ICC_HPPIR0 :
ArmISA
MISCREG_ICC_HPPIR0_EL1 :
ArmISA
MISCREG_ICC_HPPIR1 :
ArmISA
MISCREG_ICC_HPPIR1_EL1 :
ArmISA
MISCREG_ICC_HSRE :
ArmISA
MISCREG_ICC_IAR0 :
ArmISA
MISCREG_ICC_IAR0_EL1 :
ArmISA
MISCREG_ICC_IAR1 :
ArmISA
MISCREG_ICC_IAR1_EL1 :
ArmISA
MISCREG_ICC_IGRPEN0 :
ArmISA
MISCREG_ICC_IGRPEN0_EL1 :
ArmISA
MISCREG_ICC_IGRPEN1 :
ArmISA
MISCREG_ICC_IGRPEN1_EL1 :
ArmISA
MISCREG_ICC_IGRPEN1_EL1_NS :
ArmISA
MISCREG_ICC_IGRPEN1_EL1_S :
ArmISA
MISCREG_ICC_IGRPEN1_EL3 :
ArmISA
MISCREG_ICC_IGRPEN1_NS :
ArmISA
MISCREG_ICC_IGRPEN1_S :
ArmISA
MISCREG_ICC_MCTLR :
ArmISA
MISCREG_ICC_MGRPEN1 :
ArmISA
MISCREG_ICC_MSRE :
ArmISA
MISCREG_ICC_PMR :
ArmISA
MISCREG_ICC_PMR_EL1 :
ArmISA
MISCREG_ICC_RPR :
ArmISA
MISCREG_ICC_RPR_EL1 :
ArmISA
MISCREG_ICC_SGI0R :
ArmISA
MISCREG_ICC_SGI0R_EL1 :
ArmISA
MISCREG_ICC_SGI1R :
ArmISA
MISCREG_ICC_SGI1R_EL1 :
ArmISA
MISCREG_ICC_SRE :
ArmISA
MISCREG_ICC_SRE_EL1 :
ArmISA
MISCREG_ICC_SRE_EL1_NS :
ArmISA
MISCREG_ICC_SRE_EL1_S :
ArmISA
MISCREG_ICC_SRE_EL2 :
ArmISA
MISCREG_ICC_SRE_EL3 :
ArmISA
MISCREG_ICC_SRE_NS :
ArmISA
MISCREG_ICC_SRE_S :
ArmISA
MISCREG_ICH_AP0R0 :
ArmISA
MISCREG_ICH_AP0R0_EL2 :
ArmISA
MISCREG_ICH_AP0R1 :
ArmISA
MISCREG_ICH_AP0R1_EL2 :
ArmISA
MISCREG_ICH_AP0R2 :
ArmISA
MISCREG_ICH_AP0R2_EL2 :
ArmISA
MISCREG_ICH_AP0R3 :
ArmISA
MISCREG_ICH_AP0R3_EL2 :
ArmISA
MISCREG_ICH_AP1R0 :
ArmISA
MISCREG_ICH_AP1R0_EL2 :
ArmISA
MISCREG_ICH_AP1R1 :
ArmISA
MISCREG_ICH_AP1R1_EL2 :
ArmISA
MISCREG_ICH_AP1R2 :
ArmISA
MISCREG_ICH_AP1R2_EL2 :
ArmISA
MISCREG_ICH_AP1R3 :
ArmISA
MISCREG_ICH_AP1R3_EL2 :
ArmISA
MISCREG_ICH_EISR :
ArmISA
MISCREG_ICH_EISR_EL2 :
ArmISA
MISCREG_ICH_ELRSR :
ArmISA
MISCREG_ICH_ELRSR_EL2 :
ArmISA
MISCREG_ICH_HCR :
ArmISA
MISCREG_ICH_HCR_EL2 :
ArmISA
MISCREG_ICH_LR0 :
ArmISA
MISCREG_ICH_LR0_EL2 :
ArmISA
MISCREG_ICH_LR1 :
ArmISA
MISCREG_ICH_LR10 :
ArmISA
MISCREG_ICH_LR10_EL2 :
ArmISA
MISCREG_ICH_LR11 :
ArmISA
MISCREG_ICH_LR11_EL2 :
ArmISA
MISCREG_ICH_LR12 :
ArmISA
MISCREG_ICH_LR12_EL2 :
ArmISA
MISCREG_ICH_LR13 :
ArmISA
MISCREG_ICH_LR13_EL2 :
ArmISA
MISCREG_ICH_LR14 :
ArmISA
MISCREG_ICH_LR14_EL2 :
ArmISA
MISCREG_ICH_LR15 :
ArmISA
MISCREG_ICH_LR15_EL2 :
ArmISA
MISCREG_ICH_LR1_EL2 :
ArmISA
MISCREG_ICH_LR2 :
ArmISA
MISCREG_ICH_LR2_EL2 :
ArmISA
MISCREG_ICH_LR3 :
ArmISA
MISCREG_ICH_LR3_EL2 :
ArmISA
MISCREG_ICH_LR4 :
ArmISA
MISCREG_ICH_LR4_EL2 :
ArmISA
MISCREG_ICH_LR5 :
ArmISA
MISCREG_ICH_LR5_EL2 :
ArmISA
MISCREG_ICH_LR6 :
ArmISA
MISCREG_ICH_LR6_EL2 :
ArmISA
MISCREG_ICH_LR7 :
ArmISA
MISCREG_ICH_LR7_EL2 :
ArmISA
MISCREG_ICH_LR8 :
ArmISA
MISCREG_ICH_LR8_EL2 :
ArmISA
MISCREG_ICH_LR9 :
ArmISA
MISCREG_ICH_LR9_EL2 :
ArmISA
MISCREG_ICH_LRC0 :
ArmISA
MISCREG_ICH_LRC1 :
ArmISA
MISCREG_ICH_LRC10 :
ArmISA
MISCREG_ICH_LRC11 :
ArmISA
MISCREG_ICH_LRC12 :
ArmISA
MISCREG_ICH_LRC13 :
ArmISA
MISCREG_ICH_LRC14 :
ArmISA
MISCREG_ICH_LRC15 :
ArmISA
MISCREG_ICH_LRC2 :
ArmISA
MISCREG_ICH_LRC3 :
ArmISA
MISCREG_ICH_LRC4 :
ArmISA
MISCREG_ICH_LRC5 :
ArmISA
MISCREG_ICH_LRC6 :
ArmISA
MISCREG_ICH_LRC7 :
ArmISA
MISCREG_ICH_LRC8 :
ArmISA
MISCREG_ICH_LRC9 :
ArmISA
MISCREG_ICH_MISR :
ArmISA
MISCREG_ICH_MISR_EL2 :
ArmISA
MISCREG_ICH_VMCR :
ArmISA
MISCREG_ICH_VMCR_EL2 :
ArmISA
MISCREG_ICH_VTR :
ArmISA
MISCREG_ICH_VTR_EL2 :
ArmISA
MISCREG_ICIALLU :
ArmISA
MISCREG_ICIALLUIS :
ArmISA
MISCREG_ICIMVAU :
ArmISA
MISCREG_ICV_AP0R0_EL1 :
ArmISA
MISCREG_ICV_AP0R1_EL1 :
ArmISA
MISCREG_ICV_AP0R2_EL1 :
ArmISA
MISCREG_ICV_AP0R3_EL1 :
ArmISA
MISCREG_ICV_AP1R0_EL1 :
ArmISA
MISCREG_ICV_AP1R0_EL1_NS :
ArmISA
MISCREG_ICV_AP1R0_EL1_S :
ArmISA
MISCREG_ICV_AP1R1_EL1 :
ArmISA
MISCREG_ICV_AP1R1_EL1_NS :
ArmISA
MISCREG_ICV_AP1R1_EL1_S :
ArmISA
MISCREG_ICV_AP1R2_EL1 :
ArmISA
MISCREG_ICV_AP1R2_EL1_NS :
ArmISA
MISCREG_ICV_AP1R2_EL1_S :
ArmISA
MISCREG_ICV_AP1R3_EL1 :
ArmISA
MISCREG_ICV_AP1R3_EL1_NS :
ArmISA
MISCREG_ICV_AP1R3_EL1_S :
ArmISA
MISCREG_ICV_ASGI1R_EL1 :
ArmISA
MISCREG_ICV_BPR0_EL1 :
ArmISA
MISCREG_ICV_BPR1_EL1 :
ArmISA
MISCREG_ICV_BPR1_EL1_NS :
ArmISA
MISCREG_ICV_BPR1_EL1_S :
ArmISA
MISCREG_ICV_CTLR_EL1 :
ArmISA
MISCREG_ICV_CTLR_EL1_NS :
ArmISA
MISCREG_ICV_CTLR_EL1_S :
ArmISA
MISCREG_ICV_DIR_EL1 :
ArmISA
MISCREG_ICV_EOIR0_EL1 :
ArmISA
MISCREG_ICV_EOIR1_EL1 :
ArmISA
MISCREG_ICV_HPPIR0_EL1 :
ArmISA
MISCREG_ICV_HPPIR1_EL1 :
ArmISA
MISCREG_ICV_IAR0_EL1 :
ArmISA
MISCREG_ICV_IAR1_EL1 :
ArmISA
MISCREG_ICV_IGRPEN0_EL1 :
ArmISA
MISCREG_ICV_IGRPEN1_EL1 :
ArmISA
MISCREG_ICV_IGRPEN1_EL1_NS :
ArmISA
MISCREG_ICV_IGRPEN1_EL1_S :
ArmISA
MISCREG_ICV_PMR_EL1 :
ArmISA
MISCREG_ICV_RPR_EL1 :
ArmISA
MISCREG_ICV_SGI0R_EL1 :
ArmISA
MISCREG_ICV_SGI1R_EL1 :
ArmISA
MISCREG_ICV_SRE_EL1 :
ArmISA
MISCREG_ICV_SRE_EL1_NS :
ArmISA
MISCREG_ICV_SRE_EL1_S :
ArmISA
MISCREG_ID_AA64AFR0_EL1 :
ArmISA
MISCREG_ID_AA64AFR1_EL1 :
ArmISA
MISCREG_ID_AA64DFR0_EL1 :
ArmISA
MISCREG_ID_AA64DFR1_EL1 :
ArmISA
MISCREG_ID_AA64ISAR0_EL1 :
ArmISA
MISCREG_ID_AA64ISAR1_EL1 :
ArmISA
MISCREG_ID_AA64MMFR0_EL1 :
ArmISA
MISCREG_ID_AA64MMFR1_EL1 :
ArmISA
MISCREG_ID_AA64MMFR2_EL1 :
ArmISA
MISCREG_ID_AA64PFR0_EL1 :
ArmISA
MISCREG_ID_AA64PFR1_EL1 :
ArmISA
MISCREG_ID_AA64ZFR0_EL1 :
ArmISA
MISCREG_ID_AFR0 :
ArmISA
MISCREG_ID_AFR0_EL1 :
ArmISA
MISCREG_ID_DFR0 :
ArmISA
MISCREG_ID_DFR0_EL1 :
ArmISA
MISCREG_ID_ISAR0 :
ArmISA
MISCREG_ID_ISAR0_EL1 :
ArmISA
MISCREG_ID_ISAR1 :
ArmISA
MISCREG_ID_ISAR1_EL1 :
ArmISA
MISCREG_ID_ISAR2 :
ArmISA
MISCREG_ID_ISAR2_EL1 :
ArmISA
MISCREG_ID_ISAR3 :
ArmISA
MISCREG_ID_ISAR3_EL1 :
ArmISA
MISCREG_ID_ISAR4 :
ArmISA
MISCREG_ID_ISAR4_EL1 :
ArmISA
MISCREG_ID_ISAR5 :
ArmISA
MISCREG_ID_ISAR5_EL1 :
ArmISA
MISCREG_ID_ISAR6 :
ArmISA
MISCREG_ID_ISAR6_EL1 :
ArmISA
MISCREG_ID_MMFR0 :
ArmISA
MISCREG_ID_MMFR0_EL1 :
ArmISA
MISCREG_ID_MMFR1 :
ArmISA
MISCREG_ID_MMFR1_EL1 :
ArmISA
MISCREG_ID_MMFR2 :
ArmISA
MISCREG_ID_MMFR2_EL1 :
ArmISA
MISCREG_ID_MMFR3 :
ArmISA
MISCREG_ID_MMFR3_EL1 :
ArmISA
MISCREG_ID_MMFR4 :
ArmISA
MISCREG_ID_MMFR4_EL1 :
ArmISA
MISCREG_ID_PFR0 :
ArmISA
MISCREG_ID_PFR0_EL1 :
ArmISA
MISCREG_ID_PFR1 :
ArmISA
MISCREG_ID_PFR1_EL1 :
ArmISA
MISCREG_IDTR :
X86ISA
MISCREG_IDTR_ATTR :
X86ISA
MISCREG_IDTR_BASE :
X86ISA
MISCREG_IDTR_EFF_BASE :
X86ISA
MISCREG_IDTR_LIMIT :
X86ISA
MISCREG_IE :
RiscvISA
MISCREG_IFAR :
ArmISA
MISCREG_IFAR_NS :
ArmISA
MISCREG_IFAR_S :
ArmISA
MISCREG_IFSR :
ArmISA
MISCREG_IFSR32_EL2 :
ArmISA
MISCREG_IFSR_NS :
ArmISA
MISCREG_IFSR_S :
ArmISA
MISCREG_IGNNE :
X86ISA
MISCREG_IL1DATA0 :
ArmISA
MISCREG_IL1DATA0_EL1 :
ArmISA
MISCREG_IL1DATA1 :
ArmISA
MISCREG_IL1DATA1_EL1 :
ArmISA
MISCREG_IL1DATA2 :
ArmISA
MISCREG_IL1DATA2_EL1 :
ArmISA
MISCREG_IL1DATA3 :
ArmISA
MISCREG_IL1DATA3_EL1 :
ArmISA
MISCREG_IMPDEF_UNIMPL :
ArmISA
MISCREG_IMPID :
RiscvISA
MISCREG_IMPLEMENTED :
ArmISA
MISCREG_INDEX :
MipsISA
MISCREG_INSTRET :
RiscvISA
MISCREG_INTCTL :
MipsISA
MISCREG_IORR_BASE0 :
X86ISA
MISCREG_IORR_BASE1 :
X86ISA
MISCREG_IORR_BASE_BASE :
X86ISA
MISCREG_IORR_BASE_END :
X86ISA
MISCREG_IORR_MASK0 :
X86ISA
MISCREG_IORR_MASK1 :
X86ISA
MISCREG_IORR_MASK_BASE :
X86ISA
MISCREG_IORR_MASK_END :
X86ISA
MISCREG_IP :
RiscvISA
MISCREG_ISA :
RiscvISA
MISCREG_ISR :
ArmISA
MISCREG_ISR_EL1 :
ArmISA
MISCREG_ITLBIALL :
ArmISA
MISCREG_ITLBIASID :
ArmISA
MISCREG_ITLBIMVA :
ArmISA
MISCREG_JIDR :
ArmISA
MISCREG_JMCR :
ArmISA
MISCREG_JOSCR :
ArmISA
MISCREG_KERNEL_GS_BASE :
X86ISA
MISCREG_L2ACTLR :
ArmISA
MISCREG_L2ACTLR_EL1 :
ArmISA
MISCREG_L2CTLR :
ArmISA
MISCREG_L2CTLR_EL1 :
ArmISA
MISCREG_L2ECTLR :
ArmISA
MISCREG_L2ECTLR_EL1 :
ArmISA
MISCREG_L2MERRSR :
ArmISA
MISCREG_L2MERRSR_EL1 :
ArmISA
MISCREG_LAST_BRANCH_FROM_IP :
X86ISA
MISCREG_LAST_BRANCH_TO_IP :
X86ISA
MISCREG_LAST_EXCEPTION_FROM_IP :
X86ISA
MISCREG_LAST_EXCEPTION_TO_IP :
X86ISA
MISCREG_LLADDR :
MipsISA
MISCREG_LLFLAG :
MipsISA
MISCREG_LOCKADDR :
ArmISA
MISCREG_LOCKFLAG :
ArmISA
MISCREG_LS :
X86ISA
MISCREG_LS_ATTR :
X86ISA
MISCREG_LS_BASE :
X86ISA
MISCREG_LS_EFF_BASE :
X86ISA
MISCREG_LS_LIMIT :
X86ISA
MISCREG_LSTAR :
X86ISA
MISCREG_M5_REG :
X86ISA
MISCREG_MAIR0 :
ArmISA
MISCREG_MAIR0_NS :
ArmISA
MISCREG_MAIR0_S :
ArmISA
MISCREG_MAIR1 :
ArmISA
MISCREG_MAIR1_NS :
ArmISA
MISCREG_MAIR1_S :
ArmISA
MISCREG_MAIR_EL1 :
ArmISA
MISCREG_MAIR_EL12 :
ArmISA
MISCREG_MAIR_EL2 :
ArmISA
MISCREG_MAIR_EL3 :
ArmISA
MISCREG_MC0_ADDR :
X86ISA
MISCREG_MC0_CTL :
X86ISA
MISCREG_MC0_MISC :
X86ISA
MISCREG_MC0_STATUS :
X86ISA
MISCREG_MC1_ADDR :
X86ISA
MISCREG_MC1_CTL :
X86ISA
MISCREG_MC1_MISC :
X86ISA
MISCREG_MC1_STATUS :
X86ISA
MISCREG_MC2_ADDR :
X86ISA
MISCREG_MC2_CTL :
X86ISA
MISCREG_MC2_MISC :
X86ISA
MISCREG_MC2_STATUS :
X86ISA
MISCREG_MC3_ADDR :
X86ISA
MISCREG_MC3_CTL :
X86ISA
MISCREG_MC3_MISC :
X86ISA
MISCREG_MC3_STATUS :
X86ISA
MISCREG_MC4_ADDR :
X86ISA
MISCREG_MC4_CTL :
X86ISA
MISCREG_MC4_MISC :
X86ISA
MISCREG_MC4_STATUS :
X86ISA
MISCREG_MC5_ADDR :
X86ISA
MISCREG_MC5_CTL :
X86ISA
MISCREG_MC5_MISC :
X86ISA
MISCREG_MC5_STATUS :
X86ISA
MISCREG_MC6_ADDR :
X86ISA
MISCREG_MC6_CTL :
X86ISA
MISCREG_MC6_MISC :
X86ISA
MISCREG_MC6_STATUS :
X86ISA
MISCREG_MC7_ADDR :
X86ISA
MISCREG_MC7_CTL :
X86ISA
MISCREG_MC7_MISC :
X86ISA
MISCREG_MC7_STATUS :
X86ISA
MISCREG_MC_ADDR_BASE :
X86ISA
MISCREG_MC_ADDR_END :
X86ISA
MISCREG_MC_CTL_BASE :
X86ISA
MISCREG_MC_CTL_END :
X86ISA
MISCREG_MC_MISC_BASE :
X86ISA
MISCREG_MC_MISC_END :
X86ISA
MISCREG_MC_STATUS_BASE :
X86ISA
MISCREG_MC_STATUS_END :
X86ISA
MISCREG_MCAUSE :
RiscvISA
MISCREG_MCG_CAP :
X86ISA
MISCREG_MCG_CTL :
X86ISA
MISCREG_MCG_STATUS :
X86ISA
MISCREG_MCOUNTEREN :
RiscvISA
MISCREG_MDCCINT_EL1 :
ArmISA
MISCREG_MDCCSR_EL0 :
ArmISA
MISCREG_MDCR_EL2 :
ArmISA
MISCREG_MDCR_EL3 :
ArmISA
MISCREG_MDDTR_EL0 :
ArmISA
MISCREG_MDDTRRX_EL0 :
ArmISA
MISCREG_MDDTRTX_EL0 :
ArmISA
MISCREG_MDRAR_EL1 :
ArmISA
MISCREG_MDSCR_EL1 :
ArmISA
MISCREG_MEDELEG :
RiscvISA
MISCREG_MEPC :
RiscvISA
MISCREG_MIDELEG :
RiscvISA
MISCREG_MIDR :
ArmISA
MISCREG_MIDR_EL1 :
ArmISA
MISCREG_MMU_LSU_CTRL :
SparcISA
MISCREG_MMU_P_CONTEXT :
SparcISA
MISCREG_MMU_PART_ID :
SparcISA
MISCREG_MMU_S_CONTEXT :
SparcISA
MISCREG_MON_E2H_RD :
ArmISA
MISCREG_MON_E2H_WR :
ArmISA
MISCREG_MON_NS0_RD :
ArmISA
MISCREG_MON_NS0_WR :
ArmISA
MISCREG_MON_NS1_RD :
ArmISA
MISCREG_MON_NS1_WR :
ArmISA
MISCREG_MPIDR :
ArmISA
MISCREG_MPIDR_EL1 :
ArmISA
MISCREG_MS :
X86ISA
MISCREG_MS_ATTR :
X86ISA
MISCREG_MS_BASE :
X86ISA
MISCREG_MS_EFF_BASE :
X86ISA
MISCREG_MS_LIMIT :
X86ISA
MISCREG_MSCRATCH :
RiscvISA
MISCREG_MTRR_FIX_16K_80000 :
X86ISA
MISCREG_MTRR_FIX_16K_A0000 :
X86ISA
MISCREG_MTRR_FIX_4K_C0000 :
X86ISA
MISCREG_MTRR_FIX_4K_C8000 :
X86ISA
MISCREG_MTRR_FIX_4K_D0000 :
X86ISA
MISCREG_MTRR_FIX_4K_D8000 :
X86ISA
MISCREG_MTRR_FIX_4K_E0000 :
X86ISA
MISCREG_MTRR_FIX_4K_E8000 :
X86ISA
MISCREG_MTRR_FIX_4K_F0000 :
X86ISA
MISCREG_MTRR_FIX_4K_F8000 :
X86ISA
MISCREG_MTRR_FIX_64K_00000 :
X86ISA
MISCREG_MTRR_PHYS_BASE_0 :
X86ISA
MISCREG_MTRR_PHYS_BASE_1 :
X86ISA
MISCREG_MTRR_PHYS_BASE_2 :
X86ISA
MISCREG_MTRR_PHYS_BASE_3 :
X86ISA
MISCREG_MTRR_PHYS_BASE_4 :
X86ISA
MISCREG_MTRR_PHYS_BASE_5 :
X86ISA
MISCREG_MTRR_PHYS_BASE_6 :
X86ISA
MISCREG_MTRR_PHYS_BASE_7 :
X86ISA
MISCREG_MTRR_PHYS_BASE_BASE :
X86ISA
MISCREG_MTRR_PHYS_BASE_END :
X86ISA
MISCREG_MTRR_PHYS_MASK_0 :
X86ISA
MISCREG_MTRR_PHYS_MASK_1 :
X86ISA
MISCREG_MTRR_PHYS_MASK_2 :
X86ISA
MISCREG_MTRR_PHYS_MASK_3 :
X86ISA
MISCREG_MTRR_PHYS_MASK_4 :
X86ISA
MISCREG_MTRR_PHYS_MASK_5 :
X86ISA
MISCREG_MTRR_PHYS_MASK_6 :
X86ISA
MISCREG_MTRR_PHYS_MASK_7 :
X86ISA
MISCREG_MTRR_PHYS_MASK_BASE :
X86ISA
MISCREG_MTRR_PHYS_MASK_END :
X86ISA
MISCREG_MTRRCAP :
X86ISA
MISCREG_MTVAL :
RiscvISA
MISCREG_MTVEC :
RiscvISA
MISCREG_MUTEX :
ArmISA
MISCREG_MVBAR :
ArmISA
MISCREG_MVFR0 :
ArmISA
MISCREG_MVFR0_EL1 :
ArmISA
MISCREG_MVFR1 :
ArmISA
MISCREG_MVFR1_EL1 :
ArmISA
MISCREG_MVFR2_EL1 :
ArmISA
MISCREG_MVP_CONF0 :
MipsISA
MISCREG_MVP_CONF1 :
MipsISA
MISCREG_MVP_CONTROL :
MipsISA
MISCREG_MXCSR :
X86ISA
MISCREG_NMRR :
ArmISA
MISCREG_NMRR_MAIR1 :
ArmISA
MISCREG_NMRR_MAIR1_NS :
ArmISA
MISCREG_NMRR_MAIR1_S :
ArmISA
MISCREG_NMRR_NS :
ArmISA
MISCREG_NMRR_S :
ArmISA
MISCREG_NOP :
ArmISA
MISCREG_NSACR :
ArmISA
MISCREG_NUMMISCREGS :
SparcISA
MISCREG_NUMREGS :
MipsISA
MISCREG_NZCV :
ArmISA
MISCREG_OSDLR_EL1 :
ArmISA
MISCREG_OSDTRRX_EL1 :
ArmISA
MISCREG_OSDTRTX_EL1 :
ArmISA
MISCREG_OSECCR_EL1 :
ArmISA
MISCREG_OSLAR_EL1 :
ArmISA
MISCREG_OSLSR_EL1 :
ArmISA
MISCREG_PAGEGRAIN :
MipsISA
MISCREG_PAGEMASK :
MipsISA
MISCREG_PAN :
ArmISA
MISCREG_PAR :
ArmISA
MISCREG_PAR_EL1 :
ArmISA
MISCREG_PAR_NS :
ArmISA
MISCREG_PAR_S :
ArmISA
MISCREG_PAT :
X86ISA
MISCREG_PCI_CONFIG_ADDRESS :
X86ISA
MISCREG_PCR :
SparcISA
MISCREG_PERF_EVT_CTR0 :
X86ISA
MISCREG_PERF_EVT_CTR1 :
X86ISA
MISCREG_PERF_EVT_CTR2 :
X86ISA
MISCREG_PERF_EVT_CTR3 :
X86ISA
MISCREG_PERF_EVT_CTR_BASE :
X86ISA
MISCREG_PERF_EVT_CTR_END :
X86ISA
MISCREG_PERF_EVT_SEL0 :
X86ISA
MISCREG_PERF_EVT_SEL1 :
X86ISA
MISCREG_PERF_EVT_SEL2 :
X86ISA
MISCREG_PERF_EVT_SEL3 :
X86ISA
MISCREG_PERF_EVT_SEL_BASE :
X86ISA
MISCREG_PERF_EVT_SEL_END :
X86ISA
MISCREG_PERFCNT0 :
MipsISA
MISCREG_PERFCNT1 :
MipsISA
MISCREG_PERFCNT2 :
MipsISA
MISCREG_PERFCNT3 :
MipsISA
MISCREG_PERFCNT4 :
MipsISA
MISCREG_PERFCNT5 :
MipsISA
MISCREG_PERFCNT6 :
MipsISA
MISCREG_PERFCNT7 :
MipsISA
MISCREG_PIC :
SparcISA
MISCREG_PIL :
SparcISA
MISCREG_PMCCFILTR :
ArmISA
MISCREG_PMCCFILTR_EL0 :
ArmISA
MISCREG_PMCCNTR :
ArmISA
MISCREG_PMCCNTR_EL0 :
ArmISA
MISCREG_PMCEID0 :
ArmISA
MISCREG_PMCEID0_EL0 :
ArmISA
MISCREG_PMCEID1 :
ArmISA
MISCREG_PMCEID1_EL0 :
ArmISA
MISCREG_PMCNTENCLR :
ArmISA
MISCREG_PMCNTENCLR_EL0 :
ArmISA
MISCREG_PMCNTENSET :
ArmISA
MISCREG_PMCNTENSET_EL0 :
ArmISA
MISCREG_PMCR :
ArmISA
MISCREG_PMCR_EL0 :
ArmISA
MISCREG_PMEVCNTR0_EL0 :
ArmISA
MISCREG_PMEVCNTR1_EL0 :
ArmISA
MISCREG_PMEVCNTR2_EL0 :
ArmISA
MISCREG_PMEVCNTR3_EL0 :
ArmISA
MISCREG_PMEVCNTR4_EL0 :
ArmISA
MISCREG_PMEVCNTR5_EL0 :
ArmISA
MISCREG_PMEVTYPER0_EL0 :
ArmISA
MISCREG_PMEVTYPER1_EL0 :
ArmISA
MISCREG_PMEVTYPER2_EL0 :
ArmISA
MISCREG_PMEVTYPER3_EL0 :
ArmISA
MISCREG_PMEVTYPER4_EL0 :
ArmISA
MISCREG_PMEVTYPER5_EL0 :
ArmISA
MISCREG_PMINTENCLR :
ArmISA
MISCREG_PMINTENCLR_EL1 :
ArmISA
MISCREG_PMINTENSET :
ArmISA
MISCREG_PMINTENSET_EL1 :
ArmISA
MISCREG_PMOVSCLR_EL0 :
ArmISA
MISCREG_PMOVSR :
ArmISA
MISCREG_PMOVSSET :
ArmISA
MISCREG_PMOVSSET_EL0 :
ArmISA
MISCREG_PMPADDR00 :
RiscvISA
MISCREG_PMPADDR01 :
RiscvISA
MISCREG_PMPADDR02 :
RiscvISA
MISCREG_PMPADDR03 :
RiscvISA
MISCREG_PMPADDR04 :
RiscvISA
MISCREG_PMPADDR05 :
RiscvISA
MISCREG_PMPADDR06 :
RiscvISA
MISCREG_PMPADDR07 :
RiscvISA
MISCREG_PMPADDR08 :
RiscvISA
MISCREG_PMPADDR09 :
RiscvISA
MISCREG_PMPADDR10 :
RiscvISA
MISCREG_PMPADDR11 :
RiscvISA
MISCREG_PMPADDR12 :
RiscvISA
MISCREG_PMPADDR13 :
RiscvISA
MISCREG_PMPADDR14 :
RiscvISA
MISCREG_PMPADDR15 :
RiscvISA
MISCREG_PMPCFG0 :
RiscvISA
MISCREG_PMPCFG2 :
RiscvISA
MISCREG_PMSELR :
ArmISA
MISCREG_PMSELR_EL0 :
ArmISA
MISCREG_PMSWINC :
ArmISA
MISCREG_PMSWINC_EL0 :
ArmISA
MISCREG_PMUSERENR :
ArmISA
MISCREG_PMUSERENR_EL0 :
ArmISA
MISCREG_PMXEVCNTR :
ArmISA
MISCREG_PMXEVCNTR_EL0 :
ArmISA
MISCREG_PMXEVTYPER :
ArmISA
MISCREG_PMXEVTYPER_EL0 :
ArmISA
MISCREG_PMXEVTYPER_PMCCFILTR :
ArmISA
MISCREG_PRI_NS_RD :
ArmISA
MISCREG_PRI_NS_WR :
ArmISA
MISCREG_PRI_S_RD :
ArmISA
MISCREG_PRI_S_WR :
ArmISA
MISCREG_PRID :
MipsISA
MISCREG_PRIVTICK :
SparcISA
MISCREG_PRRR :
ArmISA
MISCREG_PRRR_MAIR0 :
ArmISA
MISCREG_PRRR_MAIR0_NS :
ArmISA
MISCREG_PRRR_MAIR0_S :
ArmISA
MISCREG_PRRR_NS :
ArmISA
MISCREG_PRRR_S :
ArmISA
MISCREG_PRV :
RiscvISA
MISCREG_PSTATE :
SparcISA
MISCREG_QUEUE_CPU_MONDO_HEAD :
SparcISA
MISCREG_QUEUE_CPU_MONDO_TAIL :
SparcISA
MISCREG_QUEUE_DEV_MONDO_HEAD :
SparcISA
MISCREG_QUEUE_DEV_MONDO_TAIL :
SparcISA
MISCREG_QUEUE_NRES_ERROR_HEAD :
SparcISA
MISCREG_QUEUE_NRES_ERROR_TAIL :
SparcISA
MISCREG_QUEUE_RES_ERROR_HEAD :
SparcISA
MISCREG_QUEUE_RES_ERROR_TAIL :
SparcISA
MISCREG_RAMINDEX :
ArmISA
MISCREG_RAZ :
ArmISA
MISCREG_REVIDR :
ArmISA
MISCREG_REVIDR_EL1 :
ArmISA
MISCREG_RFLAGS :
X86ISA
MISCREG_RMR :
ArmISA
MISCREG_RMR_EL3 :
ArmISA
MISCREG_RVBAR_EL1 :
ArmISA
MISCREG_RVBAR_EL2 :
ArmISA
MISCREG_RVBAR_EL3 :
ArmISA
MISCREG_SATP :
RiscvISA
MISCREG_SCAUSE :
RiscvISA
MISCREG_SCOUNTEREN :
RiscvISA
MISCREG_SCR :
ArmISA
MISCREG_SCR_EL3 :
ArmISA
MISCREG_SCRATCHPAD_R0 :
SparcISA
MISCREG_SCRATCHPAD_R1 :
SparcISA
MISCREG_SCRATCHPAD_R2 :
SparcISA
MISCREG_SCRATCHPAD_R3 :
SparcISA
MISCREG_SCRATCHPAD_R4 :
SparcISA
MISCREG_SCRATCHPAD_R5 :
SparcISA
MISCREG_SCRATCHPAD_R6 :
SparcISA
MISCREG_SCRATCHPAD_R7 :
SparcISA
MISCREG_SCTLR :
ArmISA
MISCREG_SCTLR_EL1 :
ArmISA
MISCREG_SCTLR_EL12 :
ArmISA
MISCREG_SCTLR_EL2 :
ArmISA
MISCREG_SCTLR_EL3 :
ArmISA
MISCREG_SCTLR_NS :
ArmISA
MISCREG_SCTLR_RST :
ArmISA
MISCREG_SCTLR_S :
ArmISA
MISCREG_SDCR :
ArmISA
MISCREG_SDER :
ArmISA
MISCREG_SDER32_EL3 :
ArmISA
MISCREG_SEDELEG :
RiscvISA
MISCREG_SEG_ATTR_BASE :
X86ISA
MISCREG_SEG_BASE_BASE :
X86ISA
MISCREG_SEG_EFF_BASE_BASE :
X86ISA
MISCREG_SEG_LIMIT_BASE :
X86ISA
MISCREG_SEG_SEL_BASE :
X86ISA
MISCREG_SEPC :
RiscvISA
MISCREG_SEV_MAILBOX :
ArmISA
MISCREG_SF_MASK :
X86ISA
MISCREG_SIDELEG :
RiscvISA
MISCREG_SMM_CTL :
X86ISA
MISCREG_SOFTINT :
SparcISA
MISCREG_SOFTINT_CLR :
SparcISA
MISCREG_SOFTINT_SET :
SparcISA
MISCREG_SP_EL0 :
ArmISA
MISCREG_SP_EL1 :
ArmISA
MISCREG_SP_EL2 :
ArmISA
MISCREG_SPSEL :
ArmISA
MISCREG_SPSR :
ArmISA
MISCREG_SPSR_ABT :
ArmISA
MISCREG_SPSR_ABT_AA64 :
ArmISA
MISCREG_SPSR_EL1 :
ArmISA
MISCREG_SPSR_EL12 :
ArmISA
MISCREG_SPSR_EL2 :
ArmISA
MISCREG_SPSR_EL3 :
ArmISA
MISCREG_SPSR_FIQ :
ArmISA
MISCREG_SPSR_FIQ_AA64 :
ArmISA
MISCREG_SPSR_HYP :
ArmISA
MISCREG_SPSR_IRQ :
ArmISA
MISCREG_SPSR_IRQ_AA64 :
ArmISA
MISCREG_SPSR_MON :
ArmISA
MISCREG_SPSR_SVC :
ArmISA
MISCREG_SPSR_UND :
ArmISA
MISCREG_SPSR_UND_AA64 :
ArmISA
MISCREG_SRS_CONF0 :
MipsISA
MISCREG_SRS_CONF1 :
MipsISA
MISCREG_SRS_CONF2 :
MipsISA
MISCREG_SRS_CONF3 :
MipsISA
MISCREG_SRS_CONF4 :
MipsISA
MISCREG_SRSCTL :
MipsISA
MISCREG_SRSMAP :
MipsISA
MISCREG_SS :
X86ISA
MISCREG_SS_ATTR :
X86ISA
MISCREG_SS_BASE :
X86ISA
MISCREG_SS_EFF_BASE :
X86ISA
MISCREG_SS_LIMIT :
X86ISA
MISCREG_SSCRATCH :
RiscvISA
MISCREG_STAR :
X86ISA
MISCREG_STATUS :
MipsISA
,
RiscvISA
MISCREG_STICK :
SparcISA
MISCREG_STICK_CMPR :
SparcISA
MISCREG_STRAND_STS_REG :
SparcISA
MISCREG_STVAL :
RiscvISA
MISCREG_STVEC :
RiscvISA
MISCREG_SYSCFG :
X86ISA
MISCREG_SYSENTER_CS :
X86ISA
MISCREG_SYSENTER_EIP :
X86ISA
MISCREG_SYSENTER_ESP :
X86ISA
MISCREG_TAGHI0 :
MipsISA
MISCREG_TAGHI2 :
MipsISA
MISCREG_TAGHI4 :
MipsISA
MISCREG_TAGHI6 :
MipsISA
MISCREG_TAGLO0 :
MipsISA
MISCREG_TAGLO2 :
MipsISA
MISCREG_TAGLO4 :
MipsISA
MISCREG_TAGLO6 :
MipsISA
MISCREG_TBA :
SparcISA
MISCREG_TC_BIND :
MipsISA
MISCREG_TC_CONTEXT :
MipsISA
MISCREG_TC_HALT :
MipsISA
MISCREG_TC_RESTART :
MipsISA
MISCREG_TC_SCHEDULE :
MipsISA
MISCREG_TC_SCHEFBACK :
MipsISA
MISCREG_TC_STATUS :
MipsISA
MISCREG_TCMTR :
ArmISA
MISCREG_TCR_EL1 :
ArmISA
MISCREG_TCR_EL12 :
ArmISA
MISCREG_TCR_EL2 :
ArmISA
MISCREG_TCR_EL3 :
ArmISA
MISCREG_TDATA1 :
RiscvISA
MISCREG_TDATA2 :
RiscvISA
MISCREG_TDATA3 :
RiscvISA
MISCREG_TEECR :
ArmISA
MISCREG_TEECR32_EL1 :
ArmISA
MISCREG_TEEHBR :
ArmISA
MISCREG_TEEHBR32_EL1 :
ArmISA
MISCREG_TICK :
SparcISA
MISCREG_TICK_CMPR :
SparcISA
MISCREG_TIME :
RiscvISA
MISCREG_TL :
SparcISA
MISCREG_TLB_DATA :
SparcISA
MISCREG_TLBI_ALLE1 :
ArmISA
MISCREG_TLBI_ALLE1IS :
ArmISA
MISCREG_TLBI_ALLE2 :
ArmISA
MISCREG_TLBI_ALLE2IS :
ArmISA
MISCREG_TLBI_ALLE3 :
ArmISA
MISCREG_TLBI_ALLE3IS :
ArmISA
MISCREG_TLBI_ASIDE1_Xt :
ArmISA
MISCREG_TLBI_ASIDE1IS_Xt :
ArmISA
MISCREG_TLBI_IPAS2E1_Xt :
ArmISA
MISCREG_TLBI_IPAS2E1IS_Xt :
ArmISA
MISCREG_TLBI_IPAS2LE1_Xt :
ArmISA
MISCREG_TLBI_IPAS2LE1IS_Xt :
ArmISA
MISCREG_TLBI_VAAE1_Xt :
ArmISA
MISCREG_TLBI_VAAE1IS_Xt :
ArmISA
MISCREG_TLBI_VAALE1_Xt :
ArmISA
MISCREG_TLBI_VAALE1IS_Xt :
ArmISA
MISCREG_TLBI_VAE1_Xt :
ArmISA
MISCREG_TLBI_VAE1IS_Xt :
ArmISA
MISCREG_TLBI_VAE2_Xt :
ArmISA
MISCREG_TLBI_VAE2IS_Xt :
ArmISA
MISCREG_TLBI_VAE3_Xt :
ArmISA
MISCREG_TLBI_VAE3IS_Xt :
ArmISA
MISCREG_TLBI_VALE1_Xt :
ArmISA
MISCREG_TLBI_VALE1IS_Xt :
ArmISA
MISCREG_TLBI_VALE2_Xt :
ArmISA
MISCREG_TLBI_VALE2IS_Xt :
ArmISA
MISCREG_TLBI_VALE3_Xt :
ArmISA
MISCREG_TLBI_VALE3IS_Xt :
ArmISA
MISCREG_TLBI_VMALLE1 :
ArmISA
MISCREG_TLBI_VMALLE1IS :
ArmISA
MISCREG_TLBI_VMALLS12E1 :
ArmISA
MISCREG_TLBI_VMALLS12E1IS :
ArmISA
MISCREG_TLBIALL :
ArmISA
MISCREG_TLBIALLH :
ArmISA
MISCREG_TLBIALLHIS :
ArmISA
MISCREG_TLBIALLIS :
ArmISA
MISCREG_TLBIALLNSNH :
ArmISA
MISCREG_TLBIALLNSNHIS :
ArmISA
MISCREG_TLBIASID :
ArmISA
MISCREG_TLBIASIDIS :
ArmISA
MISCREG_TLBIIPAS2 :
ArmISA
MISCREG_TLBIIPAS2IS :
ArmISA
MISCREG_TLBIIPAS2L :
ArmISA
MISCREG_TLBIIPAS2LIS :
ArmISA
MISCREG_TLBIMVA :
ArmISA
MISCREG_TLBIMVAA :
ArmISA
MISCREG_TLBIMVAAIS :
ArmISA
MISCREG_TLBIMVAAL :
ArmISA
MISCREG_TLBIMVAALIS :
ArmISA
MISCREG_TLBIMVAH :
ArmISA
MISCREG_TLBIMVAHIS :
ArmISA
MISCREG_TLBIMVAIS :
ArmISA
MISCREG_TLBIMVAL :
ArmISA
MISCREG_TLBIMVALH :
ArmISA
MISCREG_TLBIMVALHIS :
ArmISA
MISCREG_TLBIMVALIS :
ArmISA
MISCREG_TLBTR :
ArmISA
MISCREG_TNPC :
SparcISA
MISCREG_TOP_MEM :
X86ISA
MISCREG_TOP_MEM2 :
X86ISA
MISCREG_TP_VALUE :
MipsISA
MISCREG_TPC :
SparcISA
MISCREG_TPIDR_EL0 :
ArmISA
MISCREG_TPIDR_EL1 :
ArmISA
MISCREG_TPIDR_EL2 :
ArmISA
MISCREG_TPIDR_EL3 :
ArmISA
MISCREG_TPIDRPRW :
ArmISA
MISCREG_TPIDRPRW_NS :
ArmISA
MISCREG_TPIDRPRW_S :
ArmISA
MISCREG_TPIDRRO_EL0 :
ArmISA
MISCREG_TPIDRURO :
ArmISA
MISCREG_TPIDRURO_NS :
ArmISA
MISCREG_TPIDRURO_S :
ArmISA
MISCREG_TPIDRURW :
ArmISA
MISCREG_TPIDRURW_NS :
ArmISA
MISCREG_TPIDRURW_S :
ArmISA
MISCREG_TR :
X86ISA
MISCREG_TR_ATTR :
X86ISA
MISCREG_TR_BASE :
X86ISA
MISCREG_TR_EFF_BASE :
X86ISA
MISCREG_TR_LIMIT :
X86ISA
MISCREG_TRACE_BPC :
MipsISA
MISCREG_TRACE_CONTROL1 :
MipsISA
MISCREG_TRACE_CONTROL2 :
MipsISA
MISCREG_TSC :
X86ISA
MISCREG_TSC_AUX :
X86ISA
MISCREG_TSELECT :
RiscvISA
MISCREG_TSG :
X86ISA
MISCREG_TSG_ATTR :
X86ISA
MISCREG_TSG_BASE :
X86ISA
MISCREG_TSG_EFF_BASE :
X86ISA
MISCREG_TSG_LIMIT :
X86ISA
MISCREG_TSL :
X86ISA
MISCREG_TSL_ATTR :
X86ISA
MISCREG_TSL_BASE :
X86ISA
MISCREG_TSL_EFF_BASE :
X86ISA
MISCREG_TSL_LIMIT :
X86ISA
MISCREG_TSTATE :
SparcISA
MISCREG_TT :
SparcISA
MISCREG_TTBCR :
ArmISA
MISCREG_TTBCR_NS :
ArmISA
MISCREG_TTBCR_S :
ArmISA
MISCREG_TTBR0 :
ArmISA
MISCREG_TTBR0_EL1 :
ArmISA
MISCREG_TTBR0_EL12 :
ArmISA
MISCREG_TTBR0_EL2 :
ArmISA
MISCREG_TTBR0_EL3 :
ArmISA
MISCREG_TTBR0_NS :
ArmISA
MISCREG_TTBR0_S :
ArmISA
MISCREG_TTBR1 :
ArmISA
MISCREG_TTBR1_EL1 :
ArmISA
MISCREG_TTBR1_EL12 :
ArmISA
MISCREG_TTBR1_EL2 :
ArmISA
MISCREG_TTBR1_NS :
ArmISA
MISCREG_TTBR1_S :
ArmISA
MISCREG_UCAUSE :
RiscvISA
MISCREG_UEPC :
RiscvISA
MISCREG_UNKNOWN :
ArmISA
MISCREG_UNVERIFIABLE :
ArmISA
MISCREG_USCRATCH :
RiscvISA
MISCREG_USER_TRACE_DATA :
MipsISA
MISCREG_USR_NS_RD :
ArmISA
MISCREG_USR_NS_WR :
ArmISA
MISCREG_USR_S_RD :
ArmISA
MISCREG_USR_S_WR :
ArmISA
MISCREG_UTVAL :
RiscvISA
MISCREG_UTVEC :
RiscvISA
MISCREG_VBAR :
ArmISA
MISCREG_VBAR_EL1 :
ArmISA
MISCREG_VBAR_EL12 :
ArmISA
MISCREG_VBAR_EL2 :
ArmISA
MISCREG_VBAR_EL3 :
ArmISA
MISCREG_VBAR_NS :
ArmISA
MISCREG_VBAR_S :
ArmISA
MISCREG_VDISR_EL2 :
ArmISA
MISCREG_VENDORID :
RiscvISA
MISCREG_VM_CR :
X86ISA
MISCREG_VM_HSAVE_PA :
X86ISA
MISCREG_VMPIDR :
ArmISA
MISCREG_VMPIDR_EL2 :
ArmISA
MISCREG_VPE_CONF0 :
MipsISA
MISCREG_VPE_CONF1 :
MipsISA
MISCREG_VPE_CONTROL :
MipsISA
MISCREG_VPE_OPT :
MipsISA
MISCREG_VPE_SCHEDULE :
MipsISA
MISCREG_VPE_SCHEFBACK :
MipsISA
MISCREG_VPIDR :
ArmISA
MISCREG_VPIDR_EL2 :
ArmISA
MISCREG_VSESR_EL2 :
ArmISA
MISCREG_VSTCR_EL2 :
ArmISA
MISCREG_VSTTBR_EL2 :
ArmISA
MISCREG_VTCR :
ArmISA
MISCREG_VTCR_EL2 :
ArmISA
MISCREG_VTTBR :
ArmISA
MISCREG_VTTBR_EL2 :
ArmISA
MISCREG_WARN_NOT_FAIL :
ArmISA
MISCREG_WATCHHI0 :
MipsISA
MISCREG_WATCHHI1 :
MipsISA
MISCREG_WATCHHI2 :
MipsISA
MISCREG_WATCHHI3 :
MipsISA
MISCREG_WATCHHI4 :
MipsISA
MISCREG_WATCHHI5 :
MipsISA
MISCREG_WATCHHI6 :
MipsISA
MISCREG_WATCHHI7 :
MipsISA
MISCREG_WATCHLO0 :
MipsISA
MISCREG_WATCHLO1 :
MipsISA
MISCREG_WATCHLO2 :
MipsISA
MISCREG_WATCHLO3 :
MipsISA
MISCREG_WATCHLO4 :
MipsISA
MISCREG_WATCHLO5 :
MipsISA
MISCREG_WATCHLO6 :
MipsISA
MISCREG_WATCHLO7 :
MipsISA
MISCREG_WIRED :
MipsISA
MISCREG_X87_TOP :
X86ISA
MISCREG_XCCONTEXT64 :
MipsISA
MISCREG_YQMASK :
MipsISA
MISCREG_ZCR_EL1 :
ArmISA
MISCREG_ZCR_EL12 :
ArmISA
MISCREG_ZCR_EL2 :
ArmISA
MISCREG_ZCR_EL3 :
ArmISA
MODE_ABORT :
ArmISA
MODE_EL0T :
ArmISA
MODE_EL1H :
ArmISA
MODE_EL1T :
ArmISA
MODE_EL2H :
ArmISA
MODE_EL2T :
ArmISA
MODE_EL3H :
ArmISA
MODE_EL3T :
ArmISA
MODE_FIQ :
ArmISA
MODE_HYP :
ArmISA
MODE_IRQ :
ArmISA
MODE_L :
MipsISA
MODE_LA :
MipsISA
MODE_MAXMODE :
ArmISA
MODE_MON :
ArmISA
MODE_R :
MipsISA
MODE_RA :
MipsISA
MODE_SVC :
ArmISA
MODE_SYSTEM :
ArmISA
MODE_UNDEFINED :
ArmISA
MODE_USER :
ArmISA
MODE_X :
MipsISA
MonitorMwait :
X86ISA
MSTRC :
X86ISA::ConditionTests
MSTRZ :
X86ISA::ConditionTests
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