exec_stage.hh

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/*
 * Copyright (c) 2014-2015 Advanced Micro Devices, Inc.
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 *
 * For use for simulation and test purposes only
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 * this list of conditions and the following disclaimer.
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#ifndef __EXEC_STAGE_HH__
#define __EXEC_STAGE_HH__
 
#include <string>
#include <unordered_map>
#include <utility>
#include <vector>
 
#include "base/statistics.hh"
#include "base/stats/group.hh"
 
namespace gem5
{
 
class ComputeUnit;
class ScheduleToExecute;
class Wavefront;
 
struct ComputeUnitParams;
 
enum STAT_STATUS
{
    IdleExec,
    BusyExec,
    PostExec
};
 
enum DISPATCH_STATUS
{
    EMPTY = 0, // no wave present in dispatchList slot
    EXREADY, // wave ready for execution
    SKIP, // extra memory resource needed, Shared Mem. only
};
 
// Execution stage.
// Each execution resource executes the
// wave which is in its dispatch list.
// The schedule stage is responsible for
// adding a wave into each execution resource's
// dispatch list.
 
class ExecStage
{
  public:
    ExecStage(const ComputeUnitParams &p, ComputeUnit &cu,
              ScheduleToExecute &from_schedule);
    ~ExecStage() { }
    void init();
    void exec();
 
    std::string dispStatusToStr(int j);
    void dumpDispList();
 
    const std::string& name() const { return _name; }
 
  private:
    void collectStatistics(enum STAT_STATUS stage, int unitId);
    void initStatistics();
    ComputeUnit &computeUnit;
    ScheduleToExecute &fromSchedule;
 
    bool lastTimeInstExecuted;
    bool thisTimeInstExecuted;
    bool instrExecuted;
    int executionResourcesUsed;
    uint64_t idle_dur;
    const std::string _name;
 
  protected:
    struct ExecStageStats : public statistics::Group
    {
        ExecStageStats(statistics::Group *parent);
 
        // number of transitions from active to idle
        statistics::Scalar numTransActiveIdle;
        // number of idle cycles
        statistics::Scalar numCyclesWithNoIssue;
        // number of busy cycles
        statistics::Scalar numCyclesWithInstrIssued;
        // SIMDs active per cycle
        statistics::Distribution spc;
        // duration of idle periods in cycles
        statistics::Distribution idleDur;
        // number of cycles during which at least one
        // instruction was issued to an execution resource type
        statistics::Vector numCyclesWithInstrTypeIssued;
        // number of idle cycles during which the scheduler
        // issued no instructions targeting a specific
        // execution resource type
        statistics::Vector numCyclesWithNoInstrTypeIssued;
    } stats;
};
 
} // namespace gem5
 
#endif // __EXEC_STAGE_HH__