gem5  v21.1.0.0
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nop_static_inst.cc
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28 
29 #include "cpu/nop_static_inst.hh"
30 
31 #include "cpu/static_inst.hh"
32 
33 namespace gem5
34 {
35 
36 namespace
37 {
38 
39 class NopStaticInst : public StaticInst
40 {
41  public:
42  NopStaticInst() : StaticInst("gem5 nop", No_OpClass) {}
43 
44  Fault
45  execute(ExecContext *xc, Trace::InstRecord *traceData) const override
46  {
47  return NoFault;
48  }
49 
50  void
51  advancePC(TheISA::PCState &pcState) const override
52  {
53  pcState.advance();
54  }
55 
56  std::string
57  generateDisassembly(Addr pc,
58  const loader::SymbolTable *symtab) const override
59  {
60  return mnemonic;
61  }
62 };
63 
64 }
65 
66 StaticInstPtr nopStaticInstPtr = new NopStaticInst;
67 
68 } // namespace gem5
gem5::NoFault
constexpr decltype(nullptr) NoFault
Definition: types.hh:260
gem5::RefCountingPtr< StaticInst >
nop_static_inst.hh
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:255
gem5::MipsISA::PCState
GenericISA::DelaySlotPCState< 4 > PCState
Definition: pcstate.hh:40
static_inst.hh
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::nopStaticInstPtr
StaticInstPtr nopStaticInstPtr
Pointer to a statically allocated generic "nop" instruction object.
Definition: nop_static_inst.cc:66
gem5::MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:243
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
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