gem5  v21.1.0.1
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gem5::ruby Namespace Reference

Namespaces

 garnet
 

Classes

class  AbstractCacheEntry
 
class  AbstractController
 
class  AccessTraceForAddress
 
class  AddressProfiler
 
class  BankedArray
 
class  BasicExtLink
 
class  BasicIntLink
 
class  BasicLink
 
class  BasicRouter
 
class  CacheMemory
 
class  CacheRecorder
 
class  CoalescedRequest
 
class  Consumer
 
class  DataBlock
 
class  DirectoryMemory
 
struct  DMARequest
 
class  DMASequencer
 
class  ExpectedMap
 
class  FaultModel
 
class  GPUCoalescer
 
class  Histogram
 
class  HTMSequencer
 
struct  LinkEntry
 
struct  LinkOrder
 
struct  MachineID
 
class  Message
 
class  MessageBuffer
 
class  NetDest
 
class  Network
 
class  PendingWriteInst
 
struct  PerfectCacheLineState
 
class  PerfectCacheMemory
 
class  PerfectSwitch
 
class  PersistentTable
 
class  PersistentTableEntry
 
class  PrefetchEntry
 
class  Profiler
 
class  RejectException
 
class  RubyDummyPort
 
class  RubyPort
 
class  RubyPortProxy
 
class  RubyPrefetcher
 
class  RubyRequest
 
class  RubySystem
 
class  Sequencer
 
struct  SequencerRequest
 
class  Set
 
class  SimpleExtLink
 
class  SimpleIntLink
 
class  SimpleNetwork
 
class  StoreTrace
 
class  SubBlock
 
class  Switch
 
class  TBEStorage
 
class  TBETable
 
class  Throttle
 
class  TimerTable
 
class  Topology
 
class  TraceRecord
 Class for recording cache contents. More...
 
class  TriggerQueue
 
class  UncoalescedTable
 
class  VIPERCoalescer
 
class  WireBuffer
 
class  WriteMask
 

Typedefs

typedef std::vector< bool > BoolVec
 
typedef std::vector< int > IntVec
 
typedef unsigned int LinkID
 
typedef unsigned int NodeID
 
typedef unsigned int SwitchID
 
typedef std::vector< std::vector< std::vector< int > > > Matrix
 
typedef std::string PortDirection
 
typedef std::map< std::pair< SwitchID, SwitchID >, std::vector< LinkEntry > > LinkMap
 
typedef AddressProfiler::AddressMap AddressMap
 
typedef std::shared_ptr< Message > MsgPtr
 
typedef std::list< PacketPtr > PerInstPackets
 

Functions

Addr bitSelect (Addr addr, unsigned int small, unsigned int big)
 
Addr maskLowOrderBits (Addr addr, unsigned int number)
 
Addr getOffset (Addr addr)
 
Addr makeLineAddress (Addr addr)
 
Addr makeLineAddress (Addr addr, int cacheLineBits)
 
Addr makeNextStrideAddress (Addr addr, int stride)
 
std::string printAddress (Addr addr)
 
std::ostream & operator<< (std::ostream &os, const BoolVec &myvector)
 
std::ostream & operator<< (std::ostream &out, const Consumer &obj)
 
std::ostream & operator<< (std::ostream &out, const DataBlock &obj)
 
bool operator== (const DataBlock &obj1, const DataBlock &obj2)
 
template<typename RespType , typename DataType >
std::ostream & operator<< (std::ostream &out, const ExpectedMap< RespType, DataType > &obj)
 
bool node_less_then_eq (const Histogram *n1, const Histogram *n2)
 
std::ostream & operator<< (std::ostream &out, const Histogram &obj)
 
std::ostream & operator<< (std::ostream &os, const IntVec &myvector)
 
std::string MachineIDToString (MachineID machine)
 
bool operator== (const MachineID &obj1, const MachineID &obj2)
 
bool operator!= (const MachineID &obj1, const MachineID &obj2)
 
::std::ostream & operator<< (::std::ostream &out, const MachineID &obj)
 
std::ostream & operator<< (std::ostream &out, const NetDest &obj)
 
std::ostream & operator<< (std::ostream &out, const Set &obj)
 
std::ostream & operator<< (std::ostream &out, const SubBlock &obj)
 
template<class T >
std::ostream & operator<< (std::ostream &out, const TriggerQueue< T > &obj)
 
std::ostream & operator<< (std::ostream &out, const WriteMask &obj)
 
std::ostream & operator<< (std::ostream &out, const BasicLink &obj)
 
std::ostream & operator<< (std::ostream &out, const BasicRouter &obj)
 
Tick random_time ()
 
std::ostream & operator<< (std::ostream &out, const MessageBuffer &obj)
 
std::ostream & operator<< (std::ostream &out, const Network &obj)
 
bool operator< (const LinkOrder &l1, const LinkOrder &l2)
 
std::ostream & operator<< (std::ostream &out, const PerfectSwitch &obj)
 
std::ostream & operator<< (std::ostream &out, const SimpleExtLink &obj)
 
std::ostream & operator<< (std::ostream &out, const SimpleIntLink &obj)
 
std::ostream & operator<< (std::ostream &out, const SimpleNetwork &obj)
 
std::ostream & operator<< (std::ostream &out, const Switch &obj)
 
static int network_message_to_size (Message *net_msg_ptr)
 
std::ostream & operator<< (std::ostream &out, const Throttle &obj)
 
std::ostream & operator<< (std::ostream &out, const Topology &obj)
 
std::ostream & operator<< (std::ostream &out, const AccessTraceForAddress &obj)
 
AccessTraceForAddress & lookupTraceForAddress (Addr addr, AddressMap &record_map)
 
void printSorted (std::ostream &out, int num_of_sequencers, const AddressMap &record_map, std::string description, Profiler *profiler)
 
std::ostream & operator<< (std::ostream &out, const AddressProfiler &obj)
 
bool node_less_then_eq (const StoreTrace *n1, const StoreTrace *n2)
 
std::ostream & operator<< (std::ostream &out, const StoreTrace &obj)
 
std::ostream & operator<< (std::ostream &out, const AbstractCacheEntry &obj)
 
bool operator> (const MsgPtr &lhs, const MsgPtr &rhs)
 
std::ostream & operator<< (std::ostream &out, const Message &obj)
 
std::ostream & operator<< (std::ostream &out, const RubyRequest &obj)
 
NetDest broadcast (MachineType type)
 
MachineID mapAddressToRange (Addr addr, MachineType type, int low_bit, int num_bits, int cluster_id=0)
 
NodeID machineIDToNodeID (MachineID machID)
 
MachineType machineIDToMachineType (MachineID machID)
 
int machineCount (MachineType machType)
 
MachineID createMachineID (MachineType type, NodeID id)
 
MachineID MachineTypeAndNodeIDToMachineID (MachineType type, NodeID node)
 
Cycles zero_time ()
 
Cycles intToCycles (int c)
 
Tick intToTick (int c)
 
NodeID intToID (int nodenum)
 
int IDToInt (NodeID id)
 
int addressToInt (Addr addr)
 
Addr intToAddress (int addr)
 
int mod (int val, int mod)
 
int max_tokens ()
 
bool isWriteRequest (RubyRequestType type)
 
bool isDataReadRequest (RubyRequestType type)
 
bool isReadRequest (RubyRequestType type)
 
bool isHtmCmdRequest (RubyRequestType type)
 
RubyRequestType htmCmdToRubyRequestType (const Packet *pkt)
 
int addressOffset (Addr addr, Addr base)
 
bool testAndRead (Addr addr, DataBlock &blk, Packet *pkt)
 This function accepts an address, a data block and a packet. More...
 
bool testAndReadMask (Addr addr, DataBlock &blk, WriteMask &mask, Packet *pkt)
 This function accepts an address, a data block, a write mask and a packet. More...
 
bool testAndWrite (Addr addr, DataBlock &blk, Packet *pkt)
 This function accepts an address, a data block and a packet. More...
 
int countBoolVec (BoolVec bVec)
 
std::ostream & operator<< (std::ostream &out, const CacheMemory &obj)
 
std::ostream & operator<< (std::ostream &out, const DirectoryMemory &obj)
 
template<class ENTRY >
std::ostream & operator<< (std::ostream &out, const PerfectCacheLineState< ENTRY > &obj)
 
template<class ENTRY >
std::ostream & operator<< (std::ostream &out, const PerfectCacheMemory< ENTRY > &obj)
 
std::ostream & operator<< (std::ostream &out, const PersistentTable &obj)
 
std::ostream & operator<< (std::ostream &out, const PersistentTableEntry &obj)
 
template<class ENTRY >
std::ostream & operator<< (std::ostream &out, const TBETable< ENTRY > &obj)
 
std::ostream & operator<< (std::ostream &out, const TimerTable &obj)
 
std::ostream & operator<< (std::ostream &out, const WireBuffer &obj)
 
bool compareTraceRecords (const TraceRecord *n1, const TraceRecord *n2)
 
std::ostream & operator<< (std::ostream &out, const TraceRecord &obj)
 
template<class KEY , class VALUE >
std::ostream & operator<< (std::ostream &out, const std::unordered_map< KEY, VALUE > &map)
 
std::ostream & operator<< (std::ostream &out, const GPUCoalescer &obj)
 
template<class VALUE >
std::ostream & operator<< (std::ostream &out, const std::deque< VALUE > &queue)
 
std::ostream & operator<< (std::ostream &out, const HTMSequencer &obj)
 
std::ostream & operator<< (std::ostream &out, const SequencerRequest &obj)
 
std::ostream & operator<< (std::ostream &out, const Sequencer &obj)
 

Variables

const int PRIORITY_SWITCH_LIMIT = 128
 
const int MESSAGE_SIZE_MULTIPLIER = 1000
 
const int BROADCAST_SCALING = 1
 
const int INFINITE_LATENCY = 10000
 

Typedef Documentation

◆ AddressMap

typedef AddressProfiler::AddressMap gem5::ruby::AddressMap

Definition at line 44 of file AddressProfiler.cc.

◆ BoolVec

typedef std::vector<bool> gem5::ruby::BoolVec

Definition at line 50 of file BoolVec.hh.

◆ IntVec

typedef std::vector<int> gem5::ruby::IntVec

Definition at line 46 of file IntVec.hh.

◆ LinkID

typedef unsigned int gem5::ruby::LinkID

Definition at line 39 of file TypeDefines.hh.

◆ LinkMap

typedef std::map<std::pair<SwitchID, SwitchID>, std::vector<LinkEntry> > gem5::ruby::LinkMap

Definition at line 78 of file Topology.hh.

◆ Matrix

typedef std::vector<std::vector<std::vector<int> > > gem5::ruby::Matrix

Definition at line 59 of file Topology.hh.

◆ MsgPtr

typedef std::shared_ptr<Message> gem5::ruby::MsgPtr

Definition at line 59 of file Message.hh.

◆ NodeID

typedef unsigned int gem5::ruby::NodeID

Definition at line 40 of file TypeDefines.hh.

◆ PerInstPackets

typedef std::list<PacketPtr> gem5::ruby::PerInstPackets

Definition at line 64 of file GPUCoalescer.hh.

◆ PortDirection

typedef std::string gem5::ruby::PortDirection

Definition at line 68 of file Topology.hh.

◆ SwitchID

typedef unsigned int gem5::ruby::SwitchID

Definition at line 41 of file TypeDefines.hh.

Function Documentation

◆ addressOffset()

int gem5::ruby::addressOffset ( Addr  addr,
Addr  base 
)
inline

Definition at line 182 of file RubySlicc_Util.hh.

References gem5::X86ISA::addr, gem5::X86ISA::base, and gem5::ArmISA::offset.

◆ addressToInt()

int gem5::ruby::addressToInt ( Addr  addr)
inline

Definition at line 88 of file RubySlicc_Util.hh.

References gem5::X86ISA::addr.

◆ bitSelect()

Addr gem5::ruby::bitSelect ( Addr  addr,
unsigned int  small,
unsigned int  big 
)

Definition at line 41 of file Address.cc.

References gem5::X86ISA::addr.

Referenced by gem5::CheckTable::addCheck(), gem5::ruby::CacheMemory::addressToCacheSet(), getOffset(), and mapAddressToRange().

◆ broadcast()

NetDest gem5::ruby::broadcast ( MachineType  type)
inline

Definition at line 45 of file RubySlicc_ComponentMapping.hh.

References gem5::ruby::NetDest::add(), gem5::ArmISA::i, and gem5::X86ISA::type.

◆ compareTraceRecords()

bool gem5::ruby::compareTraceRecords ( const TraceRecord *  n1,
const TraceRecord *  n2 
)
inline

Definition at line 123 of file CacheRecorder.hh.

References gem5::ruby::TraceRecord::m_time.

Referenced by gem5::ruby::CacheRecorder::aggregateRecords().

◆ countBoolVec()

int gem5::ruby::countBoolVec ( BoolVec  bVec)
inline

Definition at line 278 of file RubySlicc_Util.hh.

References gem5::X86ISA::count, and gem5::ArmISA::e.

◆ createMachineID()

MachineID gem5::ruby::createMachineID ( MachineType  type,
NodeID  id 
)
inline

Definition at line 87 of file RubySlicc_ComponentMapping.hh.

References gem5::X86ISA::type.

◆ getOffset()

Addr gem5::ruby::getOffset ( Addr  addr)

Definition at line 54 of file Address.cc.

References gem5::X86ISA::addr, bitSelect(), and gem5::ruby::RubySystem::getBlockSizeBits().

Referenced by gem5::ruby::Sequencer::hitCallback(), gem5::ruby::GPUCoalescer::hitCallback(), gem5::ruby::SubBlock::internalMergeFrom(), gem5::ruby::SubBlock::internalMergeTo(), gem5::ruby::RubyPort::MemResponsePort::recvAtomic(), gem5::ruby::AbstractController::serviceMemoryQueue(), gem5::ruby::DataBlock::setData(), and gem5::ruby::MessageBuffer::stallMessage().

◆ htmCmdToRubyRequestType()

RubyRequestType gem5::ruby::htmCmdToRubyRequestType ( const Packet *  pkt)
inline

Definition at line 165 of file RubySlicc_Util.hh.

References panic, and gem5::Packet::req.

Referenced by gem5::ruby::Sequencer::makeRequest().

◆ IDToInt()

int gem5::ruby::IDToInt ( NodeID  id)
inline

Definition at line 81 of file RubySlicc_Util.hh.

References gem5::ArmISA::id.

◆ intToAddress()

Addr gem5::ruby::intToAddress ( int  addr)
inline

Definition at line 95 of file RubySlicc_Util.hh.

References gem5::X86ISA::addr.

◆ intToCycles()

Cycles gem5::ruby::intToCycles ( int  c)
inline

Definition at line 69 of file RubySlicc_Util.hh.

References gem5::ArmISA::c.

◆ intToID()

NodeID gem5::ruby::intToID ( int  nodenum)
inline

Definition at line 74 of file RubySlicc_Util.hh.

References gem5::ArmISA::id.

◆ intToTick()

Tick gem5::ruby::intToTick ( int  c)
inline

Definition at line 71 of file RubySlicc_Util.hh.

References gem5::ArmISA::c.

◆ isDataReadRequest()

bool gem5::ruby::isDataReadRequest ( RubyRequestType  type)
inline

Definition at line 130 of file RubySlicc_Util.hh.

References gem5::X86ISA::type.

Referenced by isReadRequest().

◆ isHtmCmdRequest()

bool gem5::ruby::isHtmCmdRequest ( RubyRequestType  type)
inline

Definition at line 152 of file RubySlicc_Util.hh.

References gem5::X86ISA::type.

Referenced by gem5::ruby::HTMSequencer::htmCallback(), and gem5::ruby::HTMSequencer::insertRequest().

◆ isReadRequest()

bool gem5::ruby::isReadRequest ( RubyRequestType  type)
inline

Definition at line 141 of file RubySlicc_Util.hh.

References isDataReadRequest(), and gem5::X86ISA::type.

◆ isWriteRequest()

bool gem5::ruby::isWriteRequest ( RubyRequestType  type)
inline

Definition at line 113 of file RubySlicc_Util.hh.

References gem5::X86ISA::type.

◆ lookupTraceForAddress()

AccessTraceForAddress & gem5::ruby::lookupTraceForAddress ( Addr  addr,
AddressMap &  record_map 
)

Definition at line 50 of file AddressProfiler.cc.

References gem5::X86ISA::addr, gem5::ArmISA::i, gem5::MipsISA::r, and gem5::ruby::AccessTraceForAddress::setAddress().

Referenced by gem5::ruby::AddressProfiler::addTraceSample(), and gem5::ruby::AddressProfiler::profileRetry().

◆ machineCount()

int gem5::ruby::machineCount ( MachineType  machType)
inline

Definition at line 81 of file RubySlicc_ComponentMapping.hh.

◆ machineIDToMachineType()

MachineType gem5::ruby::machineIDToMachineType ( MachineID  machID)
inline

Definition at line 75 of file RubySlicc_ComponentMapping.hh.

References gem5::ruby::MachineID::type.

◆ machineIDToNodeID()

NodeID gem5::ruby::machineIDToNodeID ( MachineID  machID)
inline

Definition at line 69 of file RubySlicc_ComponentMapping.hh.

References gem5::ruby::MachineID::num.

◆ MachineIDToString()

std::string gem5::ruby::MachineIDToString ( MachineID  machine)
inline

Definition at line 73 of file MachineID.hh.

References gem5::csprintf(), gem5::ruby::MachineID::num, and gem5::ruby::MachineID::type.

Referenced by gem5::ruby::RubySystem::registerMachineID(), and gem5::ruby::RubySystem::registerRequestorIDs().

◆ MachineTypeAndNodeIDToMachineID()

MachineID gem5::ruby::MachineTypeAndNodeIDToMachineID ( MachineType  type,
NodeID  node 
)
inline

Definition at line 94 of file RubySlicc_ComponentMapping.hh.

References gem5::X86ISA::type.

◆ makeLineAddress() [1/2]

Addr gem5::ruby::makeLineAddress ( Addr  addr)

Definition at line 60 of file Address.cc.

References gem5::X86ISA::addr, and gem5::ruby::RubySystem::getBlockSizeBits().

Referenced by gem5::ruby::CacheMemory::addressToCacheSet(), gem5::ruby::AddressProfiler::addTraceSample(), gem5::ruby::PerfectCacheMemory< ENTRY >::allocate(), gem5::ruby::CacheMemory::allocate(), gem5::ruby::GPUCoalescer::atomicCallback(), gem5::ruby::CacheMemory::cacheAvail(), gem5::ruby::CacheMemory::cacheProbe(), gem5::ruby::PerfectCacheMemory< ENTRY >::changePermission(), gem5::ruby::GPUCoalescer::coalescePacket(), gem5::ruby::PersistentTable::countReadStarvingForAddress(), gem5::ruby::PersistentTable::countStarvingForAddress(), gem5::ruby::PerfectCacheMemory< ENTRY >::deallocate(), gem5::ruby::PersistentTable::findSmallest(), gem5::ruby::CacheMemory::findTagInSet(), gem5::ruby::CacheMemory::findTagInSetIgnorePermissions(), gem5::ruby::RubySystem::functionalRead(), gem5::ruby::RubySystem::functionalWrite(), gem5::ruby::PerfectCacheMemory< ENTRY >::getPermission(), gem5::ruby::Sequencer::hitCallback(), gem5::ruby::GPUCoalescer::hitCallback(), gem5::ruby::HTMSequencer::htmCallback(), gem5::ruby::RubyPrefetcher::initializeStream(), gem5::FetchUnit::initiateFetch(), gem5::ruby::Sequencer::insertRequest(), gem5::ruby::PersistentTable::isLocked(), gem5::ruby::TBETable< ENTRY >::isPresent(), gem5::ruby::DMASequencer::issueNext(), gem5::ruby::VIPERCoalescer::issueRequest(), gem5::ruby::PerfectCacheMemory< ENTRY >::isTagPresent(), gem5::ruby::Sequencer::llscCheckMonitor(), gem5::ruby::PerfectCacheMemory< ENTRY >::lookup(), gem5::ruby::CacheMemory::lookup(), makeNextStrideAddress(), gem5::ruby::DMASequencer::makeRequest(), gem5::ruby::Sequencer::makeRequest(), gem5::ruby::PersistentTable::markEntries(), gem5::FetchUnit::FetchBufDesc::nextFetchAddr(), gem5::ruby::RubyPrefetcher::observeMiss(), gem5::ruby::PersistentTable::okToIssueStarving(), gem5::Check::performCallback(), gem5::ruby::PersistentTable::persistentRequestLock(), gem5::ruby::PersistentTable::persistentRequestUnlock(), printAddress(), gem5::ruby::Sequencer::readCallback(), gem5::ruby::GPUCoalescer::readCallback(), gem5::ruby::RubyPort::MemResponsePort::recvFunctional(), gem5::ruby::RubyRequest::RubyRequest(), gem5::ruby::TimerTable::set(), gem5::ruby::CacheMemory::setMRU(), testAndRead(), testAndReadMask(), testAndWrite(), gem5::ruby::PersistentTable::typeOfSmallest(), gem5::ruby::TimerTable::unset(), gem5::ruby::Sequencer::writeCallback(), gem5::ruby::GPUCoalescer::writeCallback(), and gem5::ruby::VIPERCoalescer::writeCompleteCallback().

◆ makeLineAddress() [2/2]

Addr gem5::ruby::makeLineAddress ( Addr  addr,
int  cacheLineBits 
)

Definition at line 66 of file Address.cc.

References gem5::X86ISA::addr, and maskLowOrderBits().

◆ makeNextStrideAddress()

Addr gem5::ruby::makeNextStrideAddress ( Addr  addr,
int  stride 
)

Definition at line 73 of file Address.cc.

References gem5::X86ISA::addr, gem5::ruby::RubySystem::getBlockSizeBytes(), makeLineAddress(), and gem5::ArmISA::stride.

Referenced by gem5::ruby::RubyPrefetcher::accessUnitFilter(), gem5::ruby::RubyPrefetcher::getPrefetchEntry(), gem5::ruby::RubyPrefetcher::initializeStream(), and gem5::ruby::RubyPrefetcher::issueNextPrefetch().

◆ mapAddressToRange()

MachineID gem5::ruby::mapAddressToRange ( Addr  addr,
MachineType  type,
int  low_bit,
int  num_bits,
int  cluster_id = 0 
)
inline

Definition at line 56 of file RubySlicc_ComponentMapping.hh.

References gem5::X86ISA::addr, bitSelect(), gem5::ruby::MachineID::num, and gem5::X86ISA::type.

◆ maskLowOrderBits()

Addr gem5::ruby::maskLowOrderBits ( Addr  addr,
unsigned int  number 
)

Definition at line 48 of file Address.cc.

References gem5::X86ISA::addr.

Referenced by makeLineAddress().

◆ max_tokens()

int gem5::ruby::max_tokens ( )
inline

Definition at line 107 of file RubySlicc_Util.hh.

◆ mod()

int gem5::ruby::mod ( int  val,
int  mod 
)
inline

Definition at line 102 of file RubySlicc_Util.hh.

References gem5::X86ISA::val.

◆ network_message_to_size()

int gem5::ruby::network_message_to_size ( Message *  net_msg_ptr)
static

Definition at line 258 of file Throttle.cc.

References BROADCAST_SCALING, gem5::ruby::Message::getDestination(), gem5::ruby::Message::getMessageSize(), gem5::ruby::NetDest::isBroadcast(), MESSAGE_SIZE_MULTIPLIER, and gem5::ruby::Network::MessageSizeType_to_int().

Referenced by gem5::ruby::Throttle::operateVnet().

◆ node_less_then_eq() [1/2]

bool gem5::ruby::node_less_then_eq ( const Histogram *  n1,
const Histogram *  n2 
)

Definition at line 239 of file Histogram.cc.

References gem5::ruby::Histogram::size().

◆ node_less_then_eq() [2/2]

bool gem5::ruby::node_less_then_eq ( const StoreTrace *  n1,
const StoreTrace *  n2 
)
inline

Definition at line 83 of file StoreTrace.hh.

References gem5::ruby::StoreTrace::getTotal().

◆ operator!=()

bool gem5::ruby::operator!= ( const MachineID &  obj1,
const MachineID &  obj2 
)
inline

Definition at line 85 of file MachineID.hh.

References gem5::ruby::MachineID::num, and gem5::ruby::MachineID::type.

◆ operator<()

bool gem5::ruby::operator< ( const LinkOrder &  l1,
const LinkOrder &  l2 
)

Definition at line 52 of file PerfectSwitch.cc.

References gem5::X86ISA::l1, and gem5::X86ISA::l2.

◆ operator<<() [1/45]

std::ostream & gem5::ruby::operator<< ( ::std::ostream &  out,
const MachineID &  obj 
)

Definition at line 94 of file MachineID.hh.

References gem5::ruby::MachineID::num, and gem5::ruby::MachineID::type.

◆ operator<<() [2/45]

std::ostream & gem5::ruby::operator<< ( std::ostream &  os,
const BoolVec &  myvector 
)

Definition at line 49 of file BoolVec.cc.

References gem5::ArmISA::e, and gem5::X86ISA::os.

◆ operator<<() [3/45]

std::ostream & gem5::ruby::operator<< ( std::ostream &  os,
const IntVec &  myvector 
)

Definition at line 45 of file IntVec.cc.

References gem5::X86ISA::os.

◆ operator<<() [4/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const AbstractCacheEntry &  obj 
)
inline

Definition at line 132 of file AbstractCacheEntry.hh.

References gem5::ruby::AbstractCacheEntry::print().

◆ operator<<() [5/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const AccessTraceForAddress &  obj 
)
inline

Definition at line 87 of file AccessTraceForAddress.hh.

References gem5::ruby::AccessTraceForAddress::print().

◆ operator<<() [6/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const AddressProfiler &  obj 
)
inline

Definition at line 114 of file AddressProfiler.hh.

References gem5::ruby::AddressProfiler::print().

◆ operator<<() [7/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const BasicLink &  obj 
)
inline

Definition at line 68 of file BasicLink.hh.

References gem5::ruby::BasicLink::print().

◆ operator<<() [8/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const BasicRouter &  obj 
)
inline

Definition at line 63 of file BasicRouter.hh.

References gem5::ruby::BasicRouter::print().

◆ operator<<() [9/45]

std::ostream & gem5::ruby::operator<< ( std::ostream &  out,
const CacheMemory &  obj 
)

Definition at line 63 of file CacheMemory.cc.

References gem5::ruby::CacheMemory::print().

◆ operator<<() [10/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const Consumer &  obj 
)
inline

Definition at line 100 of file Consumer.hh.

References gem5::ruby::Consumer::print().

◆ operator<<() [11/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const DataBlock &  obj 
)
inline

Definition at line 129 of file DataBlock.hh.

References gem5::ruby::DataBlock::print().

◆ operator<<() [12/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const DirectoryMemory &  obj 
)
inline

Definition at line 116 of file DirectoryMemory.hh.

References gem5::ruby::DirectoryMemory::print().

◆ operator<<() [13/45]

template<typename RespType , typename DataType >
std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const ExpectedMap< RespType, DataType > &  obj 
)
inline

Definition at line 231 of file ExpectedMap.hh.

References gem5::ruby::ExpectedMap< RespType, DataType >::print().

◆ operator<<() [14/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const GPUCoalescer &  obj 
)
inline

Definition at line 538 of file GPUCoalescer.hh.

References gem5::ruby::GPUCoalescer::print().

◆ operator<<() [15/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const Histogram &  obj 
)
inline

Definition at line 85 of file Histogram.hh.

References gem5::ruby::Histogram::print().

◆ operator<<() [16/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const HTMSequencer &  obj 
)
inline

Definition at line 112 of file HTMSequencer.hh.

References gem5::ruby::HTMSequencer::print().

◆ operator<<() [17/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const Message &  obj 
)
inline

Definition at line 148 of file Message.hh.

References gem5::ruby::Message::print().

◆ operator<<() [18/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const MessageBuffer &  obj 
)
inline

Definition at line 276 of file MessageBuffer.hh.

References gem5::ruby::MessageBuffer::print().

◆ operator<<() [19/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const NetDest &  obj 
)
inline

Definition at line 118 of file NetDest.hh.

References gem5::ruby::NetDest::print().

◆ operator<<() [20/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const Network &  obj 
)
inline

Definition at line 182 of file Network.hh.

References gem5::ruby::Network::print().

◆ operator<<() [21/45]

template<class ENTRY >
std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const PerfectCacheLineState< ENTRY > &  obj 
)
inline

Definition at line 66 of file PerfectCacheMemory.hh.

◆ operator<<() [22/45]

template<class ENTRY >
std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const PerfectCacheMemory< ENTRY > &  obj 
)
inline

Definition at line 115 of file PerfectCacheMemory.hh.

References gem5::ruby::PerfectCacheMemory< ENTRY >::print().

◆ operator<<() [23/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const PerfectSwitch &  obj 
)
inline

Definition at line 116 of file PerfectSwitch.hh.

References gem5::ruby::PerfectSwitch::print().

◆ operator<<() [24/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const PersistentTable &  obj 
)
inline

Definition at line 91 of file PersistentTable.hh.

References gem5::ruby::PersistentTable::print().

◆ operator<<() [25/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const PersistentTableEntry &  obj 
)
inline

Definition at line 99 of file PersistentTable.hh.

References gem5::ruby::PersistentTableEntry::print().

◆ operator<<() [26/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const RubyRequest &  obj 
)
inline

Definition at line 172 of file RubyRequest.hh.

References gem5::ruby::RubyRequest::print().

◆ operator<<() [27/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const Sequencer &  obj 
)
inline

Definition at line 324 of file Sequencer.hh.

References gem5::ruby::Sequencer::print().

◆ operator<<() [28/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const SequencerRequest &  obj 
)

◆ operator<<() [29/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const Set &  obj 
)
inline

Definition at line 228 of file Set.hh.

References gem5::ruby::Set::print().

◆ operator<<() [30/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const SimpleExtLink &  obj 
)
inline

Definition at line 59 of file SimpleLink.hh.

References gem5::ruby::SimpleExtLink::print().

◆ operator<<() [31/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const SimpleIntLink &  obj 
)
inline

Definition at line 79 of file SimpleLink.hh.

References gem5::ruby::SimpleIntLink::print().

◆ operator<<() [32/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const SimpleNetwork &  obj 
)
inline

Definition at line 124 of file SimpleNetwork.hh.

References gem5::ruby::SimpleNetwork::print().

◆ operator<<() [33/45]

template<class VALUE >
std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const std::deque< VALUE > &  queue 
)

Definition at line 320 of file HTMSequencer.cc.

References gem5::ArmISA::i.

◆ operator<<() [34/45]

template<class KEY , class VALUE >
std::ostream & gem5::ruby::operator<< ( std::ostream &  out,
const std::unordered_map< KEY, VALUE > &  map 
)

Definition at line 680 of file GPUCoalescer.cc.

References gem5::ArmISA::i.

◆ operator<<() [35/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const StoreTrace &  obj 
)
inline

Definition at line 89 of file StoreTrace.hh.

References gem5::ruby::StoreTrace::print().

◆ operator<<() [36/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const SubBlock &  obj 
)
inline

Definition at line 80 of file SubBlock.hh.

References gem5::ruby::SubBlock::print().

◆ operator<<() [37/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const Switch &  obj 
)
inline

Definition at line 129 of file Switch.hh.

References gem5::ruby::Switch::print().

◆ operator<<() [38/45]

template<class ENTRY >
std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const TBETable< ENTRY > &  obj 
)
inline

Definition at line 93 of file TBETable.hh.

References gem5::ruby::TBETable< ENTRY >::print().

◆ operator<<() [39/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const Throttle &  obj 
)
inline

Definition at line 129 of file Throttle.hh.

References gem5::ruby::Throttle::print().

◆ operator<<() [40/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const TimerTable &  obj 
)
inline

Definition at line 95 of file TimerTable.hh.

References gem5::ruby::TimerTable::print().

◆ operator<<() [41/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const Topology &  obj 
)
inline

Definition at line 124 of file Topology.hh.

References gem5::ruby::Topology::print().

◆ operator<<() [42/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const TraceRecord &  obj 
)
inline

Definition at line 129 of file CacheRecorder.hh.

References gem5::ruby::TraceRecord::print().

◆ operator<<() [43/45]

template<class T >
std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const TriggerQueue< T > &  obj 
)
inline

Definition at line 119 of file TriggerQueue.hh.

References gem5::ruby::TriggerQueue< T >::print().

◆ operator<<() [44/45]

std::ostream & gem5::ruby::operator<< ( std::ostream &  out,
const WireBuffer &  obj 
)

Definition at line 50 of file WireBuffer.cc.

References gem5::ruby::WireBuffer::print().

◆ operator<<() [45/45]

std::ostream& gem5::ruby::operator<< ( std::ostream &  out,
const WriteMask &  obj 
)
inline

Definition at line 267 of file WriteMask.hh.

References gem5::ruby::WriteMask::print().

◆ operator==() [1/2]

bool gem5::ruby::operator== ( const DataBlock &  obj1,
const DataBlock &  obj2 
)
inline

Definition at line 137 of file DataBlock.hh.

References gem5::ruby::DataBlock::equal().

◆ operator==() [2/2]

bool gem5::ruby::operator== ( const MachineID &  obj1,
const MachineID &  obj2 
)
inline

Definition at line 79 of file MachineID.hh.

References gem5::ruby::MachineID::num, and gem5::ruby::MachineID::type.

◆ operator>()

bool gem5::ruby::operator> ( const MsgPtr &  lhs,
const MsgPtr &  rhs 
)
inline

Definition at line 136 of file Message.hh.

References gem5::MipsISA::l, and gem5::MipsISA::r.

◆ printAddress()

std::string gem5::ruby::printAddress ( Addr  addr)

Definition at line 80 of file Address.cc.

References gem5::X86ISA::addr, and makeLineAddress().

Referenced by gem5::DmaThread::hitCallback(), gem5::GpuWavefront::hitCallback(), gem5::GpuWavefront::issueAtomicOps(), gem5::DmaThread::issueLoadOps(), gem5::GpuWavefront::issueLoadOps(), gem5::ruby::VIPERCoalescer::issueRequest(), gem5::ruby::Sequencer::issueRequest(), gem5::DmaThread::issueStoreOps(), gem5::GpuWavefront::issueStoreOps(), gem5::TesterThread::printOutstandingReqs(), gem5::ruby::UncoalescedTable::printRequestTable(), gem5::ruby::GPUCoalescer::printRequestTable(), gem5::ruby::Sequencer::recordMissLatency(), gem5::TesterThread::validateAtomicResp(), and gem5::TesterThread::validateLoadResp().

◆ printSorted()

void gem5::ruby::printSorted ( std::ostream &  out,
int  num_of_sequencers,
const AddressMap &  record_map,
std::string  description,
Profiler *  profiler 
)

Definition at line 72 of file AddressProfiler.cc.

References gem5::ruby::Histogram::add(), gem5::ruby::Profiler::getAllInstructions(), gem5::ruby::AccessTraceForAddress::getTotal(), gem5::ruby::AccessTraceForAddress::getTouchedBy(), gem5::ArmISA::i, gem5::ArmISA::j, and gem5::ruby::AccessTraceForAddress::less_equal().

Referenced by gem5::ruby::AddressProfiler::printStats().

◆ random_time()

Tick gem5::ruby::random_time ( )

Definition at line 186 of file MessageBuffer.cc.

References gem5::Random::random(), and gem5::random_mt.

Referenced by gem5::ruby::MessageBuffer::enqueue().

◆ testAndRead()

bool gem5::ruby::testAndRead ( Addr  addr,
DataBlock &  blk,
Packet *  pkt 
)
inline

This function accepts an address, a data block and a packet.

If the address range for the data block contains the address which the packet needs to read, then the data from the data block is written to the packet. True is returned if the data block was read, otherwise false is returned.

This is used during a functional access "search the world" operation. The functional access looks in every place that might hold a valid data block and, if it finds one, checks to see if it is holding the address the access is searching for. During the access check, the WriteMask could be in any state, including empty.

Definition at line 204 of file RubySlicc_Util.hh.

References gem5::X86ISA::addr, data, gem5::Packet::getAddr(), gem5::ruby::DataBlock::getByte(), gem5::Packet::getPtr(), gem5::Packet::getSize(), gem5::ArmISA::i, and makeLineAddress().

◆ testAndReadMask()

bool gem5::ruby::testAndReadMask ( Addr  addr,
DataBlock &  blk,
WriteMask &  mask,
Packet *  pkt 
)
inline

This function accepts an address, a data block, a write mask and a packet.

If the valid address range for the data block contains the address which the packet needs to read, then the data from the data block is written to the packet. True is returned if any part of the data block was read, otherwise false is returned.

Definition at line 230 of file RubySlicc_Util.hh.

References gem5::X86ISA::addr, data, gem5::Packet::getAddr(), gem5::ruby::DataBlock::getByte(), gem5::Packet::getPtr(), gem5::Packet::getSize(), gem5::ArmISA::i, makeLineAddress(), and gem5::mask().

◆ testAndWrite()

bool gem5::ruby::testAndWrite ( Addr  addr,
DataBlock &  blk,
Packet *  pkt 
)
inline

This function accepts an address, a data block and a packet.

If the address range for the data block contains the address which the packet needs to write, then the data from the packet is written to the data block. True is returned if the data block was written, otherwise false is returned.

Definition at line 259 of file RubySlicc_Util.hh.

References gem5::X86ISA::addr, data, gem5::Packet::getAddr(), gem5::Packet::getConstPtr(), gem5::Packet::getSize(), gem5::ArmISA::i, makeLineAddress(), and gem5::ruby::DataBlock::setByte().

Referenced by gem5::ruby::RubyRequest::functionalWrite().

◆ zero_time()

Cycles gem5::ruby::zero_time ( )
inline

Definition at line 67 of file RubySlicc_Util.hh.

Variable Documentation

◆ BROADCAST_SCALING

const int gem5::ruby::BROADCAST_SCALING = 1

Definition at line 50 of file Throttle.cc.

Referenced by network_message_to_size().

◆ INFINITE_LATENCY

const int gem5::ruby::INFINITE_LATENCY = 10000

Definition at line 47 of file Topology.cc.

Referenced by gem5::ruby::Topology::createLinks().

◆ MESSAGE_SIZE_MULTIPLIER

const int gem5::ruby::MESSAGE_SIZE_MULTIPLIER = 1000

Definition at line 48 of file Throttle.cc.

Referenced by network_message_to_size().

◆ PRIORITY_SWITCH_LIMIT

const int gem5::ruby::PRIORITY_SWITCH_LIMIT = 128

Definition at line 48 of file PerfectSwitch.cc.

Referenced by gem5::ruby::Throttle::wakeup(), and gem5::ruby::PerfectSwitch::wakeup().

Generated on Tue Sep 7 2021 14:54:41 for gem5 by doxygen 1.8.17