- m -

• M5DebugFault() : gem5::GenericISA::M5DebugFault
• M5DebugOnceFault() : gem5::GenericISA::M5DebugOnceFault< Flavor >
• m5opRange() : gem5::System
• MachineCheck() : gem5::X86ISA::MachineCheck
• MachineCheckFault() : gem5::PowerISA::MachineCheckFault
• MachineID() : gem5::ruby::MachineID
• MacroMemOp() : gem5::ArmISA::MacroMemOp
• MacroopBase() : gem5::X86ISA::MacroopBase
• MacroTmeOp() : gem5::ArmISAInst::MacroTmeOp
• MacroVFPMemOp() : gem5::ArmISA::MacroVFPMemOp
• MADT() : gem5::X86ISA::ACPI::MADT::MADT
• main() : gem5::Coroutine< Arg, Ret > , gem5::Fiber , gem5::ItsCommand , gem5::ItsProcess , gem5::ItsTranslation , gem5::SMMUCommandExecProcess , gem5::SMMUProcess , gem5::SMMUTranslationProcess , LinkedFiber , sc_gem5::ScMainFiber , sc_gem5::Thread::Context , SwitchingFiber
• mainPacket() : gem5::o3::LSQ::LSQRequest , gem5::o3::LSQ::SplitDataRequest
• mainReq() : gem5::o3::LSQ::LSQRequest , gem5::o3::LSQ::SplitDataRequest
• maintainClusivity() : gem5::BaseCache
• maintainStepping() : gem5::Iris::ThreadContext
• maintenanceInterruptStatus() : gem5::Gicv3CPUInterface
• majority() : gem5::ArmISA::Crypto
• make_uchar_array() : tlm::tlm_bool< D >
• make_warnings_errors() : sc_core::sc_report
• makeAtomicOpFunctor() : gem5::GPUDynInst
• makeAtomicResponse() : gem5::Packet
• makeBranchInfo() : gem5::branch_prediction::LoopPredictor , gem5::branch_prediction::StatisticalCorrector , gem5::branch_prediction::TAGE_SC_L_TAGE , gem5::branch_prediction::TAGEBase
• makeCacheRecorder() : gem5::ruby::RubySystem
• makeCRField() : gem5::PowerISA::FloatOp
• makeCRFieldSigned() : gem5::PowerISA::IntOp
• makeCRFieldUnsigned() : gem5::PowerISA::IntOp
• makeExtInLink() : gem5::ruby::garnet::GarnetNetwork , gem5::ruby::Network , gem5::ruby::SimpleNetwork
• makeExtOutLink() : gem5::ruby::garnet::GarnetNetwork , gem5::ruby::Network , gem5::ruby::SimpleNetwork
• makeFragmentPackets() : gem5::minor::LSQ::SplitDataRequest
• makeFragmentRequests() : gem5::minor::LSQ::SplitDataRequest
• makeHtmTransactionalReqResponse() : gem5::Packet
• makeInternalLink() : gem5::ruby::garnet::GarnetNetwork , gem5::ruby::Network , gem5::ruby::SimpleNetwork
• makeLink() : gem5::ruby::SimpleNetwork , gem5::ruby::Topology
• makePacket() : gem5::minor::Fetch1::FetchRequest , gem5::minor::LSQ::LSQRequest
• makeParamsObject() : gem5::CxxConfigDirectoryEntry
• makeReadCmd() : gem5::Packet
• makeRequest() : gem5::ruby::DMASequencer , gem5::ruby::GPUCoalescer , gem5::ruby::RubyPort , gem5::ruby::RubyPortProxy , gem5::ruby::Sequencer , gem5::ruby::VIPERCoalescer
• makeResponse() : gem5::Packet
• makeStage2() : gem5::ArmISA::TLBIALL , gem5::ArmISA::TLBIALLEL , gem5::ArmISA::TLBIALLN , gem5::ArmISA::TLBIIPA , gem5::ArmISA::TLBIVMALL
• makeThreadHistory() : gem5::branch_prediction::MPP_StatisticalCorrector_64KB , gem5::branch_prediction::MPP_StatisticalCorrector_8KB , gem5::branch_prediction::StatisticalCorrector , gem5::branch_prediction::TAGE_SC_L_64KB_StatisticalCorrector , gem5::branch_prediction::TAGE_SC_L_8KB_StatisticalCorrector
• makeTimingResponse() : gem5::Packet
• makeTopology() : gem5::ruby::SimpleNetwork
• MakeTsbPtr() : gem5::SparcISA::TLB
• makeWriteCmd() : gem5::Packet
• makeWriteCompletePkts() : gem5::ruby::VIPERCoalescer
• makezero() : sc_dt::sc_signed , sc_dt::sc_unsigned
• Malta() : gem5::Malta
• MaltaCChip() : gem5::MaltaCChip
• MaltaIO() : gem5::MaltaIO
• manageReadTransfer() : gem5::UFSHostDevice
• manageWriteTransfer() : gem5::UFSHostDevice
• mandatoryQueueLatency() : gem5::ruby::AbstractController
• mantissa() : sc_dt::scfx_ieee_float
• mantissa0() : sc_dt::scfx_ieee_double
• mantissa1() : sc_dt::scfx_ieee_double
• map() : gem5::EmulationPageTable , gem5::MultiLevelPageTable< EntryTypes > , gem5::Process
• mapAddressToDownstreamMachine() : gem5::ruby::AbstractController
• mapAddressToLocalIdx() : gem5::ruby::DirectoryMemory
• mapAddressToMachine() : gem5::ruby::AbstractController
• mapc() : gem5::ItsCommand
• mapd() : gem5::ItsCommand
• mapi() : gem5::ItsCommand
• mapIndexToBank() : gem5::ruby::BankedArray
• mapPciInterrupt() : gem5::GenericArmPciHost , gem5::GenericPciHost
• MappedFileBuffer() : gem5::VMA::MappedFileBuffer
• MapperRequestPort() : gem5::AddrMapper::MapperRequestPort
• MapperResponsePort() : gem5::AddrMapper::MapperResponsePort
• mapPid() : gem5::ArmISA::FsFreebsd , gem5::ArmISA::FsLinux
• mapQIfSlotAvlbl() : gem5::HWScheduler
• mapRegion() : gem5::MemState
• mapSgpr() : gem5::RegisterManager , gem5::RegisterManagerPolicy , gem5::StaticRegisterManagerPolicy
• mapSize() : gem5::loader::ElfObject , gem5::loader::ObjectFile
• mapsTo() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• mapti() : gem5::ItsCommand
• mapVgpr() : gem5::RegisterManager , gem5::RegisterManagerPolicy , gem5::StaticRegisterManagerPolicy
• mapWaveToExeUnit() : gem5::ScoreboardCheckStage
• mapWaveToGlobalMem() : gem5::ComputeUnit
• mapWaveToLocalMem() : gem5::ComputeUnit
• mapWaveToScalarAlu() : gem5::ComputeUnit
• mapWaveToScalarAluGlobalIdx() : gem5::ComputeUnit
• mapWaveToScalarMem() : gem5::ComputeUnit
• markActive() : gem5::System::Threads
• markClean() : gem5::ProxyPtrBuffer< Proxy >
• markCompletedInsts() : gem5::o3::Commit
• markDelayed() : gem5::ArmISA::Stage2LookUp , gem5::ArmISA::TableWalker::Stage2Walk , gem5::BaseMMU::Translation , gem5::DataTranslation< ExecContextPtr > , gem5::minor::Fetch1::FetchRequest , gem5::minor::LSQ::LSQRequest , gem5::o3::Fetch::FetchTranslation , gem5::o3::LSQ::LSQRequest , gem5::prefetch::Queued::DeferredPacket , gem5::TimingSimpleCPU::FetchTranslation , gem5::X86ISA::GpuTLB::Translation
• markDirty() : gem5::ProxyPtrBuffer< Proxy >
• markEntries() : gem5::ruby::PersistentTable
• markInService() : gem5::BaseCache , gem5::MSHR , gem5::MSHRQueue , gem5::WriteQueue
• markInvDone() : gem5::HSAQueueEntry
• markPending() : gem5::MSHRQueue
• markReg() : gem5::RegisterFile
• MarkRegBusyScbEvent() : gem5::RegisterFile::MarkRegBusyScbEvent
• MarkRegFreeScbEvent() : gem5::RegisterFile::MarkRegFreeScbEvent
• markRemoved() : gem5::ruby::Sequencer
• markSrcRegReady() : gem5::o3::DynInst
• markupInstDests() : gem5::minor::Scoreboard
• markWFReady() : gem5::ScoreboardCheckToSchedule
• markWgDispatch() : gem5::HSAQueueEntry
• markWorkItem() : gem5::System
• mask() : gem5::loader::MemoryImage , gem5::loader::SymbolTable , gem5::memory::LockedAddr
• maskAll() : gem5::X86ISA::I8259
• MaskedPattern() : gem5::compression::DictionaryCompressor< T >::MaskedPattern< mask >
• MaskedValuePattern() : gem5::compression::DictionaryCompressor< T >::MaskedValuePattern< value, mask >
• maskInt() : gem5::Pl011
• maskToPortList() : gem5::SnoopFilter
• MasterPort() : gem5::MasterPort
• match() : gem5::ArmISA::TLB , gem5::ArmISA::TlbEntry , gem5::EmulatedDriver , gem5::ObjectMatch
• matchAddr() : gem5::Packet
• matchBlockAddr() : gem5::MSHR , gem5::Packet , gem5::QueueEntry , gem5::WriteQueueEntry
• matches() : gem5::CacheBlk::Lock , gem5::Trie< Key, Value >::Node
• matchesContext() : gem5::memory::LockedAddr
• matchPwrState() : gem5::PowerState
• matchTag() : gem5::TaggedEntry
• MathExpr() : gem5::MathExpr
• MathExprPowerModel() : gem5::MathExprPowerModel
• Matrix64x12() : Matrix64x12
• maxAddr() : gem5::loader::MemoryImage
• maxBarrierCnt() : gem5::ComputeUnit , gem5::WFBarrier
• maxCommands() : gem5::Gicv3Its
• maxLSQAllocation() : gem5::o3::LSQ
• maxOperandSize() : gem5::GPUDynInst , gem5::GPUStaticInst
• maxRequestors() : gem5::System
• maxsize() : gem5::PacketFifo
• maxSize() : sc_core::sc_port_base , sc_gem5::Port
• maxSrcScalarRegOperandSize() : gem5::GPUDynInst
• maxSrcVecRegOperandSize() : gem5::GPUDynInst
• maxTickFunc() : sc_gem5::Scheduler
• maybeSetupAtomicExtension() : gem5::fastmodel::AmbaToTlmBridge64
• MC146818() : gem5::MC146818
• McrMrcImplDefined() : gem5::McrMrcImplDefined
• McrMrcMiscInst() : gem5::McrMrcMiscInst
• McrrOp() : gem5::McrrOp
• md5() : gem5::networking::TcpOpt
• MediaOpBase() : gem5::X86ISA::MediaOpBase
• memAddr() : gem5::GenericPciHost , gem5::PciHost::DeviceInterface , gem5::PciHost
• memAttr() : gem5::ArmISA::TableWalker::LongDescriptor
• memAttrs() : gem5::ArmISA::TableWalker
• memAttrsAArch64() : gem5::ArmISA::TableWalker
• memAttrsLPAE() : gem5::ArmISA::TableWalker
• MemBackdoor() : gem5::MemBackdoor
• MemChecker() : gem5::MemChecker
• MemCheckerMonitor() : gem5::MemCheckerMonitor
• MemCheckerMonitorSenderState() : gem5::MemCheckerMonitor::MemCheckerMonitorSenderState
• MemCmd() : gem5::MemCmd
• MemCtrl() : gem5::memory::MemCtrl , gem5::memory::qos::MemCtrl
• MemCtrlStats() : gem5::memory::qos::MemCtrl::MemCtrlStats
• MemDelay() : gem5::MemDelay
• MemDepEntry() : gem5::o3::MemDepUnit::MemDepEntry
• MemDepUnit() : gem5::o3::MemDepUnit
• MemDepUnitStats() : gem5::o3::MemDepUnit::MemDepUnitStats
• MemDispOp() : gem5::PowerISA::MemDispOp
• MemDispShiftOp() : gem5::PowerISA::MemDispShiftOp
• MemEntry() : gem5::Trace::TarmacBaseRecord::MemEntry
• MemFenceMicro() : gem5::RiscvISA::MemFenceMicro
• MemFootprintProbe() : gem5::MemFootprintProbe
• MemFootprintProbeStats() : gem5::MemFootprintProbe::MemFootprintProbeStats
• MemImm() : gem5::SparcISA::MemImm
• MemIndexOp() : gem5::PowerISA::MemIndexOp
• MemInst() : gem5::RiscvISA::MemInst
• MemInterface() : gem5::memory::MemInterface
• memInvalidate() : gem5::BaseCache , gem5::BaseTLB , gem5::SimObject
• MemNoDataOp() : gem5::X86ISA::MemNoDataOp
• MemOp() : gem5::PowerISA::MemOp , gem5::X86ISA::MemOp
• memOpDone() : gem5::o3::DynInst
• Memory() : gem5::ArmISA::Memory
• memory() : memory
• Memory64() : gem5::ArmISA::Memory64
• MemoryAtomicPair64() : gem5::ArmISA::MemoryAtomicPair64
• MemoryDImm() : gem5::ArmISA::MemoryDImm
• MemoryDImm64() : gem5::ArmISA::MemoryDImm64
• MemoryDImmEx64() : gem5::ArmISA::MemoryDImmEx64
• MemoryDReg() : gem5::ArmISA::MemoryDReg
• MemoryEx64() : gem5::ArmISA::MemoryEx64
• MemoryExDImm() : gem5::ArmISA::MemoryExDImm
• MemoryExImm() : gem5::ArmISA::MemoryExImm
• MemoryImage() : gem5::loader::MemoryImage
• MemoryImm() : gem5::ArmISA::MemoryImm
• MemoryImm64() : gem5::ArmISA::MemoryImm64
• MemoryLiteral64() : gem5::ArmISA::MemoryLiteral64
• MemoryManager() : Gem5SystemC::MemoryManager
• MemoryOffset() : gem5::ArmISA::MemoryOffset< Base >
• MemoryPort() : gem5::memory::CfiMemory::MemoryPort , gem5::memory::DRAMSim2::MemoryPort , gem5::memory::DRAMsim3::MemoryPort , gem5::memory::MemCtrl::MemoryPort , gem5::memory::qos::MemSinkCtrl::MemoryPort , gem5::memory::SimpleMemory::MemoryPort , gem5::ruby::AbstractController::MemoryPort
• MemoryPostIndex() : gem5::ArmISA::MemoryPostIndex< Base >
• MemoryPostIndex64() : gem5::ArmISA::MemoryPostIndex64
• MemoryPreIndex() : gem5::ArmISA::MemoryPreIndex< Base >
• MemoryPreIndex64() : gem5::ArmISA::MemoryPreIndex64
• MemoryRaw64() : gem5::ArmISA::MemoryRaw64
• MemoryReg() : gem5::ArmISA::MemoryReg
• MemoryReg64() : gem5::ArmISA::MemoryReg64
• MemPacket() : gem5::memory::MemPacket
• MemPool() : gem5::MemPool
• MemPools() : gem5::MemPools
• MemReqEvent() : gem5::ComputeUnit::ScalarDataPort::MemReqEvent
• MemRequestPort() : gem5::ruby::RubyPort::MemRequestPort
• MemResponsePort() : gem5::ruby::RubyPort::MemResponsePort
• memsetBlob() : gem5::PortProxy
• memsetBlobPhys() : gem5::PortProxy
• MemSidePort() : gem5::BaseCache::MemSidePort , gem5::SimpleCache::MemSidePort , gem5::SimpleMemobj::MemSidePort , gem5::TLBCoalescer::MemSidePort , gem5::X86ISA::GpuTLB::MemSidePort
• MemSinkCtrl() : gem5::memory::qos::MemSinkCtrl
• MemSinkCtrlStats() : gem5::memory::qos::MemSinkCtrl::MemSinkCtrlStats
• MemSinkInterface() : gem5::memory::qos::MemSinkInterface
• memSize() : gem5::AtagMem , gem5::MemPools , gem5::SEWorkload , gem5::System
• MemSlot() : gem5::KvmVM::MemSlot
• memStart() : gem5::AtagMem
• MemState() : gem5::MemState
• MemStats() : gem5::memory::AbstractMemory::MemStats
• MemTest() : gem5::MemTest
• MemTestStats() : gem5::MemTest::MemTestStats
• MemTraceProbe() : gem5::MemTraceProbe
• memWriteback() : gem5::BaseCache , gem5::MinorCPU , gem5::ruby::RubySystem , gem5::SimObject
• merge() : gem5::bloom_filter::Base , gem5::bloom_filter::Multi , gem5::bloom_filter::Perfect , gem5::X86ISA::X86StaticInst
• mergeCCEntry() : gem5::Trace::TarmacTracerRecord
• mergeFrom() : gem5::ruby::SubBlock
• mergeRegs() : gem5::GenericSyscallABI32
• mergeStatGroup() : gem5::statistics::Group
• mergesWith() : gem5::AddrRange , gem5::VMA
• mergeTe() : gem5::ArmISA::Stage2LookUp
• mergeTo() : gem5::ruby::SubBlock
• message() : gem5::GenericISA::M5DebugFault
• Message() : gem5::ruby::Message
• messageAttributes() : gem5::scmi::BaseProtocol , gem5::scmi::Protocol
• MessageBuffer() : gem5::ruby::MessageBuffer
• messageID() : gem5::scmi::Platform
• MessageSizeType_to_int() : gem5::ruby::Network
• messageType() : gem5::scmi::Platform
• method() : gem5::statistics::ValueBase< Derived >
• Method() : sc_gem5::Method
• MethodProxy() : gem5::statistics::MethodProxy< T, V >
• MHU() : gem5::MHU
• MhuDoorbell() : gem5::MhuDoorbell
• MicrocodeRom() : gem5::X86ISAInst::MicrocodeRom
• MicroCondBase() : gem5::X86ISA::MicroCondBase
• MicroDebug() : gem5::X86ISA::MicroDebug
• MicroHalt() : gem5::X86ISA::MicroHalt
• MicroIntImmOp() : gem5::ArmISA::MicroIntImmOp
• MicroIntImmXOp() : gem5::ArmISA::MicroIntImmXOp
• MicroIntMov() : gem5::ArmISA::MicroIntMov
• MicroIntOp() : gem5::ArmISA::MicroIntOp
• MicroIntRegOp() : gem5::ArmISA::MicroIntRegOp
• MicroIntRegXOp() : gem5::ArmISA::MicroIntRegXOp
• MicroMemOp() : gem5::ArmISA::MicroMemOp
• MicroMemPairOp() : gem5::ArmISA::MicroMemPairOp
• MicroNeonMemOp() : gem5::ArmISA::MicroNeonMemOp
• MicroNeonMixLaneOp() : gem5::ArmISA::MicroNeonMixLaneOp
• MicroNeonMixLaneOp64() : gem5::ArmISA::MicroNeonMixLaneOp64
• MicroNeonMixOp() : gem5::ArmISA::MicroNeonMixOp
• MicroNeonMixOp64() : gem5::ArmISA::MicroNeonMixOp64
• MicroOp() : gem5::ArmISA::MicroOp
• MicroOpX() : gem5::ArmISA::MicroOpX
• microPC() : gem5::PCStateBase
• MicroSetPCCPSR() : gem5::ArmISA::MicroSetPCCPSR
• MicroTcommit64() : gem5::ArmISAInst::MicroTcommit64
• MicroTfence64() : gem5::ArmISAInst::MicroTfence64
• microTLBLookup() : gem5::SMMUTranslationProcess
• microTLBUpdate() : gem5::SMMUTranslationProcess
• MicroTmeBasic64() : gem5::ArmISAInst::MicroTmeBasic64
• MicroTmeOp() : gem5::ArmISAInst::MicroTmeOp
• MightBeMicro() : gem5::ArmISA::MightBeMicro
• MightBeMicro64() : gem5::ArmISA::MightBeMicro64
• minAddr() : gem5::loader::MemoryImage
• minAllocatedElements() : gem5::DynPoolManager , gem5::SimplePoolManager
• minAllocation() : gem5::PoolManager
• minBankPrep() : gem5::memory::DRAMInterface
• MinorActivityRecorder() : gem5::minor::MinorActivityRecorder
• MinorBuffer() : gem5::minor::MinorBuffer< ElemType, ReportTraits, BubbleTraits >
• MinorCPU() : gem5::MinorCPU
• MinorCPUPort() : gem5::MinorCPU::MinorCPUPort
• MinorDynInst() : gem5::minor::MinorDynInst
• MinorFU() : gem5::MinorFU
• MinorFUPool() : gem5::MinorFUPool
• MinorFUTiming() : gem5::MinorFUTiming
• MinorOpClass() : gem5::MinorOpClass
• MinorOpClassSet() : gem5::MinorOpClassSet
• MinorStats() : gem5::minor::MinorStats
• minorTrace() : gem5::minor::Decode , gem5::minor::Execute , gem5::minor::Fetch1 , gem5::minor::Fetch2 , gem5::minor::InputBuffer< ElemType, ReportTraits, BubbleTraits > , gem5::minor::Latch< Data > , gem5::minor::LSQ , gem5::minor::LSQ::StoreBuffer , gem5::minor::MinorActivityRecorder , gem5::minor::MinorBuffer< ElemType, ReportTraits, BubbleTraits > , gem5::minor::Pipeline , gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits > , gem5::minor::Scoreboard
• minorTraceInst() : gem5::minor::MinorDynInst
• minorTraceResponseLine() : gem5::minor::Fetch1
• minReadToWriteDataGap() : gem5::memory::MemCtrl , gem5::memory::MemInterface
• minWriteToReadDataGap() : gem5::memory::MemCtrl , gem5::memory::MemInterface
• MipsProcess() : gem5::MipsProcess
• MiscOp() : gem5::X86ISA::MiscOp< Base >
• miscRegImm() : gem5::MiscRegImmOp64
• MiscRegImmOp64() : gem5::MiscRegImmOp64
• MiscRegImplDefined64() : gem5::MiscRegImplDefined64
• MiscRegInfo() : gem5::ArmV8KvmCPU::MiscRegInfo
• MiscRegLUTEntry() : gem5::ArmISA::ISA::MiscRegLUTEntry
• MiscRegLUTEntryInitializer() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• MiscRegOp64() : gem5::MiscRegOp64
• MiscRegRegImmOp() : gem5::MiscRegRegImmOp
• MiscRegRegImmOp64() : gem5::MiscRegRegImmOp64
• mispredicted() : gem5::o3::DynInst
• mm() : mm
• mmap() : gem5::EmulatedDriver , gem5::GPUComputeDriver , gem5::GPURenderDriver , gem5::Shader
• mmapGrowsDown() : gem5::Process , gem5::RiscvProcess
• mmapPerf() : gem5::PerfKvmCounter
• MmDisk() : gem5::MmDisk
• MmioVirtIO() : gem5::MmioVirtIO , gem5::RiscvISA::MmioVirtIO
• MMU() : gem5::ArmISA::MMU , gem5::Iris::MMU , gem5::MipsISA::MMU , gem5::PowerISA::MMU , gem5::RiscvISA::MMU , gem5::SparcISA::MMU , gem5::X86ISA::MMU
• MMUTranslationGen() : gem5::BaseMMU::MMUTranslationGen
• mnemonic() : gem5::X86ISA::X86FaultBase
• MODHIST() : gem5::branch_prediction::MultiperspectivePerceptron::MODHIST
• MODPATH() : gem5::branch_prediction::MultiperspectivePerceptron::MODPATH
• Module() : sc_gem5::Module
• mon() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• monE2H() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• monE2HRead() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• monE2HWrite() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• MonitorRequestPort() : gem5::CommMonitor::MonitorRequestPort , gem5::MemCheckerMonitor::MonitorRequestPort
• MonitorResponsePort() : gem5::CommMonitor::MonitorResponsePort , gem5::MemCheckerMonitor::MonitorResponsePort
• MonitorStats() : gem5::CommMonitor::MonitorStats
• monNonSecure() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• monNonSecureRead() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• monNonSecureWrite() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• monSecure() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• monSecureRead() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• monSecureWrite() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• moreBytes() : gem5::ArmISA::Decoder , gem5::InstDecoder , gem5::MipsISA::Decoder , gem5::PowerISA::Decoder , gem5::RiscvISA::Decoder , gem5::SparcISA::Decoder , gem5::X86ISA::Decoder
• moreBytesPtr() : gem5::InstDecoder
• moreBytesSize() : gem5::InstDecoder
• mouseAt() : gem5::ps2::TouchKit , gem5::VncMouse
• movall() : gem5::ItsCommand
• move() : gem5::loader::MemoryImage
• moveAllPendingState() : gem5::Gicv3Its
• moveBlock() : gem5::BaseSetAssoc , gem5::BaseTags , gem5::FALRU , gem5::SectorTags
• moveBlockToHead() : gem5::FALRU::CacheTracking
• moveBlockToTail() : gem5::FALRU::CacheTracking
• moveFromRequestsToTransfers() : gem5::minor::Fetch1 , gem5::minor::LSQ
• moveToFront() : gem5::MSHRQueue
• moveToHead() : gem5::FALRU
• moveToReady() : gem5::o3::MemDepUnit
• moveToTail() : gem5::FALRU
• moveToYoungerInst() : gem5::o3::InstructionQueue
• movi() : gem5::ItsCommand
• MPP_LoopPredictor() : gem5::branch_prediction::MPP_LoopPredictor
• MPP_LoopPredictor_8KB() : gem5::branch_prediction::MPP_LoopPredictor_8KB
• MPP_SCThreadHistory() : gem5::branch_prediction::MPP_StatisticalCorrector::MPP_SCThreadHistory
• MPP_StatisticalCorrector() : gem5::branch_prediction::MPP_StatisticalCorrector
• MPP_StatisticalCorrector_64KB() : gem5::branch_prediction::MPP_StatisticalCorrector_64KB
• MPP_StatisticalCorrector_8KB() : gem5::branch_prediction::MPP_StatisticalCorrector_8KB
• MPP_TAGE() : gem5::branch_prediction::MPP_TAGE
• MPP_TAGE_8KB() : gem5::branch_prediction::MPP_TAGE_8KB
• MPPBranchInfo() : gem5::branch_prediction::MultiperspectivePerceptron::MPPBranchInfo
• MPPTAGEBranchInfo() : gem5::branch_prediction::MultiperspectivePerceptronTAGE::MPPTAGEBranchInfo
• MQDDmaEvent() : gem5::GPUCommandProcessor
• MrrcOp() : gem5::MrrcOp
• MrsOp() : gem5::MrsOp
• MRU() : gem5::replacement_policy::MRU
• MRUReplData() : gem5::replacement_policy::MRU::MRUReplData
• msb() : sc_dt::scfx_ieee_double
• msec() : gem5::Time
• MSHR() : gem5::MSHR
• MSHRQueue() : gem5::MSHRQueue
• MsrBase() : gem5::MsrBase
• MsrImmOp() : gem5::MsrImmOp
• MsrRegOp() : gem5::MsrRegOp
• mss() : gem5::networking::TcpOpt
• mtup() : gem5::networking::IpOpt
• mtur() : gem5::networking::IpOpt
• Mult3() : gem5::ArmISA::Mult3
• Mult4() : gem5::ArmISA::Mult4
• multHi() : gem5::X86ISA::MediaOpBase
• Multi() : gem5::bloom_filter::Multi , gem5::compression::Multi , gem5::prefetch::Multi
• multi_init_base() : tlm_utils::multi_init_base< BUSWIDTH, TYPES, N, POL >
• multi_passthrough_initiator_socket() : tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL >
• multi_passthrough_initiator_socket_optional() : tlm_utils::multi_passthrough_initiator_socket_optional< MODULE, BUSWIDTH, TYPES, N >
• multi_passthrough_target_socket() : tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
• multi_passthrough_target_socket_optional() : tlm_utils::multi_passthrough_target_socket_optional< MODULE, BUSWIDTH, TYPES, N >
• multi_target_base() : tlm_utils::multi_target_base< BUSWIDTH, TYPES, N, POL >
• MultiBitSel() : gem5::bloom_filter::MultiBitSel
• multicast() : gem5::networking::EthAddr
• MultiCompData() : gem5::compression::Multi::MultiCompData
• multiInsert() : gem5::ArmISA::TLB
• MultiLevelPageTable() : gem5::MultiLevelPageTable< EntryTypes >
• multiLookup() : gem5::ArmISA::TLB
• MultiperspectivePerceptron() : gem5::branch_prediction::MultiperspectivePerceptron
• MultiperspectivePerceptron64KB() : gem5::branch_prediction::MultiperspectivePerceptron64KB
• MultiperspectivePerceptron8KB() : gem5::branch_prediction::MultiperspectivePerceptron8KB
• MultiperspectivePerceptronTAGE() : gem5::branch_prediction::MultiperspectivePerceptronTAGE
• MultiperspectivePerceptronTAGE64KB() : gem5::branch_prediction::MultiperspectivePerceptronTAGE64KB
• MultiperspectivePerceptronTAGE8KB() : gem5::branch_prediction::MultiperspectivePerceptronTAGE8KB
• multiply() : gem5::PowerISA::IntArithOp
• multiply_by_ten() : sc_dt::scfx_rep
• multiplyAdd() : gem5::PowerISA::IntArithOp
• MultiSocketSimpleSwitchAT() : MultiSocketSimpleSwitchAT
• MultiStats() : gem5::compression::Multi::MultiStats
• mustCheckAbove() : gem5::Packet
• mutex() : gem5::ArmISA::ISA::MiscRegLUTEntryInitializer
• MuxingKvmGic() : gem5::MuxingKvmGic
• mwait() : gem5::CheckerCPU , gem5::ExecContext , gem5::minor::ExecContext , gem5::o3::DynInst , gem5::SimpleExecContext
• mwaitAtomic() : gem5::CheckerCPU , gem5::ExecContext , gem5::minor::ExecContext , gem5::o3::DynInst , gem5::SimpleExecContext
• my_extension() : my_extension
• myBTransport() : ExplicitLTTarget , SimpleLTTarget2
• myGetDMIPtr() : SimpleLTTarget2 , SimpleLTTarget_ext
• myNBTransport() : ExplicitATTarget , SimpleATInitiator1 , SimpleATInitiator2 , SimpleATTarget1 , SimpleATTarget2 , SimpleLTInitiator_ext , SimpleLTTarget2 , SimpleLTTarget_ext
• MyTransaction() : SimpleATInitiator1::MyTransaction< DT > , SimpleATInitiator2::MyTransaction< DT >