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pseudo_inst.cc
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42 
43 #include "sim/pseudo_inst.hh"
44 
45 #include <fcntl.h>
46 #include <unistd.h>
47 
48 #include <array>
49 #include <cerrno>
50 #include <fstream>
51 #include <string>
52 #include <vector>
53 
54 #include "base/debug.hh"
55 #include "base/output.hh"
56 #include "cpu/base.hh"
57 #include "cpu/thread_context.hh"
58 #include "debug/Loader.hh"
59 #include "debug/Quiesce.hh"
60 #include "debug/WorkItems.hh"
61 #include "dev/net/dist_iface.hh"
64 #include "params/BaseCPU.hh"
65 #include "sim/full_system.hh"
66 #include "sim/process.hh"
67 #include "sim/serialize.hh"
68 #include "sim/sim_events.hh"
69 #include "sim/sim_exit.hh"
70 #include "sim/stat_control.hh"
71 #include "sim/stats.hh"
72 #include "sim/system.hh"
73 
74 namespace gem5
75 {
76 
77 using namespace statistics;
78 
79 GEM5_DEPRECATED_NAMESPACE(PseudoInst, pseudo_inst);
80 namespace pseudo_inst
81 {
82 
89 namespace
90 {
91 
95 const std::string DEFAULT = "";
99 const std::string DIST_RANK = "dist-rank";
103 const std::string DIST_SIZE = "dist-size";
104 
105 } // anonymous namespace
106 
107 void
109 {
110  DPRINTF(PseudoInst, "pseudo_inst::arm()\n");
111 
112  auto *workload = tc->getSystemPtr()->workload;
113  if (workload)
114  workload->recordArm();
115 }
116 
117 void
119 {
120  DPRINTF(PseudoInst, "pseudo_inst::quiesce()\n");
121  tc->quiesce();
122 }
123 
124 void
126 {
127  DPRINTF(PseudoInst, "pseudo_inst::quiesceSkip()\n");
128  tc->quiesceTick(tc->getCpuPtr()->nextCycle() + 1);
129 }
130 
131 void
132 quiesceNs(ThreadContext *tc, uint64_t ns)
133 {
134  DPRINTF(PseudoInst, "pseudo_inst::quiesceNs(%i)\n", ns);
136 }
137 
138 void
139 quiesceCycles(ThreadContext *tc, uint64_t cycles)
140 {
141  DPRINTF(PseudoInst, "pseudo_inst::quiesceCycles(%i)\n", cycles);
142  tc->quiesceTick(tc->getCpuPtr()->clockEdge(Cycles(cycles)));
143 }
144 
145 uint64_t
147 {
148  DPRINTF(PseudoInst, "pseudo_inst::quiesceTime()\n");
149 
150  return (tc->readLastActivate() - tc->readLastSuspend()) /
152 }
153 
154 uint64_t
156 {
157  DPRINTF(PseudoInst, "pseudo_inst::rpns()\n");
158  return curTick() / sim_clock::as_int::ns;
159 }
160 
161 void
163 {
164  DPRINTF(PseudoInst, "pseudo_inst::wakeCPU(%i)\n", cpuid);
165  System *sys = tc->getSystemPtr();
166 
167  if (sys->threads.size() <= cpuid) {
168  warn("pseudo_inst::wakeCPU(%i), cpuid greater than number of contexts"
169  "(%i)\n", cpuid, sys->threads.size());
170  return;
171  }
172 
173  ThreadContext *other_tc = sys->threads[cpuid];
174  if (other_tc->status() == ThreadContext::Suspended)
175  other_tc->activate();
176 }
177 
178 void
180 {
181  DPRINTF(PseudoInst, "pseudo_inst::m5exit(%i)\n", delay);
182  if (DistIface::readyToExit(delay)) {
183  Tick when = curTick() + delay * sim_clock::as_int::ns;
184  exitSimLoop("m5_exit instruction encountered", 0, when, 0, true);
185  }
186 }
187 
188 // m5sum is for sanity checking the gem5 op interface.
189 uint64_t
190 m5sum(ThreadContext *tc, uint64_t a, uint64_t b, uint64_t c,
191  uint64_t d, uint64_t e, uint64_t f)
192 {
193  DPRINTF(PseudoInst, "pseudo_inst::m5sum(%#x, %#x, %#x, %#x, %#x, %#x)\n",
194  a, b, c, d, e, f);
195  return a + b + c + d + e + f;
196 }
197 
198 void
199 m5fail(ThreadContext *tc, Tick delay, uint64_t code)
200 {
201  DPRINTF(PseudoInst, "pseudo_inst::m5fail(%i, %i)\n", delay, code);
202  Tick when = curTick() + delay * sim_clock::as_int::ns;
203  exitSimLoop("m5_fail instruction encountered", code, when, 0, true);
204 }
205 
206 void
208 {
209  DPRINTF(PseudoInst, "pseudo_inst::loadsymbol()\n");
210 
211  const std::string &filename = tc->getCpuPtr()->system->params().symbolfile;
212  if (filename.empty()) {
213  return;
214  }
215 
216  std::string buffer;
217  std::ifstream file(filename.c_str());
218 
219  if (!file)
220  fatal("file error: Can't open symbol table file %s\n", filename);
221 
222  while (!file.eof()) {
223  getline(file, buffer);
224 
225  if (buffer.empty())
226  continue;
227 
228  std::string::size_type idx = buffer.find(' ');
229  if (idx == std::string::npos)
230  continue;
231 
232  std::string address = "0x" + buffer.substr(0, idx);
233  eat_white(address);
234  if (address.empty())
235  continue;
236 
237  // Skip over letter and space
238  std::string symbol = buffer.substr(idx + 3);
239  eat_white(symbol);
240  if (symbol.empty())
241  continue;
242 
243  Addr addr;
244  if (!to_number(address, addr))
245  continue;
246 
247  if (!tc->getSystemPtr()->workload->insertSymbol(
248  { loader::Symbol::Binding::Global, symbol, addr })) {
249  continue;
250  }
251 
252 
253  DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
254  }
255  file.close();
256 }
257 
258 void
260 {
261  DPRINTF(PseudoInst, "pseudo_inst::addsymbol(0x%x, 0x%x)\n",
262  addr, symbolAddr);
263 
264  std::string symbol;
266  readString(symbol, symbolAddr);
267 
268  DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
269 
274 }
275 
276 uint64_t
277 initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
278 {
279  DPRINTF(PseudoInst, "pseudo_inst::initParam() key:%s%s\n",
280  (char *)&key_str1, (char *)&key_str2);
281 
282  // The key parameter string is passed in via two 64-bit registers. We copy
283  // out the characters from the 64-bit integer variables here, and
284  // concatenate them in the key character buffer
285  const int len = 2 * sizeof(uint64_t) + 1;
286  char key[len];
287  std::memset(key, '\0', len);
288 
289  std::array<uint64_t, 2> key_regs = {{ key_str1, key_str2 }};
290  key_regs = letoh(key_regs);
291  std::memcpy(key, key_regs.data(), sizeof(key_regs));
292 
293  // Check key parameter to figure out what to return.
294  const std::string key_str(key);
295  if (key == DEFAULT)
296  return tc->getCpuPtr()->system->init_param;
297  else if (key == DIST_RANK)
298  return DistIface::rankParam();
299  else if (key == DIST_SIZE)
300  return DistIface::sizeParam();
301  else
302  panic("Unknown key for initparam pseudo instruction:\"%s\"", key_str);
303 }
304 
305 
306 void
307 resetstats(ThreadContext *tc, Tick delay, Tick period)
308 {
309  DPRINTF(PseudoInst, "pseudo_inst::resetstats(%i, %i)\n", delay, period);
310  if (!tc->getCpuPtr()->params().do_statistics_insts)
311  return;
312 
313 
314  Tick when = curTick() + delay * sim_clock::as_int::ns;
315  Tick repeat = period * sim_clock::as_int::ns;
316 
317  statistics::schedStatEvent(false, true, when, repeat);
318 }
319 
320 void
321 dumpstats(ThreadContext *tc, Tick delay, Tick period)
322 {
323  DPRINTF(PseudoInst, "pseudo_inst::dumpstats(%i, %i)\n", delay, period);
324  if (!tc->getCpuPtr()->params().do_statistics_insts)
325  return;
326 
327 
328  Tick when = curTick() + delay * sim_clock::as_int::ns;
329  Tick repeat = period * sim_clock::as_int::ns;
330 
331  statistics::schedStatEvent(true, false, when, repeat);
332 }
333 
334 void
336 {
337  DPRINTF(PseudoInst, "pseudo_inst::dumpresetstats(%i, %i)\n", delay,
338  period);
339  if (!tc->getCpuPtr()->params().do_statistics_insts)
340  return;
341 
342 
343  Tick when = curTick() + delay * sim_clock::as_int::ns;
344  Tick repeat = period * sim_clock::as_int::ns;
345 
346  statistics::schedStatEvent(true, true, when, repeat);
347 }
348 
349 void
350 m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
351 {
352  DPRINTF(PseudoInst, "pseudo_inst::m5checkpoint(%i, %i)\n", delay, period);
353  if (!tc->getCpuPtr()->params().do_checkpoint_insts)
354  return;
355 
356  if (DistIface::readyToCkpt(delay, period)) {
357  Tick when = curTick() + delay * sim_clock::as_int::ns;
358  Tick repeat = period * sim_clock::as_int::ns;
359  exitSimLoop("checkpoint", 0, when, repeat);
360  }
361 }
362 
363 uint64_t
364 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
365 {
366  DPRINTF(PseudoInst, "pseudo_inst::readfile(0x%x, 0x%x, 0x%x)\n",
367  vaddr, len, offset);
368 
369  const std::string &file = tc->getSystemPtr()->params().readfile;
370  if (file.empty()) {
371  return 0;
372  }
373 
374  uint64_t result = 0;
375 
376  int fd = ::open(file.c_str(), O_RDONLY, 0);
377  if (fd < 0)
378  panic("could not open file %s\n", file);
379 
380  if (::lseek(fd, offset, SEEK_SET) < 0)
381  panic("could not seek: %s", strerror(errno));
382 
383  char *buf = new char[len];
384  char *p = buf;
385  while (len > 0) {
386  int bytes = ::read(fd, p, len);
387  if (bytes <= 0)
388  break;
389 
390  p += bytes;
391  result += bytes;
392  len -= bytes;
393  }
394 
395  close(fd);
397  writeBlob(vaddr, buf, result);
398  delete [] buf;
399  return result;
400 }
401 
402 uint64_t
403 writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset,
404  Addr filename_addr)
405 {
406  DPRINTF(PseudoInst, "pseudo_inst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n",
407  vaddr, len, offset, filename_addr);
408 
409  // copy out target filename
410  std::string filename;
412  readString(filename, filename_addr);
413 
414  OutputStream *out;
415  if (offset == 0) {
416  // create a new file (truncate)
417  out = simout.create(filename, true, true);
418  } else {
419  // do not truncate file if offset is non-zero
420  // (ios::in flag is required as well to keep the existing data
421  // intact, otherwise existing data will be zeroed out.)
422  out = simout.open(filename,
423  std::ios::in | std::ios::out | std::ios::binary, true);
424  }
425 
426  std::ostream *os(out->stream());
427  if (!os)
428  panic("could not open file %s\n", filename);
429 
430  if (offset != 0) {
431  // seek to offset
432  os->seekp(offset);
433  }
434 
435  // copy out data and write to file
436  char *buf = new char[len];
438  readBlob(vaddr, buf, len);
439  os->write(buf, len);
440  if (os->fail() || os->bad())
441  panic("Error while doing writefile!\n");
442 
443  simout.close(out);
444 
445  delete [] buf;
446 
447  return len;
448 }
449 
450 void
452 {
453  DPRINTF(PseudoInst, "pseudo_inst::debugbreak()\n");
455 }
456 
457 void
459 {
460  DPRINTF(PseudoInst, "pseudo_inst::switchcpu()\n");
461  exitSimLoop("switchcpu");
462 }
463 
464 void
466 {
467  DPRINTF(PseudoInst, "pseudo_inst::togglesync()\n");
469 }
470 
471 void
473 {
474  DPRINTF(PseudoInst, "pseudo_inst::triggerWorkloadEvent()\n");
475  tc->getSystemPtr()->workload->event(tc);
476 }
477 
478 //
479 // This function is executed when annotated work items begin. Depending on
480 // what the user specified at the command line, the simulation may exit and/or
481 // take a checkpoint when a certain work item begins.
482 //
483 void
484 workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
485 {
486  DPRINTF(PseudoInst, "pseudo_inst::workbegin(%i, %i)\n", workid, threadid);
487  System *sys = tc->getSystemPtr();
488  const System::Params &params = sys->params();
489 
490  if (params.exit_on_work_items) {
491  exitSimLoop("workbegin", static_cast<int>(workid));
492  return;
493  }
494 
495  DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
496  threadid);
497  tc->getCpuPtr()->workItemBegin();
498  sys->workItemBegin(threadid, workid);
499 
500  //
501  // If specified, determine if this is the specific work item the user
502  // identified
503  //
504  if (params.work_item_id == -1 || params.work_item_id == workid) {
505 
506  uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
507  int cpuId = tc->getCpuPtr()->cpuId();
508 
509  if (params.work_cpus_ckpt_count != 0 &&
510  sys->markWorkItem(cpuId) >= params.work_cpus_ckpt_count) {
511  //
512  // If active cpus equals checkpoint count, create checkpoint
513  //
514  exitSimLoop("checkpoint");
515  }
516 
517  if (systemWorkBeginCount == params.work_begin_ckpt_count) {
518  //
519  // Note: the string specified as the cause of the exit event must
520  // exactly equal "checkpoint" inorder to create a checkpoint
521  //
522  exitSimLoop("checkpoint");
523  }
524 
525  if (systemWorkBeginCount == params.work_begin_exit_count) {
526  //
527  // If a certain number of work items started, exit simulation
528  //
529  exitSimLoop("work started count reach");
530  }
531 
532  if (cpuId == params.work_begin_cpu_id_exit) {
533  //
534  // If work started on the cpu id specified, exit simulation
535  //
536  exitSimLoop("work started on specific cpu");
537  }
538  }
539 }
540 
541 //
542 // This function is executed when annotated work items end. Depending on
543 // what the user specified at the command line, the simulation may exit and/or
544 // take a checkpoint when a certain work item ends.
545 //
546 void
547 workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
548 {
549  DPRINTF(PseudoInst, "pseudo_inst::workend(%i, %i)\n", workid, threadid);
550  System *sys = tc->getSystemPtr();
551  const System::Params &params = sys->params();
552 
553  if (params.exit_on_work_items) {
554  exitSimLoop("workend", static_cast<int>(workid));
555  return;
556  }
557 
558  DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
559  tc->getCpuPtr()->workItemEnd();
560  sys->workItemEnd(threadid, workid);
561 
562  //
563  // If specified, determine if this is the specific work item the user
564  // identified
565  //
566  if (params.work_item_id == -1 || params.work_item_id == workid) {
567 
568  uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
569  int cpuId = tc->getCpuPtr()->cpuId();
570 
571  if (params.work_cpus_ckpt_count != 0 &&
572  sys->markWorkItem(cpuId) >= params.work_cpus_ckpt_count) {
573  //
574  // If active cpus equals checkpoint count, create checkpoint
575  //
576  exitSimLoop("checkpoint");
577  }
578 
579  if (params.work_end_ckpt_count != 0 &&
580  systemWorkEndCount == params.work_end_ckpt_count) {
581  //
582  // If total work items completed equals checkpoint count, create
583  // checkpoint
584  //
585  exitSimLoop("checkpoint");
586  }
587 
588  if (params.work_end_exit_count != 0 &&
589  systemWorkEndCount == params.work_end_exit_count) {
590  //
591  // If total work items completed equals exit count, exit simulation
592  //
593  exitSimLoop("work items exit count reached");
594  }
595  }
596 }
597 
598 } // namespace pseudo_inst
599 } // namespace gem5
gem5::curTick
Tick curTick()
The universal simulation clock.
Definition: cur_tick.hh:46
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:190
gem5::DistIface::readyToExit
static bool readyToExit(Tick delay)
Initiate the exit from the simulation.
Definition: dist_iface.cc:895
gem5::statistics::GEM5_DEPRECATED_NAMESPACE
GEM5_DEPRECATED_NAMESPACE(Units, units)
Units for Stats.
gem5::SETranslatingPortProxy
Definition: se_translating_port_proxy.hh:49
gem5::ThreadContext::getSystemPtr
virtual System * getSystemPtr()=0
gem5::ThreadContext::readLastSuspend
virtual Tick readLastSuspend()=0
gem5::ArmISA::len
Bitfield< 18, 16 > len
Definition: misc_types.hh:445
warn
#define warn(...)
Definition: logging.hh:246
gem5::System::Threads::size
int size() const
Definition: system.hh:214
gem5::System::workItemEnd
void workItemEnd(uint32_t tid, uint32_t workid)
Definition: system.cc:435
gem5::pseudo_inst::workend
void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
Definition: pseudo_inst.cc:547
system.hh
gem5::pseudo_inst::quiesceNs
void quiesceNs(ThreadContext *tc, uint64_t ns)
Definition: pseudo_inst.cc:132
gem5::loader::Symbol::Binding::Global
@ Global
gem5::MipsISA::cpuid
Bitfield< 28, 21 > cpuid
Definition: dt_constants.hh:95
serialize.hh
gem5::ArmISA::fd
Bitfield< 14, 12 > fd
Definition: types.hh:150
gem5::pseudo_inst::quiesceTime
uint64_t quiesceTime(ThreadContext *tc)
Definition: pseudo_inst.cc:146
gem5::pseudo_inst::debugbreak
void debugbreak(ThreadContext *tc)
Definition: pseudo_inst.cc:451
sim_events.hh
pseudo_inst.hh
gem5::pseudo_inst::switchcpu
void switchcpu(ThreadContext *tc)
Definition: pseudo_inst.cc:458
gem5::ArmISA::f
Bitfield< 6 > f
Definition: misc_types.hh:68
translating_port_proxy.hh
gem5::System::incWorkItemsEnd
uint64_t incWorkItemsEnd()
Called by pseudo_inst to track the number of work items completed by this system.
Definition: system.hh:528
gem5::ArmISA::e
Bitfield< 9 > e
Definition: misc_types.hh:65
gem5::simout
OutputDirectory simout
Definition: output.cc:62
gem5::ArmISA::a
Bitfield< 8 > a
Definition: misc_types.hh:66
gem5::debug::breakpoint
void breakpoint()
Definition: debug.cc:65
gem5::ArmISA::ns
Bitfield< 0 > ns
Definition: misc_types.hh:332
gem5::System::workload
Workload * workload
OS kernel.
Definition: system.hh:330
gem5::eat_white
void eat_white(std::string &s)
Definition: str.hh:67
gem5::to_number
bool to_number(const std::string &value, Pixel &retval)
Definition: pixel.hh:217
gem5::ThreadContext::activate
virtual void activate()=0
Set the status to Active.
gem5::OutputDirectory::create
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
Definition: output.cc:210
gem5::pseudo_inst::quiesce
void quiesce(ThreadContext *tc)
Definition: pseudo_inst.cc:118
sim_exit.hh
output.hh
gem5::exitSimLoop
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
Definition: sim_events.cc:88
gem5::letoh
T letoh(T value)
Definition: byteswap.hh:173
gem5::ThreadContext::status
virtual Status status() const =0
gem5::TranslatingPortProxy
This proxy attempts to translate virtual addresses using the TLBs.
Definition: translating_port_proxy.hh:60
gem5::Cycles
Cycles is a wrapper class for representing cycle counts, i.e.
Definition: types.hh:78
gem5::pseudo_inst::rpns
uint64_t rpns(ThreadContext *tc)
Definition: pseudo_inst.cc:155
gem5::SimObject::Params
SimObjectParams Params
Definition: sim_object.hh:170
stats.hh
gem5::pseudo_inst::triggerWorkloadEvent
void triggerWorkloadEvent(ThreadContext *tc)
Definition: pseudo_inst.cc:472
gem5::OutputStream::stream
std::ostream * stream() const
Get the output underlying output stream.
Definition: output.hh:62
gem5::OutputDirectory::close
void close(OutputStream *file)
Closes an output file and free the corresponding OutputFile.
Definition: output.cc:147
gem5::System::incWorkItemsBegin
uint64_t incWorkItemsBegin()
Called by pseudo_inst to track the number of work items started by this system.
Definition: system.hh:518
gem5::pseudo_inst::loadsymbol
void loadsymbol(ThreadContext *tc)
Definition: pseudo_inst.cc:207
gem5::ThreadContext::quiesceTick
void quiesceTick(Tick resume)
Quiesce, suspend, and schedule activate at resume.
Definition: thread_context.cc:151
gem5::System
Definition: system.hh:75
gem5::pseudo_inst::writefile
uint64_t writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset, Addr filename_addr)
Definition: pseudo_inst.cc:403
gem5::ArmISA::b
Bitfield< 7 > b
Definition: misc_types.hh:382
gem5::pseudo_inst::wakeCPU
void wakeCPU(ThreadContext *tc, uint64_t cpuid)
Definition: pseudo_inst.cc:162
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:94
gem5::ThreadContext::quiesce
void quiesce()
Quiesce thread context.
Definition: thread_context.cc:144
gem5::Workload::event
virtual void event(ThreadContext *tc)
Definition: workload.hh:115
gem5::SimObject::params
const Params & params() const
Definition: sim_object.hh:176
gem5::ThreadContext::Suspended
@ Suspended
Temporarily inactive.
Definition: thread_context.hh:113
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::ArmISA::d
Bitfield< 9 > d
Definition: misc_types.hh:64
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::pseudo_inst::m5checkpoint
void m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
Definition: pseudo_inst.cc:350
gem5::ThreadContext::readLastActivate
virtual Tick readLastActivate()=0
process.hh
dist_iface.hh
gem5::OutputDirectory::open
OutputStream * open(const std::string &name, std::ios_base::openmode mode, bool recreateable=true, bool no_gz=false)
Open a file in this directory (optionally compressed).
Definition: output.cc:224
debug.hh
gem5::pseudo_inst::readfile
uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
Definition: pseudo_inst.cc:364
gem5::ArmISA::offset
Bitfield< 23, 0 > offset
Definition: types.hh:144
gem5::Workload::recordArm
void recordArm()
Definition: workload.hh:90
gem5::ArmISA::c
Bitfield< 29 > c
Definition: misc_types.hh:53
gem5::pseudo_inst::m5fail
void m5fail(ThreadContext *tc, Tick delay, uint64_t code)
Definition: pseudo_inst.cc:199
gem5::statistics::size_type
unsigned int size_type
Definition: types.hh:60
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::pseudo_inst::quiesceSkip
void quiesceSkip(ThreadContext *tc)
Definition: pseudo_inst.cc:125
full_system.hh
gem5::pseudo_inst::resetstats
void resetstats(ThreadContext *tc, Tick delay, Tick period)
Definition: pseudo_inst.cc:307
gem5::pseudo_inst::arm
void arm(ThreadContext *tc)
Definition: pseudo_inst.cc:108
gem5::pseudo_inst::dumpresetstats
void dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
Definition: pseudo_inst.cc:335
gem5::FullSystem
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition: root.cc:220
stat_control.hh
gem5::pseudo_inst::workbegin
void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
Definition: pseudo_inst.cc:484
gem5::loader::SymbolTable::insert
bool insert(const Symbol &symbol)
Insert a new symbol in the table if it does not already exist.
Definition: symtab.cc:55
gem5::DistIface::sizeParam
static uint64_t sizeParam()
Getter for the dist size param.
Definition: dist_iface.cc:933
gem5::pseudo_inst::addsymbol
void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
Definition: pseudo_inst.cc:259
base.hh
gem5::System::threads
Threads threads
Definition: system.hh:314
gem5::X86ISA::os
Bitfield< 17 > os
Definition: misc.hh:809
gem5::pseudo_inst::quiesceCycles
void quiesceCycles(ThreadContext *tc, uint64_t cycles)
Definition: pseudo_inst.cc:139
gem5::pseudo_inst::m5exit
void m5exit(ThreadContext *tc, Tick delay)
Definition: pseudo_inst.cc:179
gem5::DistIface::readyToCkpt
static bool readyToCkpt(Tick delay, Tick period)
Initiate taking a checkpoint.
Definition: dist_iface.cc:823
gem5::System::markWorkItem
int markWorkItem(int index)
Called by pseudo_inst to mark the cpus actively executing work items.
Definition: system.hh:539
gem5::pseudo_inst::m5sum
uint64_t m5sum(ThreadContext *tc, uint64_t a, uint64_t b, uint64_t c, uint64_t d, uint64_t e, uint64_t f)
Definition: pseudo_inst.cc:190
gem5::ThreadContext::getCpuPtr
virtual BaseCPU * getCpuPtr()=0
gem5::DistIface::toggleSync
static void toggleSync(ThreadContext *tc)
Trigger the primary to start/stop synchronization.
Definition: dist_iface.cc:854
se_translating_port_proxy.hh
gem5::pseudo_inst::togglesync
void togglesync(ThreadContext *tc)
Definition: pseudo_inst.cc:465
gem5::MipsISA::vaddr
vaddr
Definition: pra_constants.hh:278
gem5::loader::debugSymbolTable
SymbolTable debugSymbolTable
Global unified debugging symbol table (for target).
Definition: symtab.cc:44
gem5::DistIface::rankParam
static uint64_t rankParam()
Getter for the dist rank param.
Definition: dist_iface.cc:920
gem5::System::workItemBegin
void workItemBegin(uint32_t tid, uint32_t workid)
Definition: system.hh:546
gem5::pseudo_inst::initParam
uint64_t initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
Definition: pseudo_inst.cc:277
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::pseudo_inst::dumpstats
void dumpstats(ThreadContext *tc, Tick delay, Tick period)
Definition: pseudo_inst.cc:321
gem5::OutputStream
Definition: output.hh:56
gem5::Workload::insertSymbol
virtual bool insertSymbol(const loader::Symbol &symbol)=0
thread_context.hh
gem5::statistics::schedStatEvent
void schedStatEvent(bool dump, bool reset, Tick when, Tick repeat)
Schedule statistics dumping.
Definition: stat_control.cc:107
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
gem5::sim_clock::as_int::ns
Tick ns
nanosecond
Definition: core.cc:71

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