gem5
v22.0.0.0
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System DMA Engine class for AMD dGPU. More...
#include <sdma_engine.hh>
Classes | |
class | SDMAQueue |
Public Member Functions | |
SDMAEngine (const SDMAEngineParams &p) | |
void | setGPUDevice (AMDGPUDevice *gpu_device) |
void | setId (int _id) |
int | getIHClientId () |
Returns the client id for the Interrupt Handler. More... | |
Addr | getGARTAddr (Addr addr) const |
Methods for translation. More... | |
TranslationGenPtr | translate (Addr vaddr, Addr size) override |
GPUController will perform DMA operations on VAs, and because page faults are not currently supported for GPUController, we must be able to find the pages mapped for the process. More... | |
Tick | write (PacketPtr pkt) override |
Inherited methods. More... | |
Tick | read (PacketPtr pkt) override |
Pure virtual function that the device must implement. More... | |
AddrRangeList | getAddrRanges () const override |
Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to. More... | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
void | processGfx (Addr wptrOffset) |
Given a new write ptr offset, communicated to the GPU through a doorbell write, the SDMA engine processes the page, gfx, rlc0, or rlc1 queue. More... | |
void | processPage (Addr wptrOffset) |
void | processRLC (Addr doorbellOffset, Addr wptrOffset) |
void | decodeNext (SDMAQueue *q) |
This method checks read and write pointers and starts decoding packets if the read pointer is less than the write pointer. More... | |
void | decodeHeader (SDMAQueue *q, uint32_t data) |
Reads the first DW (32 bits) (i.e., header) of an SDMA packet, which encodes the opcode and sub-opcode of the packet. More... | |
void | write (SDMAQueue *q, sdmaWrite *pkt) |
Methods that implement processing of SDMA packets. More... | |
void | writeReadData (SDMAQueue *q, sdmaWrite *pkt, uint32_t *dmaBuffer) |
void | writeDone (SDMAQueue *q, sdmaWrite *pkt, uint32_t *dmaBuffer) |
void | copy (SDMAQueue *q, sdmaCopy *pkt) |
void | copyReadData (SDMAQueue *q, sdmaCopy *pkt, uint8_t *dmaBuffer) |
void | copyDone (SDMAQueue *q, sdmaCopy *pkt, uint8_t *dmaBuffer) |
void | indirectBuffer (SDMAQueue *q, sdmaIndirectBuffer *pkt) |
void | fence (SDMAQueue *q, sdmaFence *pkt) |
void | fenceDone (SDMAQueue *q, sdmaFence *pkt) |
void | trap (SDMAQueue *q, sdmaTrap *pkt) |
void | srbmWrite (SDMAQueue *q, sdmaSRBMWriteHeader *header, sdmaSRBMWrite *pkt) |
void | pollRegMem (SDMAQueue *q, sdmaPollRegMemHeader *header, sdmaPollRegMem *pkt) |
Implements a poll reg/mem packet that polls an SRBM register or a memory location, compares the retrieved value with a reference value and if unsuccessfull it retries indefinitely or for a limited number of times. More... | |
void | pollRegMemRead (SDMAQueue *q, sdmaPollRegMemHeader *header, sdmaPollRegMem *pkt, uint32_t dma_buffer, int count) |
bool | pollRegMemFunc (uint32_t value, uint32_t reference, uint32_t func) |
void | ptePde (SDMAQueue *q, sdmaPtePde *pkt) |
void | ptePdeDone (SDMAQueue *q, sdmaPtePde *pkt, uint64_t *dmaBuffer) |
uint64_t | getGfxBase () |
Methods for getting the values of SDMA MMIO registers. More... | |
uint64_t | getGfxRptr () |
uint64_t | getGfxDoorbell () |
uint64_t | getGfxDoorbellOffset () |
uint64_t | getGfxWptr () |
uint64_t | getPageBase () |
uint64_t | getPageRptr () |
uint64_t | getPageDoorbell () |
uint64_t | getPageDoorbellOffset () |
uint64_t | getPageWptr () |
void | writeMMIO (PacketPtr pkt, Addr mmio_offset) |
Methods for setting the values of SDMA MMIO registers. More... | |
void | setGfxBaseLo (uint32_t data) |
void | setGfxBaseHi (uint32_t data) |
void | setGfxRptrLo (uint32_t data) |
void | setGfxRptrHi (uint32_t data) |
void | setGfxDoorbellLo (uint32_t data) |
void | setGfxDoorbellHi (uint32_t data) |
void | setGfxDoorbellOffsetLo (uint32_t data) |
void | setGfxDoorbellOffsetHi (uint32_t data) |
void | setGfxSize (uint64_t data) |
void | setGfxWptrLo (uint32_t data) |
void | setGfxWptrHi (uint32_t data) |
void | setPageBaseLo (uint32_t data) |
void | setPageBaseHi (uint32_t data) |
void | setPageRptrLo (uint32_t data) |
void | setPageRptrHi (uint32_t data) |
void | setPageDoorbellLo (uint32_t data) |
void | setPageDoorbellHi (uint32_t data) |
void | setPageDoorbellOffsetLo (uint32_t data) |
void | setPageDoorbellOffsetHi (uint32_t data) |
void | setPageSize (uint64_t data) |
void | setPageWptrLo (uint32_t data) |
void | setPageWptrHi (uint32_t data) |
void | registerRLCQueue (Addr doorbell, Addr rb_base) |
Methods for RLC queues. More... | |
void | unregisterRLCQueue (Addr doorbell) |
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DmaVirtDevice (const Params &p) | |
virtual | ~DmaVirtDevice () |
void | dmaReadVirt (Addr host_addr, unsigned size, DmaCallback *cb, void *data, Tick delay=0) |
Initiate a DMA read from virtual address host_addr. More... | |
void | dmaWriteVirt (Addr host_addr, unsigned size, DmaCallback *b, void *data, Tick delay=0) |
Initiate a DMA write from virtual address host_addr. More... | |
void | dmaVirt (DmaFnPtr dmaFn, Addr host_addr, unsigned size, DmaCallback *cb, void *data, Tick delay=0) |
Initiate a call to DmaDevice using DmaFnPtr do a DMA starting from virtual address host_addr for size number of bytes on the data. More... | |
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DmaDevice (const Params &p) | |
virtual | ~DmaDevice ()=default |
void | dmaWrite (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0) |
void | dmaWrite (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0) |
void | dmaRead (Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0) |
void | dmaRead (Addr addr, int size, Event *event, uint8_t *data, Tick delay=0) |
bool | dmaPending () const |
void | init () override |
init() is called after all C++ SimObjects have been created and all ports are connected. More... | |
unsigned int | cacheBlockSize () const |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port with a given name and index. More... | |
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PioDevice (const Params &p) | |
virtual | ~PioDevice () |
void | init () override |
init() is called after all C++ SimObjects have been created and all ports are connected. More... | |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port with a given name and index. More... | |
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ClockedObject (const ClockedObjectParams &p) | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
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const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. More... | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. More... | |
virtual void | regProbePoints () |
Register probe points for this object. More... | |
virtual void | regProbeListeners () |
Register probe listeners for this object. More... | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. More... | |
virtual void | startup () |
startup() is the final initialization call before simulation. More... | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. More... | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. More... | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. More... | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
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EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More... | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. More... | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
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Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. More... | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. More... | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
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DrainState | drainState () const |
Return the current drain state of an object. More... | |
virtual void | notifyFork () |
Notify a child process of a fork. More... | |
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Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. More... | |
virtual | ~Group () |
virtual void | regStats () |
Callback to set stat parameters. More... | |
virtual void | resetStats () |
Callback to reset stats. More... | |
virtual void | preDumpStats () |
Callback before stats are dumped. More... | |
void | addStat (statistics::Info *info) |
Register a stat with this group. More... | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. More... | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. More... | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. More... | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. More... | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. More... | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
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Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
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void | updateClockPeriod () |
Update the tick to the current tick. More... | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More... | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. More... | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More... | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Public Attributes | |
int | cur_vmid = 0 |
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PowerState * | powerState |
Private Types | |
enum | SDMAType { SDMAGfx, SDMAPage } |
Private Member Functions | |
void | processRLC0 (Addr wptrOffset) |
void | processRLC1 (Addr wptrOffset) |
Private Attributes | |
int | id |
SDMAQueue | gfx |
Each SDMAEngine processes four queues: paging, gfx, rlc0, and rlc1, where RLC stands for Run List Controller. More... | |
SDMAQueue | page |
SDMAQueue | gfxIb |
SDMAQueue | pageIb |
SDMAQueue | rlc0 |
SDMAQueue | rlc0Ib |
SDMAQueue | rlc1 |
SDMAQueue | rlc1Ib |
uint64_t | gfxBase |
uint64_t | gfxRptr |
uint64_t | gfxDoorbell |
uint64_t | gfxDoorbellOffset |
uint64_t | gfxWptr |
uint64_t | pageBase |
uint64_t | pageRptr |
uint64_t | pageDoorbell |
uint64_t | pageDoorbellOffset |
uint64_t | pageWptr |
AMDGPUDevice * | gpuDevice |
VegaISA::Walker * | walker |
std::unordered_map< Addr, int > | rlcMap |
Additional Inherited Members | |
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typedef void(DmaDevice::* | DmaFnPtr) (Addr, int, Event *, uint8_t *, Tick) |
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typedef DmaDeviceParams | Params |
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using | Params = PioDeviceParams |
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using | Params = ClockedObjectParams |
Parameters of ClockedObject. More... | |
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typedef SimObjectParams | Params |
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static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. More... | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. More... | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
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static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. More... | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. More... | |
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Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. More... | |
void | signalDrainDone () const |
Signal that an object is drained. More... | |
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Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. More... | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. More... | |
void | resetClock () const |
Reset the object's clock using the current global tick value. More... | |
virtual void | clockPeriodUpdated () |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More... | |
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DmaPort | dmaPort |
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System * | sys |
PioPort< PioDevice > | pioPort |
The pioPort that handles the requests for us and provides us requests that it sees. More... | |
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const SimObjectParams & | _params |
Cached copy of the object parameters. More... | |
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EventQueue * | eventq |
A pointer to this object's event queue. More... | |
System DMA Engine class for AMD dGPU.
Definition at line 48 of file sdma_engine.hh.
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Enumerator | |
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SDMAGfx | |
SDMAPage |
Definition at line 50 of file sdma_engine.hh.
gem5::SDMAEngine::SDMAEngine | ( | const SDMAEngineParams & | p | ) |
Definition at line 46 of file sdma_engine.cc.
References gfx, gfxIb, gem5::SDMAEngine::SDMAQueue::ib(), page, pageIb, gem5::SDMAEngine::SDMAQueue::parent(), rlc0, rlc0Ib, rlc1, rlc1Ib, and gem5::SDMAEngine::SDMAQueue::valid().
Definition at line 527 of file sdma_engine.cc.
References copyReadData(), gem5::GEM5_PACKED::count, gem5::GEM5_PACKED::dest, gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, getGARTAddr(), gem5::ArmISA::q, and gem5::GEM5_PACKED::source.
Referenced by decodeHeader().
Definition at line 587 of file sdma_engine.cc.
References gem5::GEM5_PACKED::count, decodeNext(), gem5::GEM5_PACKED::dest, DPRINTF, and gem5::ArmISA::q.
Referenced by copyReadData().
Definition at line 547 of file sdma_engine.cc.
References copyDone(), gem5::GEM5_PACKED::count, cur_vmid, decodeNext(), gem5::GEM5_PACKED::dest, gem5::DmaVirtDevice::dmaWriteVirt(), DPRINTF, gem5::AMDGPUDevice::getMemMgr(), gem5::AMDGPUVM::getMMHUBBase(), gem5::AMDGPUDevice::getVM(), gpuDevice, gem5::ArmISA::i, gem5::AMDGPUVM::inMMHUB(), gem5::ArmISA::q, translate(), and gem5::AMDGPUMemoryManager::writeRequest().
Referenced by copy().
void gem5::SDMAEngine::decodeHeader | ( | SDMAQueue * | q, |
uint32_t | data | ||
) |
Reads the first DW (32 bits) (i.e., header) of an SDMA packet, which encodes the opcode and sub-opcode of the packet.
It also creates an SDMA packet object and calls the associated processing function.
Definition at line 261 of file sdma_engine.cc.
References gem5::bits(), copy(), decodeNext(), gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, fence(), header, indirectBuffer(), gem5::ArmISA::opcode, panic, pollRegMem(), ptePde(), gem5::ArmISA::q, SDMA_OP_ATOMIC, SDMA_OP_COND_EXE, SDMA_OP_CONST_FILL, SDMA_OP_COPY, SDMA_OP_DUMMY_TRAP, SDMA_OP_FENCE, SDMA_OP_INDIRECT, SDMA_OP_NOP, SDMA_OP_POLL_REGMEM, SDMA_OP_PRE_EXE, SDMA_OP_PTEPDE, SDMA_OP_SEM, SDMA_OP_SRBM_WRITE, SDMA_OP_TIMESTAMP, SDMA_OP_TRAP, SDMA_OP_WRITE, SDMA_SUBOP_COPY_DIRTY_PAGE, SDMA_SUBOP_COPY_LINEAR, SDMA_SUBOP_COPY_LINEAR_PHY, SDMA_SUBOP_COPY_LINEAR_SUB_WIND, SDMA_SUBOP_COPY_SOA, SDMA_SUBOP_COPY_T2T_SUB_WIND, SDMA_SUBOP_COPY_TILED, SDMA_SUBOP_COPY_TILED_SUB_WIND, SDMA_SUBOP_POLL_DBIT_WRITE_MEM, SDMA_SUBOP_POLL_MEM_VERIFY, SDMA_SUBOP_POLL_REG_WRITE_MEM, SDMA_SUBOP_PTEPDE_COPY, SDMA_SUBOP_PTEPDE_COPY_BACKWARDS, SDMA_SUBOP_PTEPDE_GEN, SDMA_SUBOP_PTEPDE_RMW, SDMA_SUBOP_TIMESTAMP_GET, SDMA_SUBOP_TIMESTAMP_GET_GLOBAL, SDMA_SUBOP_TIMESTAMP_SET, SDMA_SUBOP_WRITE_LINEAR, SDMA_SUBOP_WRITE_TILED, srbmWrite(), trap(), warn, and write().
Referenced by decodeNext().
void gem5::SDMAEngine::decodeNext | ( | SDMAQueue * | q | ) |
This method checks read and write pointers and starts decoding packets if the read pointer is less than the write pointer.
It also marks a queue a being currently processing, in case the doorbell is rung again, the newly enqueued packets will be decoded once the currently processing once are finished. This is achieved by calling decodeNext once an entire SDMA packet has been processed.
Definition at line 236 of file sdma_engine.cc.
References cur_vmid, decodeHeader(), gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, header, and gem5::ArmISA::q.
Referenced by copyDone(), copyReadData(), decodeHeader(), fenceDone(), indirectBuffer(), pollRegMem(), pollRegMemRead(), processGfx(), processPage(), processRLC0(), processRLC1(), ptePde(), ptePdeDone(), srbmWrite(), trap(), writeDone(), and writeReadData().
Definition at line 613 of file sdma_engine.cc.
References gem5::GEM5_PACKED::data, gem5::GEM5_PACKED::dest, gem5::DmaVirtDevice::dmaWriteVirt(), fenceDone(), getGARTAddr(), and gem5::ArmISA::q.
Referenced by decodeHeader().
Definition at line 626 of file sdma_engine.cc.
References gem5::GEM5_PACKED::data, decodeNext(), gem5::GEM5_PACKED::dest, DPRINTF, and gem5::ArmISA::q.
Referenced by fence().
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Every PIO device is obliged to provide an implementation that returns the address ranges the device responds to.
Implements gem5::PioDevice.
Definition at line 827 of file sdma_engine.cc.
Methods for translation.
Definition at line 90 of file sdma_engine.cc.
References gem5::X86ISA::addr, gem5::bits(), gem5::AMDGPUDevice::getVM(), gpuDevice, and gem5::AMDGPUVM::inAGP().
Referenced by copy(), fence(), indirectBuffer(), and writeReadData().
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Methods for getting the values of SDMA MMIO registers.
Definition at line 218 of file sdma_engine.hh.
References gfxBase.
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inline |
Definition at line 221 of file sdma_engine.hh.
References gfxDoorbellOffset.
Referenced by writeMMIO().
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Definition at line 219 of file sdma_engine.hh.
References gfxRptr.
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inline |
Definition at line 222 of file sdma_engine.hh.
References gfxWptr.
int gem5::SDMAEngine::getIHClientId | ( | ) |
Returns the client id for the Interrupt Handler.
Definition at line 77 of file sdma_engine.cc.
References panic, gem5::SOC15_IH_CLIENTID_SDMA0, and gem5::SOC15_IH_CLIENTID_SDMA1.
Referenced by trap().
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Definition at line 223 of file sdma_engine.hh.
References pageBase.
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inline |
Definition at line 226 of file sdma_engine.hh.
References pageDoorbellOffset.
Referenced by writeMMIO().
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Definition at line 224 of file sdma_engine.hh.
References pageRptr.
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Definition at line 227 of file sdma_engine.hh.
References pageWptr.
void gem5::SDMAEngine::indirectBuffer | ( | SDMAQueue * | q, |
sdmaIndirectBuffer * | pkt | ||
) |
Definition at line 598 of file sdma_engine.cc.
References gem5::GEM5_PACKED::base, decodeNext(), getGARTAddr(), gem5::ArmISA::q, and gem5::GEM5_PACKED::size.
Referenced by decodeHeader().
void gem5::SDMAEngine::pollRegMem | ( | SDMAQueue * | q, |
sdmaPollRegMemHeader * | header, | ||
sdmaPollRegMem * | pkt | ||
) |
Implements a poll reg/mem packet that polls an SRBM register or a memory location, compares the retrieved value with a reference value and if unsuccessfull it retries indefinitely or for a limited number of times.
Definition at line 684 of file sdma_engine.cc.
References gem5::GEM5_PACKED::address, decodeNext(), gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, header, gem5::GEM5_PACKED::mask, panic, gem5::GEM5_PACKED::pollInt, pollRegMemRead(), gem5::ArmISA::q, gem5::GEM5_PACKED::ref, gem5::GEM5_PACKED::retryCount, and warn_once.
Referenced by decodeHeader().
bool gem5::SDMAEngine::pollRegMemFunc | ( | uint32_t | value, |
uint32_t | reference, | ||
uint32_t | func | ||
) |
void gem5::SDMAEngine::pollRegMemRead | ( | SDMAQueue * | q, |
sdmaPollRegMemHeader * | header, | ||
sdmaPollRegMem * | pkt, | ||
uint32_t | dma_buffer, | ||
int | count | ||
) |
Definition at line 722 of file sdma_engine.cc.
References gem5::GEM5_PACKED::address, gem5::X86ISA::count, decodeNext(), gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, header, pollRegMemFunc(), gem5::ArmISA::q, gem5::GEM5_PACKED::ref, and gem5::GEM5_PACKED::retryCount.
Referenced by pollRegMem().
void gem5::SDMAEngine::processGfx | ( | Addr | wptrOffset | ) |
Given a new write ptr offset, communicated to the GPU through a doorbell write, the SDMA engine processes the page, gfx, rlc0, or rlc1 queue.
Definition at line 170 of file sdma_engine.cc.
References decodeNext(), gfx, gem5::SDMAEngine::SDMAQueue::processing(), and gem5::SDMAEngine::SDMAQueue::setWptr().
Referenced by gem5::AMDGPUDevice::writeDoorbell().
void gem5::SDMAEngine::processPage | ( | Addr | wptrOffset | ) |
Definition at line 181 of file sdma_engine.cc.
References decodeNext(), page, gem5::SDMAEngine::SDMAQueue::processing(), and gem5::SDMAEngine::SDMAQueue::setWptr().
Referenced by gem5::AMDGPUDevice::writeDoorbell().
Definition at line 192 of file sdma_engine.cc.
References panic, processRLC0(), processRLC1(), and rlcMap.
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private |
Definition at line 208 of file sdma_engine.cc.
References cur_vmid, decodeNext(), gem5::SDMAEngine::SDMAQueue::processing(), rlc0, gem5::SDMAEngine::SDMAQueue::setWptr(), and gem5::SDMAEngine::SDMAQueue::valid().
Referenced by processRLC().
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private |
Definition at line 222 of file sdma_engine.cc.
References cur_vmid, decodeNext(), gem5::SDMAEngine::SDMAQueue::processing(), rlc1, gem5::SDMAEngine::SDMAQueue::setWptr(), and gem5::SDMAEngine::SDMAQueue::valid().
Referenced by processRLC().
void gem5::SDMAEngine::ptePde | ( | SDMAQueue * | q, |
sdmaPtePde * | pkt | ||
) |
Definition at line 784 of file sdma_engine.cc.
References gem5::GEM5_PACKED::count, decodeNext(), gem5::GEM5_PACKED::dest, gem5::DmaVirtDevice::dmaWriteVirt(), DPRINTF, gem5::AMDGPUDevice::getMemMgr(), gem5::AMDGPUVM::getMMHUBBase(), gem5::AMDGPUDevice::getVM(), gpuDevice, gem5::ArmISA::i, gem5::GEM5_PACKED::increment, gem5::GEM5_PACKED::initValue, gem5::AMDGPUVM::inMMHUB(), gem5::GEM5_PACKED::mask, ptePdeDone(), gem5::ArmISA::q, and gem5::AMDGPUMemoryManager::writeRequest().
Referenced by decodeHeader().
void gem5::SDMAEngine::ptePdeDone | ( | SDMAQueue * | q, |
sdmaPtePde * | pkt, | ||
uint64_t * | dmaBuffer | ||
) |
Definition at line 816 of file sdma_engine.cc.
References gem5::GEM5_PACKED::count, decodeNext(), gem5::GEM5_PACKED::dest, DPRINTF, and gem5::ArmISA::q.
Referenced by ptePde().
Pure virtual function that the device must implement.
Called when a read command is recieved by the port.
pkt | Packet describing this request |
Implements gem5::PioDevice.
Definition at line 162 of file sdma_engine.hh.
Methods for RLC queues.
Definition at line 124 of file sdma_engine.cc.
References gem5::SDMAEngine::SDMAQueue::base(), DPRINTF, panic, gem5::SDMAEngine::SDMAQueue::processing(), rlc0, rlc1, rlcMap, gem5::SDMAEngine::SDMAQueue::rptr(), gem5::SDMAEngine::SDMAQueue::size(), gem5::SDMAEngine::SDMAQueue::valid(), and gem5::SDMAEngine::SDMAQueue::wptr().
Referenced by gem5::PM4PacketProcessor::processSDMAMQD().
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overridevirtual |
Serialize an object.
Output an object's state into the current checkpoint section.
cp | Checkpoint state |
Implements gem5::Serializable.
Definition at line 834 of file sdma_engine.cc.
References gem5::X86ISA::base, gfx, gfxBase, gfxDoorbell, gfxDoorbellOffset, gfxIb, gfxRptr, gfxWptr, gem5::ArmISA::i, page, pageBase, pageDoorbell, pageDoorbellOffset, pageIb, pageRptr, pageWptr, gem5::ClockedObject::serialize(), SERIALIZE_ARRAY, and SERIALIZE_SCALAR.
void gem5::SDMAEngine::setGfxBaseHi | ( | uint32_t | data | ) |
Definition at line 1011 of file sdma_engine.cc.
References gem5::SDMAEngine::SDMAQueue::base(), data, gfx, gfxBase, and gem5::insertBits().
Referenced by writeMMIO().
void gem5::SDMAEngine::setGfxBaseLo | ( | uint32_t | data | ) |
Definition at line 1003 of file sdma_engine.cc.
References gem5::SDMAEngine::SDMAQueue::base(), data, gfx, gfxBase, and gem5::insertBits().
Referenced by writeMMIO().
void gem5::SDMAEngine::setGfxDoorbellHi | ( | uint32_t | data | ) |
Definition at line 1040 of file sdma_engine.cc.
References data, gfxDoorbell, and gem5::insertBits().
void gem5::SDMAEngine::setGfxDoorbellLo | ( | uint32_t | data | ) |
Definition at line 1033 of file sdma_engine.cc.
References data, gfxDoorbell, and gem5::insertBits().
Referenced by writeMMIO().
void gem5::SDMAEngine::setGfxDoorbellOffsetHi | ( | uint32_t | data | ) |
Definition at line 1054 of file sdma_engine.cc.
References data, gfxDoorbellOffset, and gem5::insertBits().
void gem5::SDMAEngine::setGfxDoorbellOffsetLo | ( | uint32_t | data | ) |
Definition at line 1047 of file sdma_engine.cc.
References data, gfxDoorbellOffset, and gem5::insertBits().
Referenced by writeMMIO().
void gem5::SDMAEngine::setGfxRptrHi | ( | uint32_t | data | ) |
Definition at line 1026 of file sdma_engine.cc.
References data, gfxRptr, and gem5::insertBits().
Referenced by writeMMIO().
void gem5::SDMAEngine::setGfxRptrLo | ( | uint32_t | data | ) |
Definition at line 1019 of file sdma_engine.cc.
References data, gfxRptr, and gem5::insertBits().
Referenced by writeMMIO().
void gem5::SDMAEngine::setGfxSize | ( | uint64_t | data | ) |
Definition at line 1061 of file sdma_engine.cc.
References data, gfx, and gem5::SDMAEngine::SDMAQueue::size().
Referenced by writeMMIO().
void gem5::SDMAEngine::setGfxWptrHi | ( | uint32_t | data | ) |
Definition at line 1074 of file sdma_engine.cc.
References data, gfxWptr, and gem5::insertBits().
Referenced by writeMMIO().
void gem5::SDMAEngine::setGfxWptrLo | ( | uint32_t | data | ) |
Definition at line 1067 of file sdma_engine.cc.
References data, gfxWptr, and gem5::insertBits().
Referenced by writeMMIO().
void gem5::SDMAEngine::setGPUDevice | ( | AMDGPUDevice * | gpu_device | ) |
Definition at line 70 of file sdma_engine.cc.
References gpuDevice, gem5::VegaISA::Walker::setDevRequestor(), gem5::AMDGPUDevice::vramRequestorId(), and walker.
Referenced by gem5::AMDGPUDevice::AMDGPUDevice().
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Definition at line 146 of file sdma_engine.hh.
Referenced by gem5::AMDGPUDevice::AMDGPUDevice().
void gem5::SDMAEngine::setPageBaseHi | ( | uint32_t | data | ) |
Definition at line 1089 of file sdma_engine.cc.
References gem5::SDMAEngine::SDMAQueue::base(), data, gem5::insertBits(), page, and pageBase.
void gem5::SDMAEngine::setPageBaseLo | ( | uint32_t | data | ) |
Definition at line 1081 of file sdma_engine.cc.
References gem5::SDMAEngine::SDMAQueue::base(), data, gem5::insertBits(), page, and pageBase.
Referenced by writeMMIO().
void gem5::SDMAEngine::setPageDoorbellHi | ( | uint32_t | data | ) |
Definition at line 1118 of file sdma_engine.cc.
References data, gem5::insertBits(), and pageDoorbell.
void gem5::SDMAEngine::setPageDoorbellLo | ( | uint32_t | data | ) |
Definition at line 1111 of file sdma_engine.cc.
References data, gem5::insertBits(), and pageDoorbell.
Referenced by writeMMIO().
void gem5::SDMAEngine::setPageDoorbellOffsetHi | ( | uint32_t | data | ) |
Definition at line 1132 of file sdma_engine.cc.
References data, gem5::insertBits(), and pageDoorbellOffset.
void gem5::SDMAEngine::setPageDoorbellOffsetLo | ( | uint32_t | data | ) |
Definition at line 1125 of file sdma_engine.cc.
References data, gem5::insertBits(), and pageDoorbellOffset.
Referenced by writeMMIO().
void gem5::SDMAEngine::setPageRptrHi | ( | uint32_t | data | ) |
Definition at line 1104 of file sdma_engine.cc.
References data, gem5::insertBits(), and pageRptr.
Referenced by writeMMIO().
void gem5::SDMAEngine::setPageRptrLo | ( | uint32_t | data | ) |
Definition at line 1097 of file sdma_engine.cc.
References data, gem5::insertBits(), and pageRptr.
Referenced by writeMMIO().
void gem5::SDMAEngine::setPageSize | ( | uint64_t | data | ) |
Definition at line 1139 of file sdma_engine.cc.
References data, page, and gem5::SDMAEngine::SDMAQueue::size().
Referenced by writeMMIO().
void gem5::SDMAEngine::setPageWptrHi | ( | uint32_t | data | ) |
Definition at line 1152 of file sdma_engine.cc.
References data, gem5::insertBits(), and pageWptr.
void gem5::SDMAEngine::setPageWptrLo | ( | uint32_t | data | ) |
Definition at line 1145 of file sdma_engine.cc.
References data, gem5::insertBits(), and pageWptr.
Referenced by writeMMIO().
void gem5::SDMAEngine::srbmWrite | ( | SDMAQueue * | q, |
sdmaSRBMWriteHeader * | header, | ||
sdmaSRBMWrite * | pkt | ||
) |
Definition at line 653 of file sdma_engine.cc.
References gem5::GEM5_PACKED::data, decodeNext(), DPRINTF, header, gem5::ArmISA::q, gem5::GEM5_PACKED::regAddr, and warn_once.
Referenced by decodeHeader().
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GPUController will perform DMA operations on VAs, and because page faults are not currently supported for GPUController, we must be able to find the pages mapped for the process.
Implements gem5::DmaVirtDevice.
Definition at line 105 of file sdma_engine.cc.
References gem5::AMDGPUDevice::getVM(), gpuDevice, gem5::AMDGPUVM::inAGP(), gem5::AMDGPUVM::inMMHUB(), and gem5::MipsISA::vaddr.
Referenced by copyReadData().
Definition at line 636 of file sdma_engine.cc.
References gem5::GEM5_PACKED::contextId, decodeNext(), DPRINTF, gem5::AMDGPUDevice::getIH(), getIHClientId(), gpuDevice, gem5::GEM5_PACKED::ibOffset, gem5::AMDGPUInterruptHandler::prepareInterruptCookie(), gem5::ArmISA::q, gem5::GEM5_PACKED::rbRptr, gem5::AMDGPUInterruptHandler::submitInterruptCookie(), and gem5::TRAP_ID.
Referenced by decodeHeader().
void gem5::SDMAEngine::unregisterRLCQueue | ( | Addr | doorbell | ) |
Definition at line 153 of file sdma_engine.cc.
References panic, rlc0, rlc1, rlcMap, and gem5::SDMAEngine::SDMAQueue::valid().
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Unserialize an object.
Read an object's state from the current checkpoint section.
cp | Checkpoint state |
Implements gem5::Serializable.
Definition at line 880 of file sdma_engine.cc.
References gem5::X86ISA::base, gfx, gfxBase, gfxDoorbell, gfxDoorbellOffset, gfxIb, gfxRptr, gfxWptr, gem5::ArmISA::i, page, pageBase, pageDoorbell, pageDoorbellOffset, pageIb, pageRptr, pageWptr, gem5::ClockedObject::unserialize(), UNSERIALIZE_ARRAY, and UNSERIALIZE_SCALAR.
Inherited methods.
Implements gem5::PioDevice.
Definition at line 161 of file sdma_engine.hh.
Referenced by decodeHeader().
Methods that implement processing of SDMA packets.
Definition at line 469 of file sdma_engine.cc.
References gem5::GEM5_PACKED::count, gem5::GEM5_PACKED::dest, gem5::DmaVirtDevice::dmaReadVirt(), DPRINTF, gem5::ArmISA::q, and writeReadData().
Definition at line 516 of file sdma_engine.cc.
References gem5::GEM5_PACKED::count, decodeNext(), gem5::GEM5_PACKED::dest, DPRINTF, and gem5::ArmISA::q.
Referenced by writeReadData().
Methods for setting the values of SDMA MMIO registers.
Definition at line 925 of file sdma_engine.cc.
References gem5::bits(), DPRINTF, getGfxDoorbell(), getGfxDoorbellOffset(), gem5::Packet::getLE(), getPageDoorbell(), getPageDoorbellOffset(), gpuDevice, mmSDMA_GFX_DOORBELL, mmSDMA_GFX_DOORBELL_OFFSET, mmSDMA_GFX_RB_BASE, mmSDMA_GFX_RB_BASE_HI, mmSDMA_GFX_RB_CNTL, mmSDMA_GFX_RB_RPTR_ADDR_HI, mmSDMA_GFX_RB_RPTR_ADDR_LO, mmSDMA_GFX_RB_WPTR_POLL_ADDR_HI, mmSDMA_GFX_RB_WPTR_POLL_ADDR_LO, mmSDMA_PAGE_DOORBELL, mmSDMA_PAGE_DOORBELL_OFFSET, mmSDMA_PAGE_RB_BASE, mmSDMA_PAGE_RB_CNTL, mmSDMA_PAGE_RB_RPTR_ADDR_HI, mmSDMA_PAGE_RB_RPTR_ADDR_LO, mmSDMA_PAGE_RB_WPTR_POLL_ADDR_LO, gem5::SDMAGfx, gem5::SDMAPage, gem5::AMDGPUDevice::setDoorbellType(), setGfxBaseHi(), setGfxBaseLo(), setGfxDoorbellLo(), setGfxDoorbellOffsetLo(), setGfxRptrHi(), setGfxRptrLo(), setGfxSize(), setGfxWptrHi(), setGfxWptrLo(), setPageBaseLo(), setPageDoorbellLo(), setPageDoorbellOffsetLo(), setPageRptrHi(), setPageRptrLo(), setPageSize(), setPageWptrLo(), and gem5::AMDGPUDevice::setSDMAEngine().
Referenced by gem5::AMDGPUDevice::writeMMIO().
Definition at line 486 of file sdma_engine.cc.
References gem5::GEM5_PACKED::count, decodeNext(), gem5::GEM5_PACKED::dest, gem5::DmaVirtDevice::dmaWriteVirt(), DPRINTF, getGARTAddr(), gem5::AMDGPUDevice::getMemMgr(), gem5::AMDGPUVM::getMMHUBBase(), gem5::AMDGPUDevice::getVM(), gpuDevice, gem5::ArmISA::i, gem5::AMDGPUVM::inMMHUB(), gem5::ArmISA::q, writeDone(), and gem5::AMDGPUMemoryManager::writeRequest().
Referenced by write().
int gem5::SDMAEngine::cur_vmid = 0 |
Definition at line 263 of file sdma_engine.hh.
Referenced by copyReadData(), decodeNext(), processRLC0(), and processRLC1().
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private |
Each SDMAEngine processes four queues: paging, gfx, rlc0, and rlc1, where RLC stands for Run List Controller.
Each one of these can have one indirect buffer associated at any particular time. The switching order between queues is supposed to be page -> gfx -> rlc0 -> page -> gfx -> rlc1, skipping empty queues.
Definition at line 117 of file sdma_engine.hh.
Referenced by processGfx(), SDMAEngine(), serialize(), setGfxBaseHi(), setGfxBaseLo(), setGfxSize(), and unserialize().
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Definition at line 121 of file sdma_engine.hh.
Referenced by getGfxBase(), serialize(), setGfxBaseHi(), setGfxBaseLo(), and unserialize().
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Definition at line 123 of file sdma_engine.hh.
Referenced by getGfxDoorbell(), serialize(), setGfxDoorbellHi(), setGfxDoorbellLo(), and unserialize().
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Definition at line 124 of file sdma_engine.hh.
Referenced by getGfxDoorbellOffset(), serialize(), setGfxDoorbellOffsetHi(), setGfxDoorbellOffsetLo(), and unserialize().
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Definition at line 117 of file sdma_engine.hh.
Referenced by SDMAEngine(), serialize(), and unserialize().
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Definition at line 122 of file sdma_engine.hh.
Referenced by getGfxRptr(), serialize(), setGfxRptrHi(), setGfxRptrLo(), and unserialize().
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Definition at line 125 of file sdma_engine.hh.
Referenced by getGfxWptr(), serialize(), setGfxWptrHi(), setGfxWptrLo(), and unserialize().
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Definition at line 133 of file sdma_engine.hh.
Referenced by copyReadData(), getGARTAddr(), ptePde(), setGPUDevice(), translate(), trap(), writeMMIO(), and writeReadData().
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Definition at line 109 of file sdma_engine.hh.
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Definition at line 117 of file sdma_engine.hh.
Referenced by processPage(), SDMAEngine(), serialize(), setPageBaseHi(), setPageBaseLo(), setPageSize(), and unserialize().
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Definition at line 127 of file sdma_engine.hh.
Referenced by getPageBase(), serialize(), setPageBaseHi(), setPageBaseLo(), and unserialize().
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Definition at line 129 of file sdma_engine.hh.
Referenced by getPageDoorbell(), serialize(), setPageDoorbellHi(), setPageDoorbellLo(), and unserialize().
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Definition at line 130 of file sdma_engine.hh.
Referenced by getPageDoorbellOffset(), serialize(), setPageDoorbellOffsetHi(), setPageDoorbellOffsetLo(), and unserialize().
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Definition at line 117 of file sdma_engine.hh.
Referenced by SDMAEngine(), serialize(), and unserialize().
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Definition at line 128 of file sdma_engine.hh.
Referenced by getPageRptr(), serialize(), setPageRptrHi(), setPageRptrLo(), and unserialize().
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Definition at line 131 of file sdma_engine.hh.
Referenced by getPageWptr(), serialize(), setPageWptrHi(), setPageWptrLo(), and unserialize().
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Definition at line 118 of file sdma_engine.hh.
Referenced by processRLC0(), registerRLCQueue(), SDMAEngine(), and unregisterRLCQueue().
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Definition at line 118 of file sdma_engine.hh.
Referenced by SDMAEngine().
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Definition at line 118 of file sdma_engine.hh.
Referenced by processRLC1(), registerRLCQueue(), SDMAEngine(), and unregisterRLCQueue().
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Definition at line 118 of file sdma_engine.hh.
Referenced by SDMAEngine().
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Definition at line 137 of file sdma_engine.hh.
Referenced by processRLC(), registerRLCQueue(), and unregisterRLCQueue().
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Definition at line 134 of file sdma_engine.hh.
Referenced by setGPUDevice().