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43 #include "debug/PL111.hh"
44 #include "debug/Uart.hh"
60 :
AmbaDmaDevice(
p, 0x10000), lcdTiming0(0), lcdTiming1(0), lcdTiming2(0),
61 lcdTiming3(0), lcdUpbase(0), lcdLpbase(0), lcdControl(0), lcdImsc(0),
63 clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0),
64 clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0),
65 clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0),
66 pixelClock(
p.pixel_clock),
68 vnc(
p.vnc), bmp(&
fb), pic(NULL),
69 width(LcdMaxWidth), height(LcdMaxHeight),
70 bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0),
71 waterMark(0), dmaPendingNum(0),
73 fillFifoEvent([
this]{ fillFifo(); },
name()),
74 dmaDoneEventAll(maxOutstandingDma,
this),
75 dmaDoneEventFree(maxOutstandingDma),
76 intEvent([
this]{ generateInterrupt(); },
name()),
77 enableCapture(
p.enable_capture)
79 dmaBuffer =
new uint8_t[buffer_size];
81 memset(lcdPalette, 0,
sizeof(lcdPalette));
82 memset(cursorImage, 0,
sizeof(cursorImage));
83 memset(dmaBuffer, 0, buffer_size);
85 for (
int i = 0;
i < maxOutstandingDma; ++
i)
86 dmaDoneEventFree[
i] = &dmaDoneEventAll[
i];
89 vnc->setFrameBuffer(&
fb);
111 DPRINTF(PL111,
" read register %#x size=%d\n", daddr, pkt->
getSize());
145 panic(
"LCD register at offset %#x is Write-Only\n", daddr);
175 panic(
"CLCD register at offset %#x is Write-Only\n", daddr);
188 }
else if (daddr >=
CrsrImage && daddr <= 0xBFC) {
194 }
else if (daddr >=
LcdPalette && daddr <= 0x3FC) {
201 panic(
"Tried to read CLCD register at offset %#x that "
202 "doesn't exist\n", daddr);
226 DPRINTF(PL111,
" write register %#x value %#x size=%d\n", daddr,
248 DPRINTF(PL111,
"####### Upper panel base set to: %#x #######\n",
lcdUpbase);
251 warn_once(
"LCD dual screen mode not supported\n");
273 panic(
"Interrupting on vcomp not supported\n");
282 panic(
"LCD register at offset %#x is Read-Only\n", daddr);
285 panic(
"LCD register at offset %#x is Read-Only\n", daddr);
296 panic(
"LCD register at offset %#x is Read-Only\n", daddr);
299 panic(
"LCD register at offset %#x is Read-Only\n", daddr);
326 panic(
"CLCD register at offset %#x is Read-Only\n", daddr);
329 panic(
"CLCD register at offset %#x is Read-Only\n", daddr);
332 if (daddr >=
CrsrImage && daddr <= 0xBFC) {
338 }
else if (daddr >=
LcdPalette && daddr <= 0x3FC) {
345 panic(
"Tried to write PL111 register at offset %#x that "
346 "doesn't exist\n", daddr);
379 panic(
"Unimplemented video mode\n");
385 offsets[2], offsets[1], offsets[0],
391 offsets[0], offsets[1], offsets[2],
459 assert(!
event->scheduled());
483 warn(
"CLCD controller buffer underrun, took %d ticks when should"
496 DPRINTF(PL111,
"-- write out frame buffer into bmp\n");
526 DPRINTF(PL111,
"Serializing ARM PL111\n");
546 uint8_t lcdImsc_serial =
lcdImsc;
549 uint8_t lcdRis_serial =
lcdRis;
552 uint8_t lcdMis_serial =
lcdMis;
589 Tick int_event_time = 0;
590 Tick read_event_time = 0;
591 Tick fill_fifo_event_time = 0;
616 DPRINTF(PL111,
"Unserializing ARM PL111\n");
618 uint32_t lcdTiming0_serial;
622 uint32_t lcdTiming1_serial;
626 uint32_t lcdTiming2_serial;
630 uint32_t lcdTiming3_serial;
637 uint32_t lcdControl_serial;
641 uint8_t lcdImsc_serial;
645 uint8_t lcdRis_serial;
649 uint8_t lcdMis_serial;
663 uint8_t clcdCrsrImsc_serial;
667 uint8_t clcdCrsrIcr_serial;
671 uint8_t clcdCrsrRis_serial;
675 uint8_t clcdCrsrMis_serial;
691 Tick int_event_time = 0;
692 Tick read_event_time = 0;
693 Tick fill_fifo_event_time = 0;
703 if (fill_fifo_event_time)
711 if (dma_done_event_tick[
x])
729 DPRINTF(PL111,
"Generate Interrupt: lcdImsc=0x%x lcdRis=0x%x lcdMis=0x%x\n",
735 DPRINTF(PL111,
" -- Generated\n");
void fillFifo()
fillFIFO event
Tick curTick()
The universal simulation clock.
void write(std::ostream &bmp) const override
Write the frame buffer data into the provided ostream.
TimingReg2 lcdTiming2
Clock and signal polarity control register.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
void serialize(CheckpointOut &cp) const override
Serialize an object.
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Tick when() const
Get the time that the event is scheduled.
static const int ClcdCrsrMis
VncInput * vnc
VNC server.
uint8_t bytesPerPixel
Bytes per pixel.
static const int ClcdCrsrConfig
uint64_t getUintX(ByteOrder endian) const
Get the data in the packet byte swapped from the specified endianness and zero-extended to 64 bits.
#define UNSERIALIZE_SCALAR(scalar)
uint32_t clcdCrsrClip
Cursor clip position register.
static const int maxOutstandingDma
AddrRange RangeSize(Addr start, Addr size)
EventFunctionWrapper fillFifoEvent
Fill fifo.
BmpWriter bmp
Helper to write out bitmaps.
#define UNSERIALIZE_CONTAINER(member)
uint32_t clcdCrsrPalette0
Cursor palette registers.
AddrRangeList getAddrRanges() const override
Determine the address ranges that this device responds to.
Addr curAddr
Frame buffer current address.
uint32_t lcdPalette[LcdPaletteSize]
256x16-bit color palette registers 256 palette entries organized as 128 locations of two entries per ...
uint16_t width
Frame buffer width - pixels per line.
void dmaAction(Packet::Command cmd, Addr addr, int size, Event *event, uint8_t *data, Tick delay, Request::Flags flag=0)
static const int LcdTiming1
uint32_t lcdUpbase
Upper panel frame base address register.
InterruptReg clcdCrsrIcr
Cursor interrupt clear register.
Tick startTime
Start time for frame buffer dma read.
void schedule(Event &event, Tick when)
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
uint32_t cursorImage[CrsrImageSize]
Cursor image RAM register 256-word wide values defining images overlaid by the hw cursor mechanism.
std::string csprintf(const char *format, const Args &...args)
void makeAtomicResponse()
static const int buffer_size
static const int ClcdCrsrPalette0
static const int ClcdCrsrRis
static const int LcdUpCurr
static const int CrsrImageSize
std::vector< DmaDoneEvent > dmaDoneEventAll
All pre-allocated DMA done events.
InterruptReg lcdRis
Raw interrupt status register - const.
uint32_t clcdCrsrPalette1
static const int ClcdCrsrIcr
static const int LcdPalette
InterruptReg clcdCrsrRis
Cursor raw interrupt status register - const.
static const int LcdLpBase
static const int ClcdCrsrCtrl
std::ostream * stream() const
Get the output underlying output stream.
static const int LcdTiming2
@ UNCACHEABLE
The request is to an uncacheable address.
uint16_t height
Frame buffer height - lines per panel.
EndBitUnion(ControlReg) class DmaDoneEvent TimingReg0 lcdTiming0
Event wrapper for dmaDone()
virtual std::string name() const
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
OutputStream * pic
Picture of what the current frame buffer looks like.
uint64_t Tick
Tick count type.
uint32_t dmaPendingNum
Number of pending dma reads.
void dmaDone()
DMA done event.
virtual void clear()=0
Clear a signalled interrupt.
static const uint64_t AMBA_ID
uint32_t clcdCrsrConfig
Cursor configuration register.
uint32_t waterMark
DMA FIFO watermark.
void resize(unsigned width, unsigned height)
Resize the frame buffer.
std::vector< DmaDoneEvent * > dmaDoneEventFree
Unused DMA done events that are ready to be scheduled.
#define SERIALIZE_ARRAY(member, size)
EventFunctionWrapper readEvent
DMA framebuffer read event.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
static const int LcdTiming3
const std::string & name()
PixelConverter pixelConverter() const
#define SERIALIZE_SCALAR(scalar)
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
Configurable RGB pixel converter.
TimingReg1 lcdTiming1
Vertical axis panel control register.
uint32_t clcdCrsrCtrl
Cursor control register.
ControlReg lcdControl
Control register.
static const int LcdPaletteSize
uint32_t clcdCrsrXY
Cursor XY position register.
uint32_t lcdLpbase
Lower panel frame base address register.
Tick pixelClock
Pixel clock.
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Addr maxAddr
Frame buffer max address.
void readFramebuffer()
DMA framebuffer read.
void startDma()
start the dmas off after power is enabled
#define UNSERIALIZE_ARRAY(member, size)
static const int LcdTiming0
ARM PL111 register map.
static const int ClcdCrsrPalette1
#define SERIALIZE_CONTAINER(member)
InterruptReg lcdImsc
Interrupt mask set/clear register.
ArmInterruptPin *const interrupt
Addr startAddr
Frame buffer base address.
InterruptReg lcdMis
Masked interrupt status register.
void copyIn(const uint8_t *fb, const PixelConverter &conv)
Fill the frame buffer with pixel data from an external buffer of the same width and height as this fr...
uint8_t * dmaBuffer
CLCDC supports up to 1024x768.
InterruptReg clcdCrsrImsc
Cursor interrupt mask set/clear register.
T getLE() const
Get the data in the packet byte swapped from little endian to host endian.
void updateVideoParams()
Send updated parameters to the vnc server.
InterruptReg clcdCrsrMis
Cursor masked interrupt status register - const.
std::ostream CheckpointOut
virtual void raise()=0
Signal an interrupt.
static const int ClcdCrsrClip
bool readId(PacketPtr pkt, uint64_t amba_id, Addr pio_addr)
Cycles ticksToCycles(Tick t) const
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
void setUintX(uint64_t w, ByteOrder endian)
Set the value in the word w after truncating it to the length of the packet and then byteswapping it ...
static const int ClcdCrsrImsc
static const int ClcdCrsrXY
EventFunctionWrapper intEvent
Wrapper to create an event out of the interrupt.
static const int LcdControl
TimingReg3 lcdTiming3
Line end control register.
bool scheduled() const
Determine if the current event is scheduled.
static const int LcdLpCurr
#define panic(...)
This implements a cprintf based panic() function.
AmbaDmaDeviceParams Params
void generateInterrupt()
Function to generate interrupt.
static const int CrsrImage
static const int LcdUpBase
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