gem5 v23.0.0.0
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Fetch2 receives lines of data from Fetch1, separates them into instructions and passes them to Decode. More...
#include <vector>
#include "base/named.hh"
#include "cpu/minor/buffers.hh"
#include "cpu/minor/cpu.hh"
#include "cpu/minor/pipe_data.hh"
#include "cpu/pred/bpred_unit.hh"
#include "params/BaseMinorCPU.hh"
Go to the source code of this file.
Classes | |
class | gem5::minor::Fetch2 |
This stage receives lines of data from Fetch1, separates them into instructions and passes them to Decode. More... | |
struct | gem5::minor::Fetch2::Fetch2ThreadInfo |
Data members after this line are cycle-to-cycle state. More... | |
struct | gem5::minor::Fetch2::Fetch2Stats |
Namespaces | |
namespace | gem5 |
Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223. | |
namespace | gem5::minor |
Fetch2 receives lines of data from Fetch1, separates them into instructions and passes them to Decode.
Definition in file fetch2.hh.