sc_signal_resolved.cc

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/*
 * Copyright 2018 Google, Inc.
 *
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 * modification, are permitted provided that the following conditions are
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 * notice, this list of conditions and the following disclaimer;
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 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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#include "systemc/core/process.hh"
#include "systemc/core/scheduler.hh"
#include "systemc/ext/channel/sc_signal_resolved.hh"
#include "systemc/ext/core/sc_module.hh" // for sc_gen_unique_name
 
namespace sc_core
{
 
sc_signal_resolved::sc_signal_resolved() : sc_interface(),
        sc_signal<sc_dt::sc_logic, SC_MANY_WRITERS>(
                sc_gen_unique_name("signal_resolved"))
{}
 
sc_signal_resolved::sc_signal_resolved(const char *name) :
        sc_interface(), sc_signal<sc_dt::sc_logic, SC_MANY_WRITERS>(name)
{}
 
sc_signal_resolved::~sc_signal_resolved() {}
void sc_signal_resolved::register_port(sc_port_base &, const char *) {}
 
void
sc_signal_resolved::write(const sc_dt::sc_logic &l)
{
    ::sc_gem5::Process *p = ::sc_gem5::scheduler.current();
 
    auto it = inputs.find(p);
    if (it == inputs.end()) {
        inputs.emplace(p, l);
        request_update();
    } else if (it->second != l) {
        it->second = l;
        request_update();
    }
}
 
sc_signal_resolved &
sc_signal_resolved::operator = (const sc_dt::sc_logic &l)
{
    write(l);
    return *this;
}
 
sc_signal_resolved &
sc_signal_resolved::operator = (const sc_signal_resolved &r)
{
    write(r.read());
    return *this;
}
 
void
sc_signal_resolved::update()
{
    using sc_dt::Log_0;
    using sc_dt::Log_1;
    using sc_dt::Log_Z;
    using sc_dt::Log_X;
    static sc_dt::sc_logic_value_t merge_table[4][4] = {
        { Log_0, Log_X, Log_0, Log_X },
        { Log_X, Log_1, Log_1, Log_X },
        { Log_0, Log_1, Log_Z, Log_X },
        { Log_X, Log_X, Log_X, Log_X }
    };
 
    // Resolve the inputs, and give the result to the underlying signal class.
    m_new_val = Log_Z;
    for (auto &input: inputs)
        m_new_val = merge_table[m_new_val.value()][input.second.value()];
 
    // Ask the signal to update it's value.
    sc_signal<sc_dt::sc_logic, SC_MANY_WRITERS>::update();
}
 
} // namespace sc_core