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syscall_abi.hh
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27
28#ifndef __SIM_SYSCALL_ABI_HH__
29#define __SIM_SYSCALL_ABI_HH__
30
31#include "base/bitfield.hh"
32#include "base/types.hh"
33#include "cpu/thread_context.hh"
34#include "sim/guest_abi.hh"
35#include "sim/syscall_return.hh"
36
37namespace gem5
38{
39
40class SyscallDesc;
41
43{
44 using State = int;
45};
46
48{
49 using UintPtr = uint64_t;
50};
51
53{
54 using UintPtr = uint32_t;
55
56 // Is this argument too big for a single register?
57 template <typename T, typename Enabled=void>
58 struct IsWide : public std::false_type {};
59
60 template <typename T>
61 struct IsWide<T, std::enable_if_t<(sizeof(T) > sizeof(UintPtr))>> :
62 public std::true_type
63 {};
64
65 template <typename T>
66 static constexpr bool IsWideV = IsWide<T>::value;
67
68 // Read two registers and merge them into one value.
69 static uint64_t
70 mergeRegs(ThreadContext *tc, const RegId &low_id, const RegId &high_id)
71 {
72 RegVal low = tc->getReg(low_id);
73 RegVal high = tc->getReg(high_id);
74 return insertBits(low, 63, 32, high);
75 }
76};
77
78namespace guest_abi
79{
80
81// For 64 bit systems, return syscall args directly.
82template <typename ABI, typename Arg>
83struct Argument<ABI, Arg,
84 typename std::enable_if_t<
85 std::is_base_of_v<GenericSyscallABI64, ABI> &&
86 std::is_integral_v<Arg>>>
87{
88 static Arg
89 get(ThreadContext *tc, typename ABI::State &state)
90 {
91 panic_if(state >= ABI::ArgumentRegs.size(),
92 "Ran out of syscall argument registers.");
93 return tc->getReg(ABI::ArgumentRegs[state++]);
94 }
95};
96
97// For 32 bit systems, return small enough syscall args directly. Large
98// arguments aren't handled generically.
99template <typename ABI, typename Arg>
100struct Argument<ABI, Arg,
101 typename std::enable_if_t<std::is_integral_v<Arg> &&
102 !ABI::template IsWideV<Arg>>>
103{
104 static Arg
105 get(ThreadContext *tc, typename ABI::State &state)
106 {
107 panic_if(state >= ABI::ArgumentRegs.size(),
108 "Ran out of syscall argument registers.");
109 return bits(tc->getReg(ABI::ArgumentRegs[state++]), 31, 0);
110 }
111};
112
113} // namespace guest_abi
114} // namespace gem5
115
116#endif // __SIM_SYSCALL_ABI_HH__
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
Register ID: describe an architectural register with its class and index.
Definition reg_class.hh:93
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual RegVal getReg(const RegId &reg) const
constexpr T bits(T val, unsigned first, unsigned last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition bitfield.hh:76
constexpr T insertBits(T val, unsigned first, unsigned last, B bit_val)
Returns val with bits first to last set to the LSBs of bit_val.
Definition bitfield.hh:182
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition logging.hh:214
atomic_var_t state
Definition helpers.cc:188
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t RegVal
Definition types.hh:173
Overload hash function for BasicBlockRange type.
Definition misc.hh:2910
static constexpr bool IsWideV
static uint64_t mergeRegs(ThreadContext *tc, const RegId &low_id, const RegId &high_id)

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