fetch.hh File Reference

#include "arch/generic/decoder.hh"
#include "arch/generic/mmu.hh"
#include "base/random.hh"
#include "base/statistics.hh"
#include "cpu/o3/comm.hh"
#include "cpu/o3/dyn_inst_ptr.hh"
#include "cpu/o3/limits.hh"
#include "cpu/pc_event.hh"
#include "cpu/pred/bpred_unit.hh"
#include "cpu/timebuf.hh"
#include "cpu/translation.hh"
#include "enums/SMTFetchPolicy.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
#include "sim/eventq.hh"
#include "sim/probe/probe.hh"

Go to the source code of this file.

Classes
class	gem5::o3::Fetch
	Fetch class handles both single threaded and SMT fetch. More...
class	gem5::o3::Fetch::IcachePort
	IcachePort class for instruction fetch. More...
class	gem5::o3::Fetch::FetchTranslation
class	gem5::o3::Fetch::FinishTranslationEvent
struct	gem5::o3::Fetch::Stalls
	Source of possible stalls. More...
struct	gem5::o3::Fetch::FetchStatGroup

Namespaces
namespace	gem5
	Copyright (c) 2024 Arm Limited All rights reserved.
namespace	gem5::o3