gem5 v24.1.0.1
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#include <string>
#include <vector>
#include "base/bitfield.hh"
#include "base/compiler.hh"
#include "enums/X86IntelMPAddressType.hh"
#include "enums/X86IntelMPInterruptType.hh"
#include "enums/X86IntelMPPolarity.hh"
#include "enums/X86IntelMPRangeList.hh"
#include "enums/X86IntelMPTriggerMode.hh"
#include "sim/sim_object.hh"
Go to the source code of this file.
Namespaces | |
namespace | gem5 |
Copyright (c) 2024 Arm Limited All rights reserved. | |
namespace | gem5::X86ISA |
This is exposed globally, independent of the ISA. | |
namespace | gem5::X86ISA::intelmp |
Functions | |
template<class T > | |
uint8_t | gem5::writeOutField (PortProxy &proxy, Addr addr, T val) |
uint8_t | gem5::writeOutString (PortProxy &proxy, Addr addr, std::string str, int length) |