135#include <sys/signal.h>
140#include "arch/power/gdb-xml/gdb_xml_power64_core.hh"
141#include "arch/power/gdb-xml/gdb_xml_power_core.hh"
142#include "arch/power/gdb-xml/gdb_xml_power_fpu.hh"
143#include "arch/power/gdb-xml/gdb_xml_powerpc_32.hh"
144#include "arch/power/gdb-xml/gdb_xml_powerpc_64.hh"
148#include "debug/GDBAcc.hh"
149#include "debug/GDBMisc.hh"
160 regCache32(this), regCache64(this)
168RemoteGDB::acc(Addr va,
size_t len)
175 panic_if(FullSystem,
"acc not implemented for POWER FS!");
176 return context()->getProcessPtr()->pTable->lookup(va) !=
nullptr;
182 DPRINTF(GDBAcc,
"getRegs in remotegdb \n");
185 ByteOrder order = (msr.le ? ByteOrder::little : ByteOrder::big);
199 r.pc =
htog((uint32_t)
context->pcState().instAddr(), order);
211 DPRINTF(GDBAcc,
"setRegs in remotegdb \n");
214 ByteOrder order = (msr.le ? ByteOrder::little : ByteOrder::big);
237 DPRINTF(GDBAcc,
"getRegs in remotegdb \n");
240 ByteOrder order = (msr.le ? ByteOrder::little : ByteOrder::big);
265 DPRINTF(GDBAcc,
"setRegs in remotegdb \n");
268 ByteOrder order = (msr.le ? ByteOrder::little : ByteOrder::big);
301#define GDB_XML(x, s) \
302 { x, std::string(reinterpret_cast<const char *>(Blobs::s), \
304 static const std::map<std::string, std::string> annexMap32{
305 GDB_XML(
"target.xml", gdb_xml_powerpc_32),
306 GDB_XML(
"power-core.xml", gdb_xml_power_core),
307 GDB_XML(
"power-fpu.xml", gdb_xml_power_fpu)
309 static const std::map<std::string, std::string> annexMap64{
310 GDB_XML(
"target.xml", gdb_xml_powerpc_64),
311 GDB_XML(
"power64-core.xml", gdb_xml_power64_core),
312 GDB_XML(
"power-fpu.xml", gdb_xml_power_fpu)
316 Msr msr = context()->getReg(int_reg::Msr);
317 auto& annexMap = msr.sf ? annexMap64 : annexMap32;
318 auto it = annexMap.find(annex);
319 if (it == annexMap.end())
RemoteGDB(System *_system, ListenSocketConfig _listen_config)
Concrete subclasses of this abstract class represent how the register values are transmitted on the w...
ThreadContext * context()
void getRegs(ThreadContext *)
Fill the raw buffer from the registers in the ThreadContext.
struct gem5::PowerISA::RemoteGDB::Power64GdbRegCache::GEM5_PACKED r
void setRegs(ThreadContext *) const
Set the ThreadContext's registers from the values in the raw buffer.
void setRegs(ThreadContext *) const
Set the ThreadContext's registers from the values in the raw buffer.
struct gem5::PowerISA::RemoteGDB::PowerGdbRegCache::GEM5_PACKED r
void getRegs(ThreadContext *)
Fill the raw buffer from the registers in the ThreadContext.
PowerGdbRegCache regCache32
Power64GdbRegCache regCache64
bool getXferFeaturesRead(const std::string &annex, std::string &output)
Get an XML target description.
BaseGdbRegCache * gdbRegs()
Register ID: describe an architectural register with its class and index.
ThreadContext is the external interface to all thread state for anything outside of the CPU.
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
constexpr RegClass intRegClass(IntRegClass, IntRegClassName, int_reg::NumRegs, debug::IntRegs)
constexpr RegClass floatRegClass(FloatRegClass, FloatRegClassName, float_reg::NumRegs, debug::FloatRegs)
Copyright (c) 2024 Arm Limited All rights reserved.
T gtoh(T value, ByteOrder guest_byte_order)
static void output(const char *filename)
T htog(T value, ByteOrder guest_byte_order)
Declarations of a non-full system Page Table.