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gem5 [DEVELOP-FOR-25.0]
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#include <amdgpu_vm.hh>
Classes | |
| class | AGPTranslationGen |
| Translation range generators. More... | |
| struct | AMDGPUSysVMContext |
| class | GARTTranslationGen |
| struct | GEM5_PACKED |
| class | MMHUBTranslationGen |
| class | UserTranslationGen |
Public Member Functions | |
| AMDGPUVM () | |
| void | setGPUDevice (AMDGPUDevice *gpu_device) |
| Addr | gartBase () |
| Return base address of GART table in framebuffer. | |
| Addr | gartSize () |
| Return size of GART in number of PTEs. | |
| bool | inGARTRange (Addr paddr) |
| void | readMMIO (PacketPtr pkt, Addr offset) |
| void | writeMMIO (PacketPtr pkt, Addr offset) |
| bool | inAGP (Addr vaddr) |
| Methods for resolving apertures. | |
| Addr | getAGPBot () |
| Addr | getAGPTop () |
| Addr | getAGPBase () |
| bool | inMMHUB (Addr vaddr) |
| Addr | getMMHUBBase () |
| Addr | getMMHUBTop () |
| void | setMMHUBBase (Addr base) |
| void | setMMHUBTop (Addr top) |
| bool | inFB (Addr vaddr) |
| Addr | getFBBase () |
| Addr | getFBTop () |
| Addr | getFBOffset () |
| bool | inSys (Addr vaddr) |
| Addr | getSysAddrRangeLow () |
| Addr | getSysAddrRangeHigh () |
| void | setMMIOAperture (mmio_range_t mmio_aperture, AddrRange range) |
| const AddrRange & | getMMIOAperture (Addr addr) |
| AddrRange | getMMIORange (mmio_range_t mmio_aperture) |
| Addr | getFrameAperture (Addr addr) |
| void | setPageTableBase (uint16_t vmid, Addr ptBase) |
| Page table base/start accessors for user VMIDs. | |
| Addr | getPageTableBase (uint16_t vmid) |
| Addr | getPageTableStart (uint16_t vmid) |
| void | registerTLB (VegaISA::GpuTLB *tlb) |
| Control methods for TLBs associated with the GPU device. | |
| void | invalidateTLBs () |
| void | serialize (CheckpointOut &cp) const override |
| Serialize an object. | |
| void | unserialize (CheckpointIn &cp) override |
| Unserialize an object. | |
Public Member Functions inherited from gem5::Serializable | |
| Serializable () | |
| virtual | ~Serializable () |
| void | serializeSection (CheckpointOut &cp, const char *name) const |
| Serialize an object into a new section. | |
| void | serializeSection (CheckpointOut &cp, const std::string &name) const |
| void | unserializeSection (CheckpointIn &cp, const char *name) |
| Unserialize an a child object. | |
| void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Attributes | |
| std::unordered_map< uint64_t, uint64_t > | gartTable |
| Copy of GART table. | |
Private Types | |
| typedef struct gem5::AMDGPUVM::GEM5_PACKED | AMDGPUVMContext |
| typedef gem5::AMDGPUVM::AMDGPUSysVMContext | AMDGPUSysVMContext |
Private Member Functions | |
| void | writeMMIOGfx900 (PacketPtr pkt, Addr offset) |
| Different MMIO implements for different GFX versions with overlapping MMIO addresses. | |
| void | writeMMIOGfx940 (PacketPtr pkt, Addr offset) |
Private Attributes | |
| AMDGPUDevice * | gpuDevice |
| AMDGPUSysVMContext | vmContext0 |
| std::vector< AMDGPUVMContext > | vmContexts |
| uint64_t | mmhubBase = 0x0 |
| uint64_t | mmhubTop = 0x0 |
| std::vector< VegaISA::GpuTLB * > | gpu_tlbs |
| List of TLBs associated with the GPU device. | |
| std::array< AddrRange, NUM_MMIO_RANGES > | mmioRanges |
Additional Inherited Members | |
Static Public Member Functions inherited from gem5::Serializable | |
| static const std::string & | currentSection () |
| Gets the fully-qualified name of the active section. | |
| static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
| Generate a checkpoint file so that the serialization can be routed to it. | |
Definition at line 135 of file amdgpu_vm.hh.
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| gem5::AMDGPUVM::AMDGPUVM | ( | ) |
Definition at line 46 of file amdgpu_vm.cc.
References gem5::AMDGPU_VM_COUNT, gem5::ArmISA::i, mmioRanges, gem5::NUM_MMIO_RANGES, vmContext0, and vmContexts.
Referenced by gem5::AMDGPUVM::AGPTranslationGen::AGPTranslationGen(), gem5::AMDGPUVM::GARTTranslationGen::GARTTranslationGen(), gem5::AMDGPUVM::MMHUBTranslationGen::MMHUBTranslationGen(), and gem5::AMDGPUVM::UserTranslationGen::UserTranslationGen().
| Addr gem5::AMDGPUVM::gartBase | ( | ) |
Return base address of GART table in framebuffer.
Definition at line 87 of file amdgpu_vm.cc.
References vmContext0.
Referenced by getFrameAperture(), and inGARTRange().
| Addr gem5::AMDGPUVM::gartSize | ( | ) |
Return size of GART in number of PTEs.
Definition at line 93 of file amdgpu_vm.cc.
References vmContext0.
Referenced by getFrameAperture(), and inGARTRange().
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Definition at line 247 of file amdgpu_vm.hh.
References vmContext0.
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Definition at line 245 of file amdgpu_vm.hh.
References vmContext0.
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Definition at line 246 of file amdgpu_vm.hh.
References vmContext0.
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Definition at line 267 of file amdgpu_vm.hh.
References vmContext0.
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Definition at line 269 of file amdgpu_vm.hh.
References vmContext0.
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Definition at line 268 of file amdgpu_vm.hh.
References vmContext0.
Definition at line 287 of file amdgpu_vm.hh.
References gem5::X86ISA::addr, gartBase(), gartSize(), and warn_once.
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Definition at line 74 of file amdgpu_vm.cc.
References gem5::ArmISA::i, mmioRanges, gem5::NBIO_MMIO_RANGE, gem5::NUM_MMIO_RANGES, and gem5::ArmISA::offset.
| AddrRange gem5::AMDGPUVM::getMMIORange | ( | mmio_range_t | mmio_aperture | ) |
Definition at line 68 of file amdgpu_vm.cc.
References mmioRanges.
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Definition at line 311 of file amdgpu_vm.hh.
References vmContexts.
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Definition at line 318 of file amdgpu_vm.hh.
References vmContexts.
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Definition at line 279 of file amdgpu_vm.hh.
References vmContext0.
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Definition at line 278 of file amdgpu_vm.hh.
References vmContext0.
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Methods for resolving apertures.
Definition at line 240 of file amdgpu_vm.hh.
References gem5::MipsISA::vaddr, and vmContext0.
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Definition at line 262 of file amdgpu_vm.hh.
References gem5::MipsISA::vaddr, and vmContext0.
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Definition at line 222 of file amdgpu_vm.hh.
References gartBase(), and gartSize().
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Definition at line 250 of file amdgpu_vm.hh.
References getMMHUBBase(), getMMHUBTop(), and gem5::MipsISA::vaddr.
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Definition at line 272 of file amdgpu_vm.hh.
References gem5::MipsISA::vaddr, and vmContext0.
| void gem5::AMDGPUVM::invalidateTLBs | ( | ) |
Definition at line 280 of file amdgpu_vm.cc.
References DPRINTF, gpu_tlbs, and gem5::ArmISA::tlb.
Definition at line 99 of file amdgpu_vm.cc.
References gem5::bits(), DPRINTF, gem5::Packet::getLE(), MI300X_VM_INVALIDATE_ENG17_ACK, mmhubBase, mmhubTop, mmMMHUB_VM_FB_LOCATION_BASE, mmMMHUB_VM_FB_LOCATION_TOP, mmMMHUB_VM_INVALIDATE_ENG17_ACK, mmMMHUB_VM_INVALIDATE_ENG17_SEM, mmVM_INVALIDATE_ENG17_ACK, gem5::ArmISA::offset, and gem5::Packet::setLE().
| void gem5::AMDGPUVM::registerTLB | ( | VegaISA::GpuTLB * | tlb | ) |
Control methods for TLBs associated with the GPU device.
Definition at line 273 of file amdgpu_vm.cc.
References DPRINTF, gpu_tlbs, and gem5::ArmISA::tlb.
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Serialize an object.
Output an object's state into the current checkpoint section.
| cp | Checkpoint state |
Implements gem5::Serializable.
Definition at line 290 of file amdgpu_vm.cc.
References gem5::AMDGPU_VM_COUNT, gartTable, gem5::ArmISA::i, mmhubBase, mmhubTop, SERIALIZE_ARRAY, SERIALIZE_SCALAR, vmContext0, and vmContexts.
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Definition at line 210 of file amdgpu_vm.hh.
References gpuDevice.
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Definition at line 258 of file amdgpu_vm.hh.
References gem5::RiscvISA::base, and mmhubBase.
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Definition at line 259 of file amdgpu_vm.hh.
References mmhubTop.
| void gem5::AMDGPUVM::setMMIOAperture | ( | mmio_range_t | mmio_aperture, |
| AddrRange | range ) |
Definition at line 62 of file amdgpu_vm.cc.
References mmioRanges.
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Page table base/start accessors for user VMIDs.
Definition at line 305 of file amdgpu_vm.hh.
References vmContexts.
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Unserialize an object.
Read an object's state from the current checkpoint section.
| cp | Checkpoint state |
Implements gem5::Serializable.
Definition at line 341 of file amdgpu_vm.cc.
References gem5::AMDGPU_VM_COUNT, gartTable, gem5::ArmISA::i, mmhubBase, mmhubTop, UNSERIALIZE_ARRAY, UNSERIALIZE_SCALAR, vmContext0, and vmContexts.
Definition at line 260 of file amdgpu_vm.cc.
References gpuDevice, gem5::ArmISA::offset, writeMMIOGfx900(), and writeMMIOGfx940().
Different MMIO implements for different GFX versions with overlapping MMIO addresses.
Definition at line 136 of file amdgpu_vm.cc.
References gem5::bits(), gem5::Packet::getLE(), gem5::insertBits(), mmMC_VM_AGP_BASE, mmMC_VM_AGP_BOT, mmMC_VM_AGP_TOP, mmMC_VM_FB_LOCATION_BASE, mmMC_VM_FB_LOCATION_TOP, mmMC_VM_FB_OFFSET, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, gem5::ArmISA::offset, gem5::X86ISA::val, and vmContext0.
Referenced by writeMMIO().
Definition at line 198 of file amdgpu_vm.cc.
References gem5::bits(), gem5::Packet::getLE(), gem5::insertBits(), MI300X_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, MI300X_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, MI300X_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, MI300X_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, MI300X_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, MI300X_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, MI300X_VM_AGP_BASE, MI300X_VM_AGP_BOT, MI300X_VM_AGP_TOP, MI300X_VM_FB_LOCATION_BASE, MI300X_VM_FB_LOCATION_TOP, MI300X_VM_FB_OFFSET, MI300X_VM_SYSTEM_APERTURE_HIGH_ADDR, MI300X_VM_SYSTEM_APERTURE_LOW_ADDR, gem5::ArmISA::offset, gem5::X86ISA::val, and vmContext0.
Referenced by writeMMIO().
| std::unordered_map<uint64_t, uint64_t> gem5::AMDGPUVM::gartTable |
Copy of GART table.
Typically resides in device memory, however we use a copy in gem5 to simplify the interface.
Definition at line 231 of file amdgpu_vm.hh.
Referenced by serialize(), and unserialize().
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List of TLBs associated with the GPU device.
This is used for flushing the TLBs upon a driver request.
Definition at line 196 of file amdgpu_vm.hh.
Referenced by invalidateTLBs(), and registerTLB().
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Definition at line 138 of file amdgpu_vm.hh.
Referenced by setGPUDevice(), and writeMMIO().
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Definition at line 189 of file amdgpu_vm.hh.
Referenced by getMMHUBBase(), readMMIO(), serialize(), setMMHUBBase(), and unserialize().
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Definition at line 190 of file amdgpu_vm.hh.
Referenced by getMMHUBTop(), readMMIO(), serialize(), setMMHUBTop(), and unserialize().
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Definition at line 205 of file amdgpu_vm.hh.
Referenced by AMDGPUVM(), getMMIOAperture(), getMMIORange(), and setMMIOAperture().
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Definition at line 184 of file amdgpu_vm.hh.
Referenced by AMDGPUVM(), gartBase(), gartSize(), getAGPBase(), getAGPBot(), getAGPTop(), getFBBase(), getFBOffset(), getFBTop(), getSysAddrRangeHigh(), getSysAddrRangeLow(), inAGP(), inFB(), inSys(), serialize(), unserialize(), writeMMIOGfx900(), and writeMMIOGfx940().
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Definition at line 185 of file amdgpu_vm.hh.
Referenced by AMDGPUVM(), getPageTableBase(), getPageTableStart(), serialize(), setPageTableBase(), and unserialize().